- TF-A - lists.trustedfirmware.org

Need a mechanism to easily define platform-independent SMC FIDs

by Julius Werner

Hi, I would like to restart a discussion that we already had a few years ago on a thread called "SMC to intentionally trigger a panic in TF-A" (https://lists.trustedfirmware.org/archives/search?mlist=tf-a%40lists.truste…) but that petered out without any real resolution (and resulted in me ultimately not implementing the feature I was hoping to add). Basically, we are repeatedly stumbling over the problem that we have a use case for some platform-independent SMC API that we want to implement in TF-A, but don't have an appropriate SMC FID range to put it. My request from a few years ago was about implementing a call to intentionally trigger a panic in TF-A for test-automation purposes. Today we came up with a use case where a Trusted OS wants to query BL31 about the location of a shared log buffer: https://review.trustedfirmware.org/20478 . Currently, the available SMC ranges are Arm, CPU, SiP, OEM, Standard, Hypervisor, TA and TOS. The SiP, OEM and TOS ranges are all specific to a single silicon vendor, OEM or trusted OS implementation, so they are not good targets to implement APIs that would make sense to be shared among multiple of these. In theory, the Standard range would probably be the right target to implement calls that are independently useful for multiple platforms / OSes... but as far as I understand, adding a new call to that range requires petitioning Arm to update the SMC calling convention itself, which is a ridiculously high bar to implement a small utility API. In practice, the only choice we have for implementing these kinds of calls is to let every OEM, SiP or TOS assign its own (different) FID for it and then write separate SMC handlers for each in TF-A that all end up calling the same underlying function... which creates a lot of unnecessary code duplication and identifier soup (especially in the case of SMCs for the non-secure OS which would then be implemented by a platform-independent Linux driver that needs a big mapping table to decide which FID to use on which platform for the same API). I think it would be very useful if there was another range of easily allocatable FIDs that developers could just add to with a simple TF-A CL without having to go through a huge specification update process. There are still 41 OENs unused in the Arm SMCCC, and I don't think any new ones were added in the 10 years that the specification existed... so we are really not going to run out of them any time soon. If we could get even one of those OENs for this purpose, we would have 64K FIDs to use up for our small, simple platform-independent API needs, which should last us a long while. We could maybe call it the "Secure Monitor range" and say the FIDs are specific to a certain implementation of Secure Monitor (e.g. TF-A). Then there could just be a header file in the TF-A sources that serves as the authoritative FID assignment table for TF-A, and anyone with a sufficiently useful idea (subject to TF-A maintainer review) for a platform-independent API like this could add it there by just uploading a patch. I recently argued for a similar "simple tag allocation" concept on https://github.com/FirmwareHandoff/firmware_handoff and it found support there, so I hope I'll be able to convince you that it would be useful for SMC FIDs as well?

1 year, 1 month

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Re: rk3399 issue: no DMA in Linux with mainline TF-A and U-Boot SPL

by Christoph Fritz

Hello Jonathan and Kevar, > I also see this issue when switching between Rockchip ATF and Upstream ATF. > > Versions: > Rockchip DDR Blob - rk3399_ddr_800MHz_v1.30.bin > Rockchip Miniloader - rk3399_miniloader_v1.30.bin > Rockchip ATF - rk3399_bl31_v1.36.elf > Upstream ATF - git://git.trustedfirmware.org/TF-A/trusted-firmware-a.git, > git tag v2.8.0, with RK3399_BAUDRATE changed from 115200 to 1500000 in > plat/rockchip/rk3399/rk3399_def.h > U-Boot - git://git.denx.de/u-boot.git, git tag v2022.01 > > Results: > Rockchip DDR Blob + Rockchip Miniloader + Rockchip ATF + U-Boot = DMA working > dma-pl330 ff6d0000.dma-controller: Loaded driver for PL330 DMAC-241330 > dma-pl330 ff6d0000.dma-controller: DBUFF-32x8bytes Num_Chans-6 > Num_Peri-12 Num_Events-12 > dma-pl330 ff6e0000.dma-controller: Loaded driver for PL330 DMAC-241330 > dma-pl330 ff6e0000.dma-controller: DBUFF-128x8bytes > Num_Chans-8 Num_Peri-20 Num_Events-16 > Rockchip DDR Blob + Rockchip Miniloader + Upstream ATF + U-Boot = DMA > not working > OF: amba_device_add() failed (-19) for /bus/dma-controller@ff6d0000 > OF: amba_device_add() failed (-19) for /bus/dma-controller@ff6e0000 > > I can't check the Rockchip ATF source code as it isn't available. > Any idea what is different between Rockchip ATF and Upstream ATF for > DMA to work properly? @Kevar: It would be really great if you could have a look into it. I am still having this issue. Thanks -- Christoph

1 year, 1 month

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About unmaintained files

by Yann Gautier

Hello, Recently I wondered who was the Code-Owner of the files in this patch: fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32 (https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/27162) By the way it still doesn't have the Code-Owner review vote ;-) But that triggered a more generic question about files and directories in docs/about/maintainers.rst: are all the paths listed here reflect all the files in TF-A repository? The answer is unfortunately no. I've then ended up writing some shell commands to try to list unmaintained files: for p in $(grep ^':|F|' docs/about/maintainers.rst | cut -d" " -f2 | grep ^[a-zA-Z] | grep -v "drivers/nuvoton" | sed "s;\\\;;g"); do find $p -type f >> /tmp/find_tf-a_maintained_files.txt; done; sort -u -o /tmp/find_tf-a_maintained_files.txt{,}; git ls-files | sort -u > /tmp/tf-a_files.txt; diff /tmp/find_tf-a_maintained_files.txt /tmp/tf-a_files.txt > /tmp/tf-a_unmaintained_files.txt Some are easy to correct, e.g. some docs/plat/<platform> files should be added to the list of files for a given <platform>. Or some include/drivers paths missing. I may push some patches for this if I can. The drivers/nuvoton path is listed but it doesn't exist. Some platforms or drivers are completely missing, and that would be good their maintainers add a chapter for them. But some generic & core files are also not listed. The goal of this mail is to open the discussion about that. That could be tricky as maintainer may change. But all of that would ease the contributors way of working. I've also seen that gerrit automatically adds Code-Owner for the review. So it seems there is another list for that, and we could somehow try to align those 2 lists. Best regards, Yann

1 year, 1 month

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Build failure under yocto

by Ryan Eatmon

We do nightly testing of our yocto layers against the latest kernel, uboot, trusted-firmware-a, and optee. On April 12th we started getting a build failure with trusted-firmware-a. I have tracked the issue down to this commit: https://github.com/ARM-software/arm-trusted-firmware/commit/71c42e98bbe900a… Specifically, the line in make_helpers/utilities.mk: escape-shell = '$(subst ','\'',$(1))' On the surface it feels like the ' is overused and might cause issues. I tried making the line: escape-shell = $(subst ','\'',$(1)) And the builds went back to working properly. Does that seem like a change that should be made, or was there a reason for the extra '' wrapper? I have submitted a GitHub issue about this as well: https://github.com/TrustedFirmware-A/trusted-firmware-a/issues/7 -- Ryan Eatmon reatmon(a)ti.com ----------------------------------------- Texas Instruments, Inc. - LCPD - MGTS

1 year, 1 month

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gicv2.h vs gicv3.h conflict

by Jacob Kroon

Hi, I'm upgrading the ATF I use from 2.4 to 2.8, and ran into a header conflict. The change https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/13806 introduced an inclusion of include/drivers/arm/gicv3.h in lib/el3_runtime/aarch64/context_mgmt.c, but in my build environment that .c file also includes include/drivers/arm/gicv2.h so now I get macro redefinition of "INT_ID_MASK" errors when compiling. Is it an error, that in my build environment the gicv2.h gets included ? I've solved it locally by doing: diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index 866ac4154..395635a86 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -18,7 +18,9 @@ #include <common/bl_common.h> #include <common/debug.h> #include <context.h> +#if CTX_INCLUDE_EL2_REGS #include <drivers/arm/gicv3.h> +#endif #include <lib/el3_runtime/context_mgmt.h> #include <lib/el3_runtime/pubsub_events.h> #include <lib/extensions/amu.h> but I am not sure whether this is the correct fix or not, or if I am doing something else wrong here. Any suggestions on what would be the correct fix ? Regards Jacob

1 year, 1 month

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Reminder: TrustedFirmware Discord Channel

by don.harbin＠linaro.org

The content of this message was lost. It was probably cross-posted to multiple lists and previously handled on another list.

1 year, 1 month

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TF-A Tech Forum - Apr 18th at 4.00pm BST

by Olivier Deprez

Hi, In the TF-A Tech Forum on Apr 18th at 4.00pm BST, Javier Almansa Sobrino will present the topic of TF-RMM Stage-1 Memory management, by his own words: "This week's TF-A Tech Forum will present the TF-RMM Stage 1 Memory Management, where we will discuss the design of the TF-RMM memory space as well as some implementation details and future work." Regards, Olivier. TF-A Tech Forum Thursday Apr 18, 2024 ⋅ 5pm – 6pm Central European Time - Paris We run an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC. Feel free to forward this invite to colleagues. Invites are via the TF-A mailing list and also published on the Trusted Firmware website. Details are here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/Trusted Firmware is inviting you to a scheduled Zoom meeting.Join Zoom Meetinghttps://linaro-org.zoom.us/my/trustedfirmware?pwd=VktXcm5MNUUyVVM4R0k3ZUtvdU84QT09 One tap mobile+16465588656,,9159704974# US (New York)+16699009128,,9159704974# US (San Jose)Dial by your location +1 646 558 8656 US (New York) +1 669 900 9128 US (San Jose) 877 853 5247 US Toll-free 888 788 0099 US Toll-freeMeeting ID: 915 970 4974Find your local number: https://zoom.us/u/ad27hc6t7h Guests tf-a(a)lists.trustedfirmware.org marek.bykowski(a)gmail.com okash.khawaja(a)gmail.com

1 year, 1 month

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el3 secure memory access from lower exception levels.

by Nagal, Amit

Hi , As I understand , there are separate page tables in MMU for EL2 and EL3 . If a memory region is mapped as secure memory (MT_SECURE , MT_MEMORY, MT_RW) in bl31 code which runs in EL3 , and the same memory region is mapped again with same attributes (MT_SECURE , MT_MEMORY, MT_RW ) in EL2 , will EL2 be able to read and write to EL3 secure memory region ? Regards Amit

1 year, 1 month

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Trusted Firmware-A LTS v2.8.17 Release Announcement

by Varun Wadekar

1 year, 1 month

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Patch for fixing SGIR_NSATT bitshift

by Jacob Kroon

Hi, I tried to follow the contribution guide but was unable to push the patch to gerrit for review. "git review" just hangs with nothing happening. The patch I want to push for review is: From 198af98d05cfb4704aa2387eaa0a1e606a7968de Mon Sep 17 00:00:00 2001 From: Jacob Kroon <jacob.kroon(a)gmail.com> Date: Fri, 12 Apr 2024 13:11:36 +0200 Subject: [PATCH] fix(gic): Fix SGIR_NSATT bitshift See https://documentation-service.arm.com/static/5f8ff196f86e16515cdbf969?token= Fixes: dcb31ff79096fc88b45df8068e5de83b93f833ed Signed-off-by: Jacob Kroon <jacob.kroon(a)gmail.com> --- include/drivers/arm/gicv2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/drivers/arm/gicv2.h b/include/drivers/arm/gicv2.h index bebd9ceff..c7c441d78 100644 --- a/include/drivers/arm/gicv2.h +++ b/include/drivers/arm/gicv2.h @@ -51,7 +51,7 @@ #define SGIR_TGTLSTFLT_MASK U(0x3) #define SGIR_TGTLST_SHIFT 16 #define SGIR_TGTLST_MASK U(0xff) -#define SGIR_NSATT (U(0x1) << 16) +#define SGIR_NSATT (U(0x1) << 15) #define SGIR_INTID_MASK ULL(0xf) #define SGIR_TGT_SPECIFIC U(0) -- 2.39.2 Are there any suggestions on what I should do next ? Regards Jacob

1 year, 1 month

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