- TF-M - lists.trustedfirmware.org

Re: [TF-M] Adding platform specific functions to Crypto Service.

by Roman.Mazurak＠infineon.com

Hi Fabian, Yes, our team is thinking about adding feature to the Crypto service API, which are not cryptographic in nature. This is one of the possible solution in our design to avoid additional data processing layer between cryptographic clients and crypto accelerator. Our crypto accelerator also provides additional features which will be used by other secure partitions in TF-M but it doesn’t support handling of crypto and non-crypto requests at the same time. It’s not a problem for CC312 which is used for crypto services and OTP in the latest commit. As far as I understand CC312 allows to use crypto operations and OTP related functions at the same time without additional synchronization. So, the reference design is not very helpful in our situation. So, implementation of additional service is not the best solution. It will extend processing time for each cryptographic requests. The other option is to implement synchronization by using mutex. I think mutex is preferable approach, but this feature is also not support by TF-M yet 😊 There is the discussion which I started for mutex : https://lists.trustedfirmware.org/pipermail/tf-m/2021-October/001914.html Thanks, Roman. From: Fabian Schmidt <fabian.schmidt(a)nxp.com> Sent: Tuesday, October 12, 2021 13:47 To: Shebu.VargheseKuriakose(a)arm.com; David.Hu(a)arm.com; Mazurak Roman (CSUKR CSS ICW SW FW) <Roman.Mazurak(a)infineon.com>; mbed-tls(a)lists.trustedfirmware.org Cc: nd(a)arm.com Subject: RE: [TF-M] Adding platform specific functions to Crypto Service. Hi Roman, My understanding is that you would like to add features to the Crypto service API, but the features which you would like to add are not cryptographic in nature. Have you considered creating your own service for those features, instead of modifying the Crypto service? Or is there anything makes this not a viable option? If you are thinking about adding hardware acceleration for some Crypto features, that’s indeed covered in Shebu’s link. Greetings, Fabian Schmidt From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Shebu Varghese Kuriakose via TF-M Sent: Dienstag, 12. Oktober 2021 11:46 To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>>; Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>; mbed-tls(a)lists.trustedfirmware.org<mailto:mbed-tls@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [EXT] Re: [TF-M] Adding platform specific functions to Crypto Service. Caution: EXT Email Hi Roman, I also might not have understood the question completely. As you mention crypto HAL API, here is the specification which defines a standardized mechanism for PSA Crypto implementations to interface with Secure elements and crypto accelerators - https://github.com/ARMmbed/mbedtls/blob/development/docs/proposed/psa-drive…<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.co…> Also adding mbed-tls mailing list as the thread is crypto related.. Regards, Shebu From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of David Hu via TF-M Sent: Tuesday, October 12, 2021 4:18 AM To: Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Adding platform specific functions to Crypto Service. Hi Roman, Are you asking about adding platform specific HAL API to implement PSA Crypto API function? Please correct me if I misunderstand your question. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Roman Mazurak via TF-M Sent: Monday, October 11, 2021 9:45 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] Adding platform specific functions to Crypto Service. Hi all, We would like to add a number of platform specific functions to Crypto Service API. Is it ok if such functions will not be related to cryptographic service, but such approach allows us to optimize platform design? Is there any initiative to create a Crypto Service HAL API to extend Crypto with custom functions? Best regards, Roman.

4 years, 5 months

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TF-M Cadence change proposal

by Anton Komlev

Hello, Following the Tech Forum today I am duplicating the proposal of TF-M cadence change from 4 to 6 months here. This will generate 2 releases a year, planed for the end or March and the end of October starting from v1.6.0. The upcoming release v1.5.0 will stay on planned date. Please share your comments and concerns on the topic. Thanks, Anton

4 years, 5 months

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PSA API crypto test breakage

by Chris.Brand＠infineon.com

Commit 42e77b561fcfe19819ff1e63cb7c0b672ee8ba41 ("Crypto: Remove TF-M Crypto service key handle array") seems to break PSA Arch Crypto test 218 (on PSoC64, with gcc, at least). After this commit, the test reports Failed at Checkpoint: 7 Actual: -137 Expected: -136 (so actual is PSA_ERROR_BAD_STATE and expected is PSA_ERROR_INVALID_HANDLE). That same test passes with the previous commit. Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

4 years, 5 months

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FWU mark TFM image as accepted

by Bohdan.Hunko＠infineon.com

Hi everyone, When studying FWU service I have noticed that there is a function psa_status_t psa_fwu_accept(psa_image_id_t image_id) It is used to mark image as accepted, and it works by writing magic number to image trailer. This function can be used to mark NS or S application as accepted. The first question is: who is responsible for making a call to mark TFM image as accepted ? Is this responsibility of NS application? The second thing I see is write access problem. TFM can receive a call to mark TFM image as accepted, so this means that TFM must have permission to write in its own primary slot. Doesn't this create a possibility for security violation? I can imagine that in ideal world TFM would only have Read and Execute mission for its own primary slot. The only thing that should be able to write to TFM primary slot should be bootloader (it need this functionality to swap images). No one else should be able to write into TFM primary slot. Am I missing something? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

4 years, 5 months

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Technical Forum call - Oct 14

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Oct 14, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years, 5 months

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Mutex in SPE

by Roman.Mazurak＠infineon.com

Hi all, We need a mutex to protect access to a shared resource within Platform RoT Services. Is there any plan to add implementation of mutex in TF-M? Maybe it should be a platform specific implementation? Thanks, Roman.

4 years, 5 months

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TF Open CI FYI

by Don Harbin

Hi all, In a discussion with Anton, it was realized that all contributors may not be aware of some of the information available regarding Open CI. If interested in digging deeper and understanding here are some helpful links. - The Open CI "mini-website" can be found here <https://www.trustedfirmware.org/projects/open-ci/>. - Note in the intro paragraph a hotlink to the *Open CI Lava farm* showing the hardware platforms in the lab, recent test results, etc. Note it requires a login to see all the information - Also of value is a detailed *users guide* that provides an overview of Open CI. You can click on the "docs" icon or just go here <https://tf-ci-users-guide.readthedocs.io/en/latest/>. It's a living document and contributions are encouraged. :) - This page also shares how to get further involved and the location of the code. Best regards, Don

4 years, 5 months

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Adding platform specific functions to Crypto Service.

by Roman.Mazurak＠infineon.com

Hi all, We would like to add a number of platform specific functions to Crypto Service API. Is it ok if such functions will not be related to cryptographic service, but such approach allows us to optimize platform design? Is there any initiative to create a Crypto Service HAL API to extend Crypto with custom functions? Best regards, Roman.

4 years, 5 months

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Enable a peripheral interrupt to an App RoT

by Cristiano Rodrigues

Hi everyone, I am developing an App RoT for STM32L552 and testing the recent integrated FLIH interrupt feature, but I am missing something in the step of "Initializing the Interrupts" and "Integrating the Interrupt Handling Function". As is described in Secure Interrupt Integration Guide <https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/tfm_secu…>, to enable an interrupt it is needed: 1. Binding the interrupt to a Secure Partition. 2. Granting the Secure Partition access permissions to the device of the interrupt. 3. Initializing the interrupt. 4. Integrating the interrupt handling function Step *1 *and *2, * think that is "checked": - by adding this code to the partition manifest file. "mmio_regions": [ { "name": "TFM_PERIPHERAL_TIMER7", "permission": "READ-WRITE" } ], "irqs": [ { "source": "TFM_TIMER7_IRQ", "name": "TFM_TIMER7_IRQ", "handling": "FLIH", } - By defining the macro with platform peripheral structure in *patform/ext/target/stm/common/stm32l5xx/boards/tfm_peripherals_def.h* extern struct platform_data_t timer7 #define TFM_PERIPHERAL_TIMER7 &timer7 - *By assign the peripheral address in platform\ext\target\stm\common\stm32l5xx\secure\target_cfg.c* struct platform_data_t timer7 = { __TIMER7_BASE, __TIMER7_BASE + 0x3FF, -1, -1 }; - By adding the peripheral name to “partition_named_mmio_list[]” in the file *patform/ext/target/stm/common/stm32l5xx/boards/mmio_defs.h* const uintptr_t partition_named_mmio_list[] = { (uintptr_t)TFM_PERIPHERAL_TIMER0, (uintptr_t)TFM_PERIPHERAL_STD_UART, (uintptr_t) TFM_PERIPHERAL_TIMER7, }; - And add to my partition code, the irq function, and the function to configure the timer psa_flih_result_t tfm_timer7_irq_flih(void) { .... } static void flih_test_case_1(psa_msg_t *msg) { psa_irq_enable(TFM_TIMER7_IRQ_SIGNAL); timer_start(); ....... timer_stop(); psa_irq_disable(TFM_TIMER7_IRQ_SIGNAL); psa_reply(msg->handle, PSA_SUCCESS); } My problem, I think, is with the other two steps, *3 *and *4. *The TF-M documentation is not clear in these two steps. In step *3, *as is said in the documentation it is needed: i) to configure the interrupt priority; ii) to ensure that the interrupt targets the Secure State. iii) and save the interrupt information. So I suppose it goes something like this: struct irq_t { void *p_pt; struct irq_load_info_t *p_ildi; } save_tfm_timer7_irq_info; enum tfm_hal_status_t tfm_timer7_irq_init(void *p_pt, struct irq_load_info_t *p_ildi) { //targetting the interrupt to S state NVIC_ClearTargetState(TIM7_IRQn); NVIC_SetPriority(TIM7_IRQn, 1); NVIC_EnableIRQ(TIM7_IRQn); //Saving the Interrupt Information save_tfm_timer7_irq_info.p_pt = p_pt; save_tfm_timer7_irq_info.p_ildi = p_ildi; return TFM_HAL_SUCCESS; } *But in which file should I put this function? And where should I call this function??* And in step *4, *I also do not understand how can I meet this requirement -> "Platforms should call this entry function in the interrupt handlers defined in Vector Table with the saved information for each interrupt." Being the function in question -> *void spm_handle_interrupt(void *p_pt, struct irq_load_info_t *p_ildi).* *Which file can I do this in? And how should I do this step?* Cheers, Cristiano Rodrigues

4 years, 5 months

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Boot shared data TLV length

by Bohdan.Hunko＠infineon.com

Hi everyone, IAS docs have this<https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/services…> note that says: There is a size field tlv_len which has different definitions in the upstream MCUboot repository and in its TF-M forked version: * Upstream MCUboot: Covers only the length of data but not the header size. * TF-M MCUboot: Covers the size of the entry header and the data together. This difference is handled by TF-M code based on which bootloader is used along with TF-M runtime. I was wondering where in code is this difference handled? When calculating next TLV entry address attest_core.c line 213<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/secure_fw/…> takes into account SHARED_DATA_ENTRY_HEADER_SIZE: tlv_curr = (*tlv_ptr) + SHARED_DATA_ENTRY_HEADER_SIZE + tlv_entry.tlv_len; So tlv_entry.tlv_len then must cover only length of entry (without header). This way corresponds to: "Upstream MCUboot: Covers only the length of data but not the header size" I was not able to find anything related to "TF-M MCUboot: Covers the size of the entry header and the data together". Is this difference handled in TF-M fork of MCUboot or is it just outdated IAS doc? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

4 years, 5 months

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Problem with PSoC armclang build

by Chris.Brand＠infineon.com

Hi, We've been investigating a problem with the armclang builds for PSoC. The symptoms are that the board just repeatedly reboots. We've narrowed it down to commit 300c68da11 "SPM: Use Main Stack for initialization". This commit is fine with the gcc toolchain but doesn't seem right for armclang (we haven't yet looked at IAR). Still digging into the issue, but I figured it might be helpful to give it more publicity. Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

4 years, 5 months

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nxp/lpcxpresso55s69 builds broken

by Thomas Törnblom

While verifying that my Musca B1/S1 fixes for IAR did not break other targets I ran into building problems for the nxp/lpcxpresso55s69 for both gnuarm and iararm. I've tested with the following cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=nxp/lpcxpresso55s69 "-DTFM_TOOLCHAIN_FILE=..\toolchain_GNUARM.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DTFM_PSA_API=ON -DBL2=OFF Fails with: d:/apps/gnuarm/10-2020-q4-major/bin/../lib/gcc/arm-none-eabi/10.2.1/../../../../arm-none-eabi/bin/ld.exe: C:\Users\thomasto\Projects\tf-m12\trusted-firmware-m\gnuarm/../secure_fw/spm/ffm/psa_api.c:890: undefined reference to `tfm_hal_irq_disable' I notice that tfm_hal_irq_disable() is guarded by: #if TFM_LVL == 3 in .../nxp/common/tfm_hal_isolation.c, while the other targets does not have this guard. What isthe reason for that? Trying to set that with cmake causes other failures. commit 8444011d works commit 4051016f fails I tried bisecting between these two commits, but the builds run into other build failures so I gave up on that. Is his a known issue? I have successfully built and run regression tests on musca b1, musca s1, psoc64 and I have built, but not run an519, an521, an524 Cheers, Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com <mailto:thomas.tornblom@iar.com> Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 5 months

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[PLATFORM ATTENTION REQUIRED] Partition interrupt binding patches have been merged

by Ken Liu

Dear platform owners, Theses interrupt binding patch(es) are merged: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11474 As the most part of the change happen in platform, please report platform integration if you met. Sorry I had thought the notification mail has been sent during the PR stage but it did not, hence it is not broadcasted in time. Current there are build errors reported on nxp/nordic platforms, and this patch should fix the problem: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11741 Also, Ci reported arch-test build fail, hence the fix for arch-test is here: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11742 Feel free to put comments and I will update them later, or just update the patch if it is quick for you, add your name into the author in commit message. You also can create standalone patches if you change is not covered by mentioned patches. Thanks. /Ken

4 years, 5 months

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Enablement of external bl2 builds

by Bohdan.Hunko＠infineon.com

Hi everyone, When adding support for new platform we ran into an issue with BL2 variable. In our architecture we have Bootloader based on MCUboot (aka BL2) but we are not planning to build it with TF-M. Bootloader would be separate repo and be built separately. So we need the way to build TF-M with FWU service and shared data definitions when BL2=OFF. I was trying to add support for this but was not able to do this because build structure is quite complicated. Does anyone have ideas or suggestions about the way we can implement this feature? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

4 years, 5 months

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Technical Forum call - Sep 30

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Sep 30, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years, 5 months

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[IMPORTANT: PLATFORM BUILD ISSUE] [REQUIRE PLATFORM ACK] RE: [Request Platform Support] Abstracted MMIO HAL

by Ken Liu

Hi everyone, Being notified by some platform vendors that platforms build breaks in MASTER branch (releases are working well and not affected) due to not integrate with the latest HAL change: The reference link: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 And these platforms reported build break: Nordic NXP Because of bandwidth issues, we can’t maintain all the platform sources, hence require upstreamed platform owners to take a look at their platform builds and runs ok, and integrate with the updated HAL if it does fail. Please reply to this thread if there are problems and I have created one ticket for tracking this if replying in a thread is more convenient for you: https://developer.trustedfirmware.org/T967 Sorry for the inconvenience made, I should warn all the platform owners in earlier mails – I will validate the build again later in Oct to see if there are still platform breaks and contact the platform code owners to discuss plans. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Friday, September 17, 2021 3:06 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL The MMIO binding patch set are all merged, assume this will simplify the SPM integration much. Follow up fixups will be created if missing comments reported. Anyway, all platform patches are not blocked anymore, feel free to merge the reviewed and CI passed patches. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Friday, September 3, 2021 1:27 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL Hi, Another reminder to mention the MMIO binding patches. Several platforms are changed to pass the CI, please platform owners to review the patches, such as: PSOC: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 STM: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11186 Some of other platform patches are created as well. This is a significant change for platform which helps much easier integration. After the first series of patches, the problems not covered by the CI need to be fixed adhoc. Please read the tech forum topic on 2nd Sep for more details or you can just scroll down to check the previous content. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Monday, August 30, 2021 5:18 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL The patchset has updated and now CI passed okay: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Thursday, August 19, 2021 2:16 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] [Request Platform Support] Abstracted MMIO HAL Hi everyone, The existing HAL interface for isolation hardware is not unified, we have to call several interfaces to setup isolation boundaries. Hence, a deeper abstracted interface are provided. Here are the details: - It assumes the hardware resources usages are decided by system designer. Hence there are couple of listed hardware data in the platform code, now most of them are defined in C sources. - When a partition is referencing peripheral (represented as MMIO in FFM), the manifest tooling would link specified resources with the data defined in platform. Now it is using a naming pattern, to let the partition found the resources defined above (now it uses linker to do this). - A HAL API 'tfm_hal_bind_partition' is called when a partition runtime structure is created. This API tells partition info to platform, let platform return an encoded 'p_boundaries' for SPM binding partition with platform. - When boundaries related operations happen in future, SPM would delivery this 'p_boundaries' back to platform, let platform perform boundary setup and check, such as boundary switch or memory check. SPM won't care about the hardware specific settings any more, such as privilged, non-secure/secure and how many MMIO the partition claimed, even the MPU/MPC/PPC things. - Resources defined in platform sources but not referenced would be stripped by toolchain flag. Resources not defined but referenced by partition would generate a linker error, as symbol can't be resolved. We created a patch to showcase the usage on AN521: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 This patch applies a simple encoding for all isolation levels. You can check how the p_boundaries is used under different isolation levels. Platform can use other encoding mechanism if applicable. Now come to the request: Please review this patch, and port similar HAL API into your platform. We are maintaining the default platforms such as AN521, AN519 and MUSCA_B1, but it need so much effort on port to all the platforms. Current CI cannot pass on this patch (as it contains modification for one platform only), our first goal is to let CI pass build on all checked platforms, and then please platform owner ensures it works on your platform. Any feedbacks are welcome. Thank you very much! /Ken -- TF-M mailing list TF-M(a)lists.trustedfirmware.org<mailto:TF-M@lists.trustedfirmware.org> https://lists.trustedfirmware.org/mailman/listinfo/tf-m

4 years, 5 months

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NSID improvement patches are in review

by David Wang

Hi, Believe you still remember I shared the non-secure client ID management update in tech forum<https://www.trustedfirmware.org/meetings/tf-m-technical-forum/> a few months ago (slides<https://www.trustedfirmware.org/docs/Non_Secure_Client_ID_management_update…>, video<https://linaro-org.zoom.us/rec/share/k7vJnf8qcugoRNxu5hRSyc0thzSTbTT295ZLyy…> (passcode: dqHBI$2z)). The patches and document are available in tf.org for public review. The integration reference and test suite are also provided. If you're using SPM to manage the NSID (fixed `-1` for all NS connections) which is the default option (`TFM_NS_CLIENT_IDENTIFICATION` is OFF), then it basically won't affect you (if you don't play with `TFM_NS_CLIENT_IDENTIFICATION` flag which is changed). NSCE (non-secure client extension) module is introduced to manage the non-secure context in TF-M which includes the NSID as a member. If you have a requirement to support different NSIDs for NS tasks, then it's for that purpose. Patches: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11288 (add non-secure context management) https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11289 (add NSCE interface API) https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11616 (Doc) https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11294 (Add NSCE support in nspm and build system) RTOS integration reference (based on RTX): https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11290/ (NSID manager example) https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11291/ (TZ API to NSCE API shim layer) A test suite is added. Tip of the test cases: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11659/ Welcome to comment. Thanks. Regards, David Wang ARM Electronic Technology (Shanghai) Co., Ltd Phone: +86-21-6154 9142 (ext. 59142)

4 years, 5 months

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Proposal to separate vendor components

by Roman.Mazurak＠infineon.com

Hi all, The goal of this proposal is to separate TF-M core and platform code to simplify development and support. Take, for example, the Cypress PSoC 64 platform, we see that a significant amount of code can be committed into the repository. For end user perspective, it doesn't seem logical that project source tree has a lot of irrelevant stuff. It complicates a performance of IDE, searching and analyzing a code. Pros : Platform support can be provided separately without the need to upgrade outdated platforms or problematic platforms : https://lists.trustedfirmware.org/pipermail/tf-m/2021-January/001454.html https://developer.trustedfirmware.org/w/collaboration/project-maintenance-p… It should help to avoid or at least to minimize number of patches that requires fixes in platform folders : https://lists.trustedfirmware.org/pipermail/tf-m/2019-April/000162.html Reduces the amount of work for core team by delegating promotion of a new API support to vendors : https://lists.trustedfirmware.org/pipermail/tf-m/2019-November/000506.html Proposed solution : There are other projects that face a similar situation, for example OpenWRT, Yocto, Android. Their common feature is that they have many dependencies. The solution they propose is based on the fact that these projects have their own build infrastructure. The user's task is to create a configuration in which you can add your own components. In its current state, the TF-M already has some tools to implement platform as an external dependency. The user can specify the path to the platform using the TFM_PLATFORM variable. There is also work underway to implement support of external test infrastructure. (https://lists.trustedfirmware.org/pipermail/tf-m/2021-September/001824.html). There is a need to add support of external secure partitions instead of current solution (https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/services…). I can't say if this issue is directly related to the platform, but it's possible that it will give more opportunities to vendors or will be a useful tool for adding new platforms. The last question that needs to be addressed is how to link the sources supplied by vendors (platforms or security partitions) to the TF-M sources. Using the git submodule mechanism probably is not a good solution. There are two options : 1. Platforms, security partitions and test-suits will be listed as a submodule in the TF-M tree. But this approach will not actually solve the main problem of delegating more responsibility to vendors and breaking the connection between the vendors component and TF-M. 2. The TF-M source tree will be specified as a submodule in modules supplied by vendors. In this case we will have more problems. Because if the user's project will use two or more vendor components (for example, platform and custom security partitions), then TF-M will be mentioned more than once and it is quite possible to have several different revisions of TF-M. So, it will be impossible to properly assemble the project. Therefore, I see the use of the following approach as an alternative : 1. External components check the TF-M version using the TFM_VERSION variable. 2. A project that uses TF-M, as well as the necessary components (platforms, external security partitions, vendor / project test suites) specifies dependencies using any method. The simplest way is to commit TF-M and vendor components as submodules in the user project. 3. Paths to all dependencies should be transferred from the project to necessary parts of TF-M via CMake variables. This should be equally convenient for platforms vendors, TF-M components vendors, and TF-M end users. Risks : If the project assembled by end user will use several vendor modules (for example platform and custom security partitions). It is possible that the TF-M version required by different vendors modules will be different. But this problem is present at the moment, because any significant change to the TF-M API generates many problems that need to be solved for all supported platforms (mentioned in the pros). Any feedbacks are welcome. Best regards, Roman

4 years, 5 months

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Request Access To a Board Peripheral for a App RoT - Problem

by Cristiano Rodrigues

Hi everyone, I'm trying to access an STM32L552 peripheral in a RoT APP (tf-m isolation v1.4 Level 2), but I'm having trouble doing that. I know that I have to request the peripheral in the YAML file of my partition's manifest, but that request didn't work for me. I filled the required campus and couldn't get access to the peripheral. I'm requesting the peripheral by putting this piece of code in my partition manifest YAML file. Am I missing something? ..... "mmio_regions" : [ { "name": "TFM_PERIPHERAL_TIMER0", "permission": "READ-WRITE" } ...... Another thing, I am only able to request the TIMER0 and UART peripherals? If I want to access other timers, e.g., TIMER 6 or TIMER 7, am I not allowed to do so? Cheers, Cristiano

4 years, 5 months

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[Ask for review] FPU support in TF-M

by Feder Liang

Hi, All Patches for FPU support in TF-M are ready for review now. Looking for your comments! FPU here refers to Float-point unit for Arm-M profile architecture. 1. FPU support in TF-M * Support platforms: all platforms with FPU available. Current patches are developed on arm musca_s1 board as example. * After necessary settings in TF-M, it is configurable that FPU can be enabled in SPE or NSPE, or both sides. System developer can activate FPU feature on a platform by setting those flags in CMake command line. i. Enable FP in secure side: -DTFM_SYSTEM_FP= 0-software, 1-hybird, 2-hardware ii. Enable FP in non-secure side: -DTFM_SYSTEM_FP_NS= 0-software, 1-hybird, 2-hardware Also lazy stacking feature can be enabled/disabled in SPE or NSPE separately. iii. Enable lazy stacking in secure side: -DTFM_LAZY_FP=ON iv. Enable lazy stacking in non-secure side: -DTFM_LAZY_FP_NS=ON * The secure service developer/application developer does need to know the FPU setting details, they can just compile their program with proper toolchain flags to take advantage of FPU. The tested toolchains are: GNU Arm embedded toolchain and Arm Compiler. Other toolchain has FPU support should also work but needs test report from partners. Three floating-point Application Binary Interface (ABI) types of mentioned toolchain are tested: software, hybrid, and hardware option. * Support isolation level 1,2,3. * FPU needs to be available in your platform if you want to take the advantage of a hardware FPU. Please check your platform hardware specification whether FPU is available. Also need to check specification of toolchain whether the FPU architecture of your platform is supported. FPU architecture can be specified by -DTFM_FP_ARCH in CMake command line. 1. Notes: * As FF-M alignment is one of our design goals, it only supports IPC partitions at current stage. * The security mechanism is designed based on ARMv8-M Mainline and later. * To simplify the scenarios, we defined several guidelines that no involving FPU usage inside an interrupt handler, including deprivileged handler in one Partition. This can be fine-tuned later if there are requirements that insists a FPU support in handler mode. * In general, FPU is commonly available on a Armv8.0-M mainline. Please check your platform specification and report exception cases if seen. 1. For the VLLDM instruction security vulnerability of FPU, to mitigate this security vulnerability, it is required to recompile the secure image with compilers that has the software workaround implemented. For more information, please check https://developer.arm.com/support/arm-security-updates/vlldm-instruction-se…. 1. Those patches will be merged in 4-6 weeks if there is no big issue found. tf-m repo: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11688 FP context protection https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11689 Add FPU support for gnu arm embedded toolchain https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11690 Configure non-secrue timer for FPU test https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11691 Add FPU support design document https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11692 Output support for FP numbers https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11693 FPU support for Armclang compiler tf-m-tests repo: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11684 Add FPU support https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11685 Adding FPU test cases https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11686 Adding FPU non-secure interrupt test case https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11687 Printf support for FP numbers Best Regards Feder

4 years, 5 months

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Outdated file location in FWU doc

by Bohdan.Hunko＠infineon.com

Hi everyone, While reading FWU service doc<https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig…> I found that Components paragraph<https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig…> contain table which says that tfm_bootloader_fwu_abstraction.h file is located in ./secure_fw/partitions/firmware_update/tfm_bootloader_fwu_abstraction.h , but it TF-M repo it is located in secure_fw\partitions\firmware_update\bootloader\tfm_bootloader_fwu_abstraction.h. Minor thing, but still worth fixing. Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

4 years, 5 months

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Trouble building Musca S1 with IAR

by Thomas Törnblom

I'm working on adding IARARM as a toolchain for the Musca S1 (and B1) and I'm running into an issue where the NS image can not properly access the UART. The NS code loops trying to check the UART status @0x40102030, which holds the value 0x301, as can be seen with the debugger and also from the secure code, but when read by the NS code it returns 0, with no error. As this code works when building with ARMCLANG and GNUARM, I assume there is some memory protection that gets incorrectly setup when I build with the IAR toolchain, but I'm struggling to find where this gets setup. I assume it is done in the secure image. Any hints where i should be looking? Thanks, Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com <mailto:thomas.tornblom@iar.com> Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 5 months

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Re: [TF-M] Supporting encryption with ITS

by Fabian Schmidt

Hi George, I'm wondering if that would add value. To my understanding, ITS was never designed to be encrypted because of the way it's supposed to be set up. (It's Internal Trusted Storage.) I believe best practice is to place it in a "trusted" location, one that is ideally only accessible from Secure world, and also ideally on-die. If you then restrict outside access to the internal flash (JTAG, flash programmer ports,.), you're pretty golden, in that no unauthorized party should be able to read from or write to the ITS.* Let me know if I misunderstand anything about ITS or TrustZone, but that's my view. Maybe I'm painting an idealized picture. Greetings, Fabian Schmidt * at least short of a sophisticated physical attack or finding some loophole in TrustZone. From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Vasilakis, Georgios via TF-M Sent: Donnerstag, 23. September 2021 15:28 To: tf-m(a)lists.trustedfirmware.org Subject: [EXT] [TF-M] Supporting encryption with ITS Caution: EXT Email Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

4 years, 5 months

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TF-M v1.4.1 hotfix have been released

by Anton Komlev

Hello, Please be informed about the update v1.4.1 containing a hotfix for a vulnerability found in v1.4.0. The vulnerability exists in Profile Small only so please update to v1.4.1 version if you are currently using TF-M v1.4.0 and Profile Small. The detailed security advisory will be provided later. Best regards, Anton

4 years, 5 months

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Re: [TF-M] Supporting encryption with ITS

by Vasilakis, Georgios

Thank you both for the input! Andrej, you are correct that right now PS == Encrypted ITS but my understanding of the spec tells me that this will not always be the case. They do refer to platforms that will use external storage for PS (even though they still require ITS even in this case indeed). And just to clarify, I don't propose creating yet another ITS. The second thought that I had regarding the refactoring is mainly a common library that both ITS and PS can use for object handling. Fabian, I also understand it similarly, the ITS is supposed to be trusted on-chip storage which is more protected than PS. And the isolation from TrustZone in normal circumstances should be adequate (at the moment). But physical attacks these days are not that sophisticated anymore, and I think that this is the main driving force for this requirement. Regards, George ________________________________ From: Fabian Schmidt Sent: Thursday, September 23, 2021 3:50 PM To: Vasilakis, Georgios Cc: tf-m(a)lists.trustedfirmware.org Subject: RE: [TF-M] Supporting encryption with ITS Hi George, I’m wondering if that would add value. To my understanding, ITS was never designed to be encrypted because of the way it’s supposed to be set up. (It’s Internal Trusted Storage.) I believe best practice is to place it in a “trusted” location, one that is ideally only accessible from Secure world, and also ideally on-die. If you then restrict outside access to the internal flash (JTAG, flash programmer ports,…), you’re pretty golden, in that no unauthorized party should be able to read from or write to the ITS.* Let me know if I misunderstand anything about ITS or TrustZone, but that’s my view. Maybe I’m painting an idealized picture. Greetings, Fabian Schmidt * at least short of a sophisticated physical attack or finding some loophole in TrustZone… From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Vasilakis, Georgios via TF-M Sent: Donnerstag, 23. September 2021 15:28 To: tf-m(a)lists.trustedfirmware.org Subject: [EXT] [TF-M] Supporting encryption with ITS Caution: EXT Email Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

4 years, 5 months

1
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