March 2019 - TF-M - lists.trustedfirmware.org

Re: [TF-M] Trusted boot - rollback protection

by David Brown

On Mon, Mar 11, 2019 at 01:43:19PM +0000, Tamas Ban via TF-M wrote: >Please see the following link for a design proposal on anti-rollback protection in trusted boot: > >https://developer.trustedfirmware.org/w/tf_m/design/trusted_boot/rollback_p… Somewhat related, as I've been working through a prototype implementation of SUIT, the SUIT manifest also wants what they call a "sequence number", which is a monotonically increasing number associated with each version. They've kind of decided they don't want to have to do anything like semantic version parsing as part of the firmware upgrade. I think this sequence number serves the same purpose as this security counter (except that the sequence number is required to increase with each software relase). One of the goals of the MCUboot community is to make sure that however the SUIT manifest is implemented, it must be semantically the same as the existing TLV-format manifest. An easy solution is to just treat the existing version as a 32-bit number (ignoring the build-id, which I think is supposed to be the case, anyway). As far as the possibility of re-using the same security counter value, I don't think that is something that should be done. In general, it isn't possible to know where security bugs will be found in an image. If we always increase the security counter value, someone still running the immediately following image will be prevented from rolling back to the version with the security flaw, whereas if we reused the values, it might be necessary to try to force them to upgrade to a new version that has the counter increased. Also, I think it is important to clarify that the security counter is not required for anti-rollback, it only protects the anti-rollback implementation from a specific threat: something that is able to replace the primary firmware image outside of the control of the bootloader. The cost is that implementing a security counter generally requires specific hardware just for that purpose. An entirely software anti-rollback protects against other threats, including the common case of using the ordinary firmware upgrade process. David

4 years, 11 months

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[twin-cpu]Dual core communication design document for review

by David Hu (Arm Technology China)

Hi all, I've posted a design document for dual core communication in twin cpu project. Could you please review it at https://developer.trustedfirmware.org/w/tf_m/design/twin-cpu/communication_… Any comment is welcome. Thank you. Best regards, Hu Ziji

5 years

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Re: [TF-M] [EXTERNAL] Re: Please explain tfm_register_client_id() use case

by DeMars, Alan

Yes, that idea would resolve the problem. I’m not sure I understand the use case for multiple updates to a context’s client Id. What is the thought behind that? Alan > On Mar 28, 2019, at 2:23 AM, Miklos Balint via TF-M <tf-m(a)lists.trustedfirmware.org> wrote: > > Alan, > > You are absolutely right that registering client ID should normally be done once, preferably right after AllocModule. > > The current design allows multiple updates to be made, and for this to be possible, we identify the one to be updated by it being the active one. > > I do see an opportunity to extend this so that the last NS context to be Allocated can also be assumed to be the target of a registration in lieu of the active context if there isn't one. > This way we keep the option to update ID when a context is active while also allow an easy and low overhead registration for the context that's latest to have been Allocated. > > Is this an acceptable amendment? > > Regards > Miklos > > -----Original Message----- > From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of DeMars, Alan via TF-M > Sent: 26 March 2019 00:00 > To: tf-m(a)lists.trustedfirmware.org > Subject: [TF-M] Please explain tfm_register_client_id() use case > > As currently specified, I don't see a simple way to invoke the tfm_register_client_id() API ONLY ONCE for each NS client thread. > > It appears that tfm_register_client_id() must be called after TZ_LoadContext_S() because the clientId provided by tfm_register_client_id() is always associated with the CURRENT NS MemoryId. > > However, TZ_LoadContext_S() is designed to be called only when the NS OS actually switches to a new NS thread. This creates pressure for tfm_register_client_id() to be called during a NS thread switch. However, calling tfm_register_client_id() on EVERY NS context switch is redundant and CPU wasteful. Adding code to test whether tfm_register_client_id() has already been called for a particular NS thread also seems wasteful. > > What seems natural to me is to add a MemoryId argument to tfm_register_client_id() so that the clientID can be mapped to the MemoryId provided by TZ_AllocModuleContext_S() right after TZ_AllocModuleContext_S() is called (ie only once). > > Please correct my understanding of how tfm_register_client_id() is intended to be used if the above analysis is off base. > > Alan > > > -- > TF-M mailing list > TF-M(a)lists.trustedfirmware.org > https://lists.trustedfirmware.org/mailman/listinfo/tf-m > -- > TF-M mailing list > TF-M(a)lists.trustedfirmware.org > https://lists.trustedfirmware.org/mailman/listinfo/tf-m

5 years

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Re: [TF-M] [RFC] twin cpu bootloader design document

by David Hu (Arm Technology China)

Hi Chris, Sorry for the delayed reply. Please check my comments in below. Just about small details. Please correct me if I misunderstand anything. 1. In my own opinion, it can be possible to use IPC to synchronize mailbox services between two cores, during initialization. The synchronization is only trigged when the mailbox mechanism is ready on mailbox server or client. It means that the IPC module should be also configured. Based on the above assumption, using IPC to synchronize the two cores is more generic and convenient than accessing shared memory. If using shared memory to pass status flag, it can be necessary to adjust the address of the shared memory occasionally according to the memory assignment in different applications. 2. I'd like to suggest that we shall discuss more about when the booting HAL APIs are invoked in TF-M. `tfm_core_init()` initializes the TF-M core. Thus in theory, `tfm_core_init()` is irrelevant to the system topology or platform implementations. As a result, IMO, it can be more reasonable to put the HAL APIs outside the `tfm_core_init()`. 3. ` tfm_spm_hal_wait_for_ns_cpu_ready()` can be optional. The secure core acts as a server and it is driven by the request from NS core. The secure core actually doesn't have to wait for an explicit signal to know NS is ready. The synchronization can be guaranteed if NS core starts request via mailbox only after secure core is available. 4. It can be unnecessary to require calling `tfm_spm_hal_wait_for_s_cpu_ready()` in NS `main()`. It might be too early to wait in `main()` and may block other initializations which don't rely on mailbox. This API can be invoked in mailbox functionalities. The whole NS initialization can continue, including enabling application threads, until a NS application requests Secure services via mailbox at the very first time. Thus the whole dual core design can be more generic since the mailbox workflow should be identical on diverse platforms. And we can save the time and effort to hack each RTOS initialization. In other words, I wonder if we can make calling `tfm_spm_hal_wait_for_s_cpu_ready()` in NS `main() as an option and allow other implementations. Thank you. Best regards, Hu Ziji -------------------------------------------------------------------------------------------------------------- Date: Thu, 14 Mar 2019 18:50:56 +0000 From: Christopher Brand <chris.brand(a)cypress.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Subject: [TF-M] [RFC] twin cpu bootloader design document Message-ID: <BYAPR06MB5301EBF02F4C0B60A9BB7742FE4B0(a)BYAPR06MB5301.namprd06.prod.outlook.com> Content-Type: text/plain; charset="us-ascii" Hi, I've posted a design document for bootloader changes to support twin cpu at https://developer.trustedfirmware.org/w/tf_m/design/twin-cpu/bootloader/ Comments appreciated! Thanks, Chris

5 years

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proposed change in Musca B1

by Tamas Kaman

Hi All, I'd like to notify everyone about a proposed change in Musca B1 platform in TF-M. Everyone who is using that platform might be affected. The code on Musca B1 is currently running from the external QSPI flash. With the coming change this moves to a much faster internal embedded Flash, so all you might observe is faster code execution. Link to review: https://review.trustedfirmware.org/#/c/trusted-firmware-m/+/669/ Also, for loading the image to the a board another version of DAPLink FW will be needed. The eFlash type DAPLink FW can be downloaded from Arm Community page: https://community.arm.com/developer/tools-software/oss-platforms/w/docs/425… A short description of how to update the DAPLink FW can be found here as well. Thanks, Tamas IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

5 years

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Re: [TF-M] Please explain tfm_register_client_id() use case

by Miklos Balint

Alan, You are absolutely right that registering client ID should normally be done once, preferably right after AllocModule. The current design allows multiple updates to be made, and for this to be possible, we identify the one to be updated by it being the active one. I do see an opportunity to extend this so that the last NS context to be Allocated can also be assumed to be the target of a registration in lieu of the active context if there isn't one. This way we keep the option to update ID when a context is active while also allow an easy and low overhead registration for the context that's latest to have been Allocated. Is this an acceptable amendment? Regards Miklos -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of DeMars, Alan via TF-M Sent: 26 March 2019 00:00 To: tf-m(a)lists.trustedfirmware.org Subject: [TF-M] Please explain tfm_register_client_id() use case As currently specified, I don't see a simple way to invoke the tfm_register_client_id() API ONLY ONCE for each NS client thread. It appears that tfm_register_client_id() must be called after TZ_LoadContext_S() because the clientId provided by tfm_register_client_id() is always associated with the CURRENT NS MemoryId. However, TZ_LoadContext_S() is designed to be called only when the NS OS actually switches to a new NS thread. This creates pressure for tfm_register_client_id() to be called during a NS thread switch. However, calling tfm_register_client_id() on EVERY NS context switch is redundant and CPU wasteful. Adding code to test whether tfm_register_client_id() has already been called for a particular NS thread also seems wasteful. What seems natural to me is to add a MemoryId argument to tfm_register_client_id() so that the clientID can be mapped to the MemoryId provided by TZ_AllocModuleContext_S() right after TZ_AllocModuleContext_S() is called (ie only once). Please correct my understanding of how tfm_register_client_id() is intended to be used if the above analysis is off base. Alan -- TF-M mailing list TF-M(a)lists.trustedfirmware.org https://lists.trustedfirmware.org/mailman/listinfo/tf-m

5 years

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Re: [TF-M] SYSTICK ownership

by Ken Liu (Arm Technology China)

Hi Alan, Sorry for the late response - the secure IRQ patches are on the way but currently we don't have scenarios for this case. We would create a ticket for tracking this question and let's collect comment there. And, this topic sounds like a timer requirement, so can you tell the actual user scenario? For example, would there still be requirements of using SYSTICK in secure partition if some timer things is available? Thanks. -Ken -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of DeMars, Alan via TF-M Sent: 19 February 2019 02:47 To: Ken Liu (Arm Technology China) <Ken.Liu(a)arm.com<mailto:Ken.Liu@arm.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] SYSTICK ownership My concern was the value one would provide for the "line_num" field within the manifest. The SYSTICK uses vector 15 which I believe would correspond to "line_num" = -1. I'm not sure the design accommodates negative line_nums. Also, disabling the SYSTICK interrupt while servicing its interrupt can't be handled in the normal way user IRQs are disabled. Special case code would be required in the SPM to support the SYSTICK as a secure partition interrupt. Alan -----Original Message----- From: TF-M [mailto:tf-m-bounces@lists.trustedfirmware.org] On Behalf Of Ken Liu (Arm Technology China) via TF-M Sent: Monday, February 18, 2019 5:34 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd Subject: [EXTERNAL] Re: [TF-M] SYSTICK ownership Hi Alan, >From your description, it looks like you want to use secure SYSTICK as an interrupt for Secure Partition, is this correct? In this case, it is similar to the secure interrupt usage. Since the interrupt handling is under developing, I will add a note in the task to remind how we could add SYSTICK as an interrupt in the manifest. BR -Ken > -----Original Message----- > From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of > DeMars, Alan via TF-M > Sent: Saturday, February 16, 2019 7:02 AM > To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> > Subject: [TF-M] SYSTICK ownership > > If not used anywhere else, can a Secure Partition own the secure > SYSTICK timer and its interrupt? > If so, how is it specified in the SP manifest? > > Alan > -- > TF-M mailing list > TF-M(a)lists.trustedfirmware.org<mailto:TF-M@lists.trustedfirmware.org> > https://lists.trustedfirmware.org/mailman/listinfo/tf-m

5 years

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Re: [TF-M] TFM Core regression tests

by Andrej Butok

Hi Mate, OK. It's good to know that this is the known issue. I will wait for a final review and merge. Thanks, Andrej -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Mate Toth-Pal via TF-M Sent: Wednesday, March 27, 2019 2:45 PM To: TF-M(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] TFM Core regression tests Hi Andrej, Yes, on the master branch this is a limitation. I already have a few patches on review to fix this: https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr… https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr… They are most probably going to be merged with the secure IRQ handling commits. You can also cherry pick those for yourself for testing purposes, there should be no conflict, as it is quite independent from the parent commits on review. Regards, Mate -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Andrej Butok via TF-M Sent: 27 March 2019 14:32 To: TF-M(a)lists.trustedfirmware.org Subject: [TF-M] TFM Core regression tests Hello We are trying to enable & compile TFM Core tests. But it looks like they are only for MPS2 platform: 1) tfm_ss_core_test.c: .... #include "smm_mps2.h" ... static psa_status_t test_peripheral_access(void) { struct arm_mps2_fpgaio_t *fpgaio = SEC_MPS2_FPGAIO; ... etc. 2) tfm_partition_list.inc ... #ifdef TFM_PARTITION_TEST_CORE ... PARTITION_ADD_PERIPHERAL(TFM_SP_CORE_TEST, TFM_PERIPHERAL_FPGA_IO); #endif /* TFM_PARTITION_TEST_CORE */ ... What do you suggest ? What is the plan? Should we to skip/ignore the TFM Core regression tests now? Thanks Andrej Butok SW Tech Lead Security & Connectivity, Microcontrollers NXP Semiconductors -- TF-M mailing list TF-M(a)lists.trustedfirmware.org https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.tru… -- TF-M mailing list TF-M(a)lists.trustedfirmware.org https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.tru…

5 years

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Re: [TF-M] TFM Core regression tests

by Mate Toth-Pal

Hi Andrej, Yes, on the master branch this is a limitation. I already have a few patches on review to fix this: https://review.trustedfirmware.org/#/c/trusted-firmware-m/+/693/10 https://review.trustedfirmware.org/#/c/trusted-firmware-m/+/683/11 They are most probably going to be merged with the secure IRQ handling commits. You can also cherry pick those for yourself for testing purposes, there should be no conflict, as it is quite independent from the parent commits on review. Regards, Mate -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Andrej Butok via TF-M Sent: 27 March 2019 14:32 To: TF-M(a)lists.trustedfirmware.org Subject: [TF-M] TFM Core regression tests Hello We are trying to enable & compile TFM Core tests. But it looks like they are only for MPS2 platform: 1) tfm_ss_core_test.c: .... #include "smm_mps2.h" ... static psa_status_t test_peripheral_access(void) { struct arm_mps2_fpgaio_t *fpgaio = SEC_MPS2_FPGAIO; ... etc. 2) tfm_partition_list.inc ... #ifdef TFM_PARTITION_TEST_CORE ... PARTITION_ADD_PERIPHERAL(TFM_SP_CORE_TEST, TFM_PERIPHERAL_FPGA_IO); #endif /* TFM_PARTITION_TEST_CORE */ ... What do you suggest ? What is the plan? Should we to skip/ignore the TFM Core regression tests now? Thanks Andrej Butok SW Tech Lead Security & Connectivity, Microcontrollers NXP Semiconductors -- TF-M mailing list TF-M(a)lists.trustedfirmware.org https://lists.trustedfirmware.org/mailman/listinfo/tf-m

5 years

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TFM Core regression tests

by Andrej Butok

Hello We are trying to enable & compile TFM Core tests. But it looks like they are only for MPS2 platform: 1) tfm_ss_core_test.c: .... #include "smm_mps2.h" ... static psa_status_t test_peripheral_access(void) { struct arm_mps2_fpgaio_t *fpgaio = SEC_MPS2_FPGAIO; ... etc. 2) tfm_partition_list.inc ... #ifdef TFM_PARTITION_TEST_CORE ... PARTITION_ADD_PERIPHERAL(TFM_SP_CORE_TEST, TFM_PERIPHERAL_FPGA_IO); #endif /* TFM_PARTITION_TEST_CORE */ ... What do you suggest ? What is the plan? Should we to skip/ignore the TFM Core regression tests now? Thanks Andrej Butok SW Tech Lead Security & Connectivity, Microcontrollers NXP Semiconductors

5 years

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TF-M March 2019