- TF-A - lists.trustedfirmware.org

Trusted Firmware-A LTS v2.10.30 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.30 is now available. This release contains the following patches: 24a8b776b fix(cpus): correct CVE-2024-7881 workaround and drop duplicate erratum [1] 92e6fba58 fix(cpus): remove C1-Ultra erratum 3651221 [2] 87424d940 fix(cpus): workaround for Cortex-A65AE erratum 1638571 [3] aa593870f fix(cpus): workaround for Cortex-A76 erratum 1165347 [4] 319df17be fix(cpus): workaround for Cortex-A76 erratum 1207823 [5] 89cc4cd9b fix(cpus): update revisions for Cortex-A76 erratum 1946160 [6] 3a466bf50 fix(cpus): reorder docs for Cortex-A76 erratum 1165522 [7] cdc2b3ef5 fix(cpus): correct comments for Cortex-A720 erratum 3711910 [8] [1] https://review.trustedfirmware.org/q/I6207c49486e4020f34c862ad40ec3137bd368… [2] https://review.trustedfirmware.org/q/If7ea433e4614f92333e788e3f6b366db22c92… [3] https://review.trustedfirmware.org/q/I861230de94a105fd52f9c8ef7e7551a2633c0… [4] https://review.trustedfirmware.org/q/If9817dc26d0df835d749f506de63a4f613735… [5] https://review.trustedfirmware.org/q/Ife06401f3946884872b733f98c08e61f586d8… [6] https://review.trustedfirmware.org/q/I532ce10c3037dd77e31d7df849beb578f8b5e… [7] https://review.trustedfirmware.org/q/I2e7c05d6355dfbaa69170fc098adc1f12edc6… [8] https://review.trustedfirmware.org/q/I8b070927c19c5982b2ded815e7673e0c4ff11… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.30/change-log.html Thanks, TF-A LTS team

3 months, 2 weeks

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Trusted Firmware-A LTS v2.12.10 Release Announcement

by svc_openci_enginfra＠arm.com

3 months, 2 weeks

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Re: Unable to build the ZynqMP platform with armclang when ENABLE_LTO=1.

by Taticharla, Venkata Sai

[AMD Official Use Only - AMD Internal Distribution Only] Hi Boyan, Applied the patch shared by you,and the -flto-partition error is now resolved. However, this exposes a new set of issues during the link stage related to assembly function call Trimmed out the linker error log : (.text.asm.bl31_entrypoint+0x144): undefined reference to `bl31_main' (.text.asm.el3_exit+0x30): undefined reference to `per_world_context' (.text.asm.sync_exception_handler+0x68): undefined reference to `rt_svc_descs_indices' Additionally, when we are passing the armclang assembler as part of build command,running into below errors: Error log : Makefile:970: Makefile:970: The configured AArch64 assembler could not be identified: Makefile:970: Makefile:970: '/tools/installs/arm/safety/armcc/6.16.2/bin/armasm' (via `AS` parameter) Makefile:970: Makefile:970: The following tools are supported: Makefile:970: Makefile:970: - Arm(r) Compiler for Embedded `armclang` Makefile:970: - LLVM Clang (`clang`) Makefile:970: - GNU GCC (`gcc`) Makefile:970: Makefile:970: The build system will treat this assembler as GNU GCC (`gcc`). Please let me know if this configuration is expected to work with ENABLE_LTO=1, or if additional changes (e.g., toolchain selection or linker/assembler handling) are required. Thanks for your guidance. Best regards, Venkata Sai .T .

3 months, 2 weeks

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Canceled event with note: TF-A Tech Forum @ Thu Feb 5, 2026 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Cancelling for this week." TF-A Tech Forum Thursday Feb 5, 2026 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

3 months, 2 weeks

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Unable to build the ZynqMP platform with armclang when ENABLE_LTO=1.

by Taticharla, Venkata Sai

[AMD Official Use Only - AMD Internal Distribution Only] Hello Maintainers, we are trying to build TF‑A BL31 for the ZynqMP (Cortex‑A53) platform with Arm Compiler 6 (armclang) and ENABLE_LTO=1, and I’m running into several toolchain‑related build and link issues. Setup : Platform: ZynqMP Toolchains: Arm Compiler for Embedded 6.16.2 (armclang) Xilinx AArch64 GNU tools from Vitis 2025.2 (aarch64-xilinx-elf-*) LTO is enabled in plat/xilinx/zynqmp/platform.mk via ENABLE_LTO := 1. Issues observed : With CC=armclang and AArch64 linker (GCC), the build fails with: armclang: error: unknown argument: '-flto-partition=one' This flag appears when ENABLE_LTO=1 and the linker is detected as gnu-gcc. If I keep CC=armclang and ENABLE_LTO=1 but change the linker, I get linker‑specific errors With the Arm linker (LD=armlink or LD=armclang, which invokes armlink under the hood): Fatal error: L3900U: Unrecognized option '-z'. This is due to GNU‑style -z options (and similar flags) being passed to armlink. As -z options is specific to GNU linker, a armlink style flag would address the unrecognised option but we are observing dependency on scatter files. Fatal error: L6031U: Could not open scatter description file plat/xilinx/zynqmp//scat/bl31.scat: No such file or directory Could you please help us with pointers to address the linker issues . With regards , Venkata Sai .T .

3 months, 2 weeks

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Trusted Firmware-A LTS v2.14.0 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.14.0 is now available. This release contains the following patches: Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.14.0/change-log.html Thanks, TF-A LTS team

3 months, 2 weeks

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Trusted Firmware-A LTS v2.8.42 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.42 is now available. This release contains the following patches: 38aefbb6c feat(locks): add bitlock [1] 9c3e7f5e5 feat(locks): add non-blocking spinlock_try() API [2] 8f53c3813 fix(locks): mark spin_trylock as a public function [3] 4e6f89690 fix(cpus): workaround for Neoverse V3 erratum 3696307 [4] 25e5b1c1d fix(cpus): workaround for Neoverse V3 erratum 3734562 [5] c6faff4a8 fix(cpus): workaround for Neoverse V3 erratum 3782181 [6] 30bb3c97f fix(cpus): workaround for Neoverse V3 erratum 3864536 [7] 53ff1c60d fix(cpus): workaround for Neoverse V3 erratum 3878291 [8] 2e49a84e1 fix(cpus): workaround for Neoverse-V3 erratum 3312417 [9] 0faa929e7 fix(cpus): workaround for Neoverse-V2 erratum 3442699 [10] 31dea33cd fix(cpus): workaround for Neoverse-N1 erratum 3324349 [11] 7f7fd0315 fix(cpus): workaround for Neoverse-N2 erratum 3324339 [12] ca19e6c6b fix(cpus): workaround for Cortex-A76AE erratum 2753838 [13] d2df71a29 fix(cpus): workaround for Cortex-X2 erratum 3888122 [14] 4560e9174 fix(cpus): workaround for Cortex-X2 erratum 4302969 [15] 68235dd1a fix(cpus): workaround for Neoverse-V2 erratum 3888126 [16] 90cca3145 fix(cpus): workaround for Neoverse-V2 erratum 4302968 [17] c8394c43f fix(cpus): workaround for Cortex-X3 erratum 3888125 [18] 54d8e4697 fix(cpus): workaround for Cortex-X3 erratum 4302966 [19] 23b9d9707 refactor(cpus): reorder the errratum build flag for Neoverse-N2 [20] 587401fa7 fix(cpus): workaround for Neoverse-N2 erratum 3888123 [21] 4079faf67 fix(cpus): workaround for Neoverse-N2 erratum 4302970 [22] 510a6e759 fix(cpus): workaround for Neoverse-N2 erratum 2138953 [23] 2de362cd8 refactor(cpus): make errata reporting more generic [24] 5f0cdb5e7 perf(cpus): reduce the footprint of errata reporting [25] 429e67fb5 fix(cpus): enable Neoverse-V2 external LLC support [26] [1] https://review.trustedfirmware.org/q/I3eb0f29bbccefe6c0f69061aa701187a6364d… [2] https://review.trustedfirmware.org/q/I9483206952d1a34dc245ebf69e80c3645b658… [3] https://review.trustedfirmware.org/q/Id264a36490707a9377a221ed2b5bd27ca90bf… [4] https://review.trustedfirmware.org/q/If274749621549356e41485d0bf09682281df3… [5] https://review.trustedfirmware.org/q/Ib3c35c7e619e6a836c974b7016bb6a4d66da4… [6] https://review.trustedfirmware.org/q/Icfa463cf4888bd48f16a218e7ad399528feca… [7] https://review.trustedfirmware.org/q/If4b20d941d628b92748b14d027b8127f74005… [8] https://review.trustedfirmware.org/q/I0ebab877b6481a18bec963b95cf2f37c97d8d… [9] https://review.trustedfirmware.org/q/I78a7682cbdf3dbc4c31fcca8cbd892350b998… [10] https://review.trustedfirmware.org/q/I38edc6ba445223091c3933cbca35b56db491c… [11] https://review.trustedfirmware.org/q/I1f142027ed73135d78c368be926072c2f73ea… [12] https://review.trustedfirmware.org/q/I6b023279816005cfa459bc6947f60b1a3c0f2… [13] https://review.trustedfirmware.org/q/I338834a21c14879faee5280876a59153d549c… [14] https://review.trustedfirmware.org/q/I368cfdd216ea5875b81640415ff71b15f46ea… [15] https://review.trustedfirmware.org/q/I6c5de5843f2199fa697f8336558fa56a87ee8… [16] https://review.trustedfirmware.org/q/I4068aa73d38a70c00d66bb894169be2659d67… [17] https://review.trustedfirmware.org/q/I42b27e19d61a7f9c57efe1b5f5336d165eb98… [18] https://review.trustedfirmware.org/q/I5c01dfcffc6e56163aba03428e21fedee8cc7… [19] https://review.trustedfirmware.org/q/I284ee7fe611c4c9861696fde62f796e6fae6d… [20] https://review.trustedfirmware.org/q/Ifb736adf8f06bf6202784bdeac51c02512519… [21] https://review.trustedfirmware.org/q/I6240d263fb5d153721b5b84a37df2f24e3d02… [22] https://review.trustedfirmware.org/q/I2436b11a36be204d549522f1176fcd49658c0… [23] https://review.trustedfirmware.org/q/Ie465328e87754a1ec511a2f77243b4b0b0913… [24] https://review.trustedfirmware.org/q/I83710d8475a4a55046cf2eb6d16cd27b8ef0f… [25] https://review.trustedfirmware.org/q/I215a84bd2c91e33703349c41fc59f654f7764… [26] https://review.trustedfirmware.org/q/I9582c7405db6862e77db240822e241d408296… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.42/change-log.html Thanks, TF-A LTS team

3 months, 3 weeks

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Trusted Firmware-A LTS v2.10.29 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.29 is now available. This release contains the following patches: 0876588cd feat(locks): add bitlock [1] ee14acb14 feat(locks): add non-blocking spinlock_try() API [2] 7f53a3bcf fix(locks): mark spin_trylock as a public function [3] 528516d6e refactor(cpus): make errata reporting more generic [4] d70578f82 perf(cpus): reduce the footprint of errata reporting [5] 3eb1d91fc fix(cpus): enable Neoverse-V2 external LLC support [6] 3759bec84 fix(security): add workaround for CVE-2025-0647 [7] cc3fb61cf fix(security): add CVE-2025-0647 for Cortex-A710 [8] ca4573799 fix(security): add CVE-2025-0647 for Cortex-X2 [9] b5c1f67ad fix(security): add CVE-2025-0647 for Cortex-X3 [10] c29605d74 fix(security): add CVE-2025-0647 for Cortex-X4 [11] 023107645 fix(security): add CVE-2025-0647 for Cortex-X925 [12] 79cc92f6f fix(security): add CVE-2025-0647 for Neoverse-N2 [13] 5573859bc fix(security): add CVE-2025-0647 for Neoverse-V2 [14] 722fa1ee2 fix(security): add CVE-2025-0647 for Neoverse-V3 [15] 387e7e470 fix(security): add CVE-2025-0647 for C1-Ultra [16] [1] https://review.trustedfirmware.org/q/I3eb0f29bbccefe6c0f69061aa701187a6364d… [2] https://review.trustedfirmware.org/q/I9483206952d1a34dc245ebf69e80c3645b658… [3] https://review.trustedfirmware.org/q/Id264a36490707a9377a221ed2b5bd27ca90bf… [4] https://review.trustedfirmware.org/q/I83710d8475a4a55046cf2eb6d16cd27b8ef0f… [5] https://review.trustedfirmware.org/q/I215a84bd2c91e33703349c41fc59f654f7764… [6] https://review.trustedfirmware.org/q/I9582c7405db6862e77db240822e241d408296… [7] https://review.trustedfirmware.org/q/I5e7589afbeb69ebb79c01bec80e29f572aff3… [8] https://review.trustedfirmware.org/q/I522dedfffd3108f7a94df1ce2cabd742ce682… [9] https://review.trustedfirmware.org/q/Idba607340d944a6387759c856e8eacc967e0e… [10] https://review.trustedfirmware.org/q/Ic276befafc1ca0b456826532437ca453eb771… [11] https://review.trustedfirmware.org/q/I585a7ea516515fe16a3eca907695728068cef… [12] https://review.trustedfirmware.org/q/I4c1ac2be3620566813c90f5815ffcc7205bb5… [13] https://review.trustedfirmware.org/q/I366c2683cca22403d33f0761487e1ffa62e96… [14] https://review.trustedfirmware.org/q/I7ec215a9dd168eb045366b589a02b54148f58… [15] https://review.trustedfirmware.org/q/Ic52ad93474c5f81e01eb4839ece726c84c334… [16] https://review.trustedfirmware.org/q/I506007ec8702b183e377be50eede72d6803b3… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.29/change-log.html Thanks, TF-A LTS team

3 months, 3 weeks

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Proposal: Introduction of a standardized SMC Argument Validation Framework

by Sandrine Bailleux

Hi all, I am sending the email below on behalf on Kenneth Kabogo, who unfortunately is facing issues with the mailing list. Regards, Sandrine Afsa ---- Dear TF-A Maintainers, I am proposing the introduction of a standardized SMC Argument Validation Framework into the TF-A codebase. Over the past several weeks of security auditing across multiple platform ports, I have identified a recurring architectural failure mode termed "Privilege-Blind Forwarding" (PBF). This occurs when an EL3 handler receives a non-secure physical address and forwards it to a secure memory operation without re-validating the range against the platform's current security state (GPT/RMM). Furthermore, there is a widespread Structural TOCTOU (Double-Fetch) vulnerability in many SiP ports where handlers validate arguments but later re-fetch them from non-secure memory, allowing a malicious caller to swap addresses mid-execution. The proposed framework addresses these via an Atomic Shadow-Copy design pattern, requiring all SMC arguments to be unmarshaled into EL3 registers/memory once before validation. The 3-part prototype and migration guide are available for review on Gerrit: Framework Hardening (Core Logic): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/47441 Architectural Guidance (Documentation): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/47465 Arm Platform Demonstration (Migration Guide): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/47466 I look forward to the community's feedback on this architectural shift. Best regards, Kenneth Kabogo

3 months, 3 weeks

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 3 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 3 of 3 defect(s) ** CID 501374: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 308 in mhu_send_signal_poll_loop() _____________________________________________________________________________________________ *** CID 501374: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 308 in mhu_send_signal_poll_loop() 302 mhu_get_num_mhu_channels(mhu_recv_device, type); 303 uint32_t mhu_err; 304 uint32_t send_signal; 305 uint32_t recv_signal; 306 307 /* Signal using the last channel */ >>> CID 501374: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "send_num_channels - 1U", where "send_num_channels" is known to be equal to 0, underflows the type of "send_num_channels - 1U", which is type "unsigned int". 308 mhu_err = mhu_channel_send(mhu_send_device, send_num_channels - 1, 309 MHU_NOTIFY_VALUE, type); 310 if (mhu_err != 0) { 311 return mhu_err; 312 } 313 ** CID 501373: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 379 in mhu_message_is_available() _____________________________________________________________________________________________ *** CID 501373: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 379 in mhu_message_is_available() 373 { 374 const uint32_t num_channels = 375 mhu_get_num_mhu_channels(mhu_recv_device, type); 376 uint32_t mhu_err; 377 uint32_t value; 378 >>> CID 501373: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "num_channels - 1U", where "num_channels" is known to be equal to 0, underflows the type of "num_channels - 1U", which is type "unsigned int". 379 mhu_err = mhu_channel_receive_device_receive( 380 mhu_recv_device, num_channels - 1, &value, type); 381 if (mhu_err != 0) { 382 return mhu_err; 383 } 384 ** CID 501372: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 359 in mhu_recv_signal_poll_loop() _____________________________________________________________________________________________ *** CID 501372: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 359 in mhu_recv_signal_poll_loop() 353 return mhu_err; 354 } 355 } 356 357 /* Wait for next sender transfer */ 358 do { >>> CID 501372: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "recv_num_channels - 1U", where "recv_num_channels" is known to be equal to 0, underflows the type of "recv_num_channels - 1U", which is type "unsigned int". 359 mhu_err = mhu_channel_receive_device_receive( 360 mhu_recv_device, recv_num_channels - 1, &recv_signal, 361 type); 362 if (mhu_err != 0) { 363 return mhu_err; 364 } ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

3 months, 3 weeks

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