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Dear TF-A ML members,
As mentioned in https://www.trustedfirmware.org/meetings/tf-a-technical-forum/, trustedfirmware.org hosts regular technical calls on Thursdays. It mentions TF-A although in practise a number of Cortex-A projects beyond TF-A were discussed (refer to prior recordings on this page).
Unfortunately this slot hasn't been very active recently.
By this email I'm kindly emphasizing this forum is open to the community (and beyond trustedfirmware.org members) and you are welcome to propose topics. Presentations/slides are not strictly necessary, and we can also host informal discussions or session of questions. If you think of a topic, please reach to me and I'll be happy to accommodate.
Thanks for your contributions in advance!
Regards,
Olivier.
I tried to add two new tzc regions in ATF's source code, and test the
memory access in the new region.
```cpp
#define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END +
ARM_L1_GPT_SIZE, TZC_REGION_S_RDWR, 0}, \
{ARM_NS_DRAM1_BASE, 0xA0000000-1, ARM_TZC_NS_DRAM_S_ACCESS,
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{0xA0000000, 0xB0000000-1, ARM_TZC_NS_DRAM_S_ACCESS,
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{0xB0000000, 0xC0000000-1, ARM_TZC_NS_DRAM_S_ACCESS,
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{0xC0000000, ARM_NS_DRAM1_END, ARM_TZC_NS_DRAM_S_ACCESS,
PLAT_ARM_TZC_NS_DEV_ACCESS}, \
{ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS,
PLAT_ARM_TZC_NS_DEV_ACCESS}
```
But FVP throws some warnings:
```
Info: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
common_reset starts
Info: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400: build
config register value 0x3003f08
4 filters, 9 regions, address width 64
Info: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.flashloader0:
FlashLoader: Loaded 3164 kB from file
'/home/bea1e/functionality-prototype/build/../trusted-firmware-a/build/fvp/release/fip.bin'
Info: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.secureflashloader:
FlashLoader: Loaded 25 kB from file
'/home/bea1e/functionality-prototype/build/../trusted-firmware-a/build/fvp/release/bl1.bin'
Info: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
common_reset starts
Info: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400: build
config register value 0x3003f08
4 filters, 9 regions, address width 64
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 220
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5126760 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 224
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5126760 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 228
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5126760 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 22c
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5126760 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 230
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5126760 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 234
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5126760 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 240
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5127800 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 244
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5127800 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 248
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5127800 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 24c
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5127800 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 250
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5127800 ns
Warning: FVP_Base_RevC_2xAEMvA: FVP_Base_RevC_2xAEMvA.bp.tzc_400:
attempt to write invalid address 254
In file: (unknown):0
In process: FVP_Base_RevC_2xAEMvA.thread_p_32 @ 5127800 ns
```
It seems the configuration registers for the two new regions are
invalid. But I dont know how to solve this problem.
Here are the arguments of FVP:
```
-C bp.ve_sysregs.exit_on_shutdown=1 \
-C cache_state_modelled=0 \
-C pctl.startup=0.0.0.0 \
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4 \
-C bp.secure_memory=1 \
-C bp.dram_size=8 \
-C bp.tzc_400.diagnostics=1 \
-C bp.secureflashloader.fname=$(TF_A_PATH)/build/fvp/$(TF_A_BUILD)/bl1.bin \
-C bp.flashloader0.fname=$(TF_A_PATH)/build/fvp/$(TF_A_BUILD)/fip.bin \
-C bp.virtioblockdevice.image_path=$(BOOT_IMG)
```
Should I add more arguments while booting FVP? Is there any other advice
for me to test the TZASC configurations?
This event has been canceled.
TF-A Tech Forum
Thursday Oct 17, 2024 ⋅ 5pm – 6pm
Central European Time - Paris
We run an open technical forum call for anyone to participate and it is not
restricted to Trusted Firmware project members. It will operate under the
guidance of the TF TSC. Feel free to forward this invite to colleagues.
Invites are via the TF-A mailing list and also published on the Trusted
Firmware website. Details are here:
https://www.trustedfirmware.org/meetings/tf-a-technical-forum/Trusted
Firmware is inviting you to a scheduled Zoom meeting.Join Zoom
Meetinghttps://linaro-org.zoom.us/my/trustedfirmware?pwd=VktXcm5MNUUyVVM4R0k3ZUtvdU84QT09
One tap mobile+16465588656,,9159704974# US (New
York)+16699009128,,9159704974# US (San Jose)Dial by your location +1
646 558 8656 US (New York) +1 669 900 9128 US (San Jose) 877
853 5247 US Toll-free 888 788 0099 US Toll-freeMeeting ID: 915 970
4974Find your local number: https://zoom.us/u/ad27hc6t7h
Guests
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Hi,
Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan.
1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 1 of 1 defect(s)
** CID 445539: High impact quality (WRITE_CONST_FIELD)
/drivers/arm/dcc/dcc_console.c: 153 in console_dcc_register()
________________________________________________________________________________________________________
*** CID 445539: High impact quality (WRITE_CONST_FIELD)
/drivers/arm/dcc/dcc_console.c: 153 in console_dcc_register()
147 .flush = dcc_console_flush,
148 },
149 };
150
151 int console_dcc_register(console_t *console)
152 {
>>> CID 445539: High impact quality (WRITE_CONST_FIELD)
>>> A write to an aggregate overwrites a const-qualified field within the aggregate.
153 memcpy(console, &dcc_console.console, sizeof(console_t));
154 return console_register(console);
155 }
156
157 void console_dcc_unregister(console_t *console)
158 {
159 dcc_console_flush(console);
160 (void)console_unregister(console);
________________________________________________________________________________________________________
To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=u001.AxU2LYlgjL6eX23u9ErQy-2…