Hi, On June 12th 2025, the TF-A Tech forum will take place at 4.00pm UK
with the following topic: TF-RMM live activation design discussion
Presenters: Andre Przywara Soby Mathew Manish Badarkhe In this meeting, we
aim to discuss the details of live firmware activation for TF-RMM. The key
topics will include: * Design details of TF-RMM live activation * Rationale
for EL3-RMM communication changes: We will explain the motivation behind
the proposed changes to the communication mechanism between EL3 and RMM
which simplifies internal state migration for LFA, enables sharing of the
state across RMM instances that are live-activated, supports localized
per-CPU allocations for NUMA and multi-chip configurations, decouples the
RMM binary from platform-specifics. * LFA SMC Implementation in EL3: We
will also provide an overview of the LFA SMC implementation at EL3.
Regards, Olivier.
TF-A Tech Forum
Thursday Jun 12, 2025 ⋅ 5pm – 6pm
Central European Time - Paris
Location
https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…
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Hi All,
I'm new to TF-A. While working on enabling Linux on A-520 FVP, I ran into
an issue that I wanted to ask about.
My stack looks like this:TF-A->U-boot->kernel. Initially I was able to boot
on Base FVP(FVP_Base_RevC-2xAEMvA) and get to the linux console. Now we
need to enable the same for A-520 FVP as our soc will be A-520. I saw the
crash happening very early in "cpu_helpers.S.
I made the change in plat/arm/board/fvp/platform.mk by adding
lib/cpus/aarch64/cortex_a520.S in one of the FVP_CPU_LIBS and enabling the
ERRATA_A520_2938996, ERRATA_A520_2858100 and ERRATA_A520_2630792. These
changes helped me get past the TF-A and now i ' m seeing a crash inside
kernel in pci.
16.720973] pci-host-generic 40000000.pci: host bridge /pci@40000000
ranges:
[ 16.721375] pci-host-generic 40000000.pci: MEM
0x0050000000..0x005fffffff -> 0x0050000000
[ 16.722013] pci-host-generic 40000000.pci: ECAM at [mem
0x40000000-0x4fffffff] for [bus 00-ff]
[ 16.723128] pci-host-generic 40000000.pci: PCI host bridge to bus 0000:00
[ 16.723461] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 16.723761] pci_bus 0000:00: root bus resource [mem
0x50000000-0x5fffffff]
[ 16.724101] Internal error: synchronous external abort: 0000000096000010
[#1] SMP
[ 16.724216] Modules linked in:
[ 16.724302] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted
6.15.0-rc7-dirty #12 PREEMPT
[ 16.724449] Hardware name: FVP Base RevC (DT)
[ 16.724531] pstate: 214000c9 (nzCv daIF +PAN -UAO -TCO +DIT -SSBS
BTYPE=--)
[ 16.724666] pc : pci_generic_config_read+0x38/0xb8
[ 16.724802] lr : pci_generic_config_read+0x24/0xb8
[ 16.724939] sp : ffff80008272b940
[ 16.725012] x29: ffff80008272b940 x28: 0000000000000000 x27:
ffff800081dc00b0
[ 16.725205] x26: ffff800081ec9060 x25: ffff800081ec9078 x24:
ffff80008266a9a0
[ 16.725401] x23: 0000000000000000 x22: ffff80008272b9f4 x21:
ffff000800fa8000
[ 16.725594] x20: ffff80008272b964 x19: 0000000000000004 x18:
0000000000000006
[ 16.725781] x17: 6666666666663478 x16: 302d303030303030 x15:
ffff800082edbbbf
[ 16.725980] x14: 0000000000000000 x13: 0000000000000000 x12:
0000000000000000
[ 16.726166] x11: 0000000000000001 x10: 3ea1f6d484b7e318 x9 :
69631046f78aed23
[ 16.726355] x8 : ffff000800169108 x7 : ffff800082250960 x6 :
00000000000000ff
[ 16.726547] x5 : 0000000000000000 x4 : 0000000000000000 x3 :
ffff800090000000
[ 16.726738] x2 : 0000000000000000 x1 : 0000000000000000 x0 :
ffff800090000000
Do i need to do enable somethign else in TF-A?
I tried adding :
pci: pci@40000000 {
compatible = "pci-host-ecam-generic";
device_type = "pci";
bus-range = <0x0 0xff>;
reg = <0x0 0x40000000 0x0 0x10000000>;
ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0
0x10000000>;
};
in plat/arm/board/fvp/fdts/fvp_soc_fw_config.dts but it does not help.
Also I see the kernel is not able to bring all the cpu's online:
[ 0.040364] smp: Bringing up secondary CPUs ...
[ 5.116993] CPU1: failed to come online
[ 5.117063] CPU1: failed in unknown state : 0x0
[ 10.266076] CPU2: failed to come online
[ 10.266152] CPU2: failed in unknown state : 0x0
[ 15.415178] CPU3: failed to come online
[ 15.415247] CPU3: failed in unknown state : 0x0
[ 15.421021] psci: failed to boot CPU4 (-22)
[ 15.421099] CPU4: failed to boot: -22
[ 15.425045] psci: failed to boot CPU5 (-22)
[ 15.425123] CPU5: failed to boot: -22
[ 15.429079] psci: failed to boot CPU6 (-22)
[ 15.429157] CPU6: failed to boot: -22
[ 15.433153] psci: failed to boot CPU7 (-22)
[ 15.433227] CPU7: failed to boot: -22
[ 15.433587] smp: Brought up 1 node, 1 CPU
[ 15.433672] SMP: Total of 1 processors activated.
[ 15.433746] CPU: All CPU(s) started at EL2
I’m still getting familiar with the codebase and community, so apologies if
this has already been addressed. I’d really appreciate any guidance or
pointers, and if this is a known issue or good for a first-time
contributor, I’d be happy to help.
Regards,
Shaunak
Hi folks,
We are planning on going live with the migration of the TF.org Open CI tomorrow, Friday 30th May, which will migrate Jenkins (ci.trustedfirmware.org) from on-premises to cloud-managed infrastructure. We expect a downtime of 2-4 hours beginning at 14:30 GMT+1, during which anything which interacts with Jenkins will be unavailable.
Please note that the Jenkins build history is not being transferred - if you have Gerrit changes in review with the Allow-CI+1/+2 label, you will need to retrigger the CI once migration is complete by reapplying the label.
We will send out a follow-up email once we have restored service availability.
Regards,
Chris
This event has been canceled with a note:
"Hi, Cancelling as no topic planned for this week. Regards, Olivier. "
TF-A Tech Forum
Thursday May 29, 2025 ⋅ 5pm – 6pm
Central European Time - Paris
Location
https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…
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Hi All,
We are pleased to announce the formal release of Trusted Firmware-A version 2.13 bundle of project deliverables.
This includes Trusted Firmware-A, Trusted Firmware-A Tests, Hafnium, TF-RMM, Trusted Services, and TF-A OpenCI scripts/jobs components.
These went live on May, 22nd 2025.
Please find references to tags and change logs at the end of this email.
Many thanks to the trustedfirmware.org community for the active engagement in delivering this release!
Notable features of the release version 2.13 are as follows:
TF-A/EL3
* Alto CPU support
*
Architecture feature support for PMUv3p9. PAUTH_LR and SPE_FDS.
* Refactor PSCI to let each CPU core initialise its own context, allowing TF-A to natively handle asymmetric configurations
*
PSCI Powerdown abandon feature support
*
SMCCC_FEATURE_AVAILABILITY support based on SMCCC v1.5 specification
* Firmware Handoff
* Library enhancements to add more TE types in library
* All BL interfaces for FVP are now migrated to use Transfer List along in different boot scenarios (RESET_TO_BL1/BL2/BL31)
*
TC platform is now using Transfer List for booting
* HOB creation Library (from edk2) is now hosted in TF-A
* New Platforms: mt8189, mt8196, qcs615, RK3576, AM62L
Boot flow
* Feature Additions
* Added discrete TPM support in BL1/BL2 for the RPi3 platform.
*
Support for MbedTLS PSA Crypto with ROMLIB on FVP.
*
Redesigned PSA Crypto Key ID management to avoid repeated key creation/destruction.
*
Test Additions
*
Support for MbedTLS PSA Crypto with ROMLIB on FVP.
*
Added basic boot test for TF-RMM with TF-A and TFTF (Realm Payload) in Jenkins CI.
*
Integrated DRTM ACS test suite into TF-A Jenkins CI.
*
Added missing test configuration for ROTPK in register on FVP platform.
*
Build System
*
Refactored ROTPK key/hash generation to auto-generate required files during build.
*
mbedTLS Improvements
*
Migrated to mbedTLS version 3.6.3.
Errata/Security mitigations (CPU/GIC)
*
CVE-2024-5660, CVE-2024-7881
* Cortex-A510, Cortex-A715, Cortex-X4, Cortex-X925, Neoverse V3
Hafnium/SPM (S-EL2)
* FF-A v1.2 completed: indirect messaging with service UUIDs.
* FF-A v1.3 early adoption: Update to FFA_MEM_PERM_GET ABIs.
* StMM integration: provide HOB structure as boot information.
* Power management update:
* Bootstrapped secondary vCPUs on secondary cores power on flows.
* SP's subscription to the power off event.
* SP loading: SP artefacts can be bundled in a TL format. I.e SP binary and SP manifest (DTB).
* Resuming ECs for interrupt handling assisted by NWd Scheduler when the SP is in waiting state, with sri-interrupts-policy field in the SP manifest.
TF-RMM (R-EL2)
* Deprivileging RMM code via EL0 App support
*
Added some support for some RMMv1.1 APIs - "RMI_DEV_MEM_(UN)MAP", support for device granules in "RMI_GRANULE_DELEGATE" and "RMI_GRANULE_UNDELEGATE".
*
Additional hardening of RMM via compiler flags `-fstack-protector-strong`, '-Wextra', '-Wstrict-overflow', '-D_FORTIFY_SOURCE=2' and '-Wnull-dereference'.
*
New platform support for RD-V3-R1 and RD-V3-R1-Cfg1 FVPs.
*
Dynamic discovery of PCIE Root complex topology and device memory from the Boot manifest.
Trusted Services (v1.2.0)
* Introduced the fTPM SP. The implementation is experimental.
*
Introduce the new Arm Reference Design-1 AE platform targeting the Automotive segment. It features
high-performance Arm Neoverse V3AE Application Processor compute system, Arm Cortex-R82AE based Safety Island, and
a Runtime Security Engine (RSE) for enhanced security.
*
Updated the se-proxy deployment and added support for the Firmware Update Proxy service. The FWU Proxy implements a Platform Security Firmware Update for the A-profile Arm Architecture<https://developer.arm.com/documentation/den0118/latest/> compliant FWU Agent which runs a PSA Certified Firmware Update API 1.0<https://arm-software.github.io/psa-api/fwu/1.0/> compliant client as its backend.
TF-A Tests
* Enhancements to fuzzing tests (EL3 vendor specific SMC, SDEI, FF-A interface, capability for randomized fuzzing inputs)
* Functionality test
* Firmware Handoff : AArch32 tests and event log testing
* SMCCC_ARCH_FEATURE_AVAILABILITY
* RAS system registers, FPMR, SCTLR2, THE and D128
* validate psci_is_last_cpu_to_idle_at_pwrlvl
* SPM/FF-A : HOB generation, PPI timer interrupts, v1.2 RXTX headers
* RMM: Tests introduced for majority of features developed in RMM
* Platform Support
* Versal NET
* Versal
* Neoverse-RD
Release tags across repositories:
https://git.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/r…https://git.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags…https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-ci-scripts/+/refs/t…https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-job-configs/+/refs/…https://git.trustedfirmware.org/plugins/gitiles/hafnium/hafnium.git/+/refs/…https://git.trustedfirmware.org/plugins/gitiles/ci/hafnium-ci-scripts/+/ref…https://git.trustedfirmware.org/plugins/gitiles/ci/hafnium-job-configs/+/re…https://git.trustedfirmware.org/plugins/gitiles/TF-RMM/tf-rmm/+/refs/tags/t…https://git.trustedfirmware.org/plugins/gitiles/TS/trusted-services/+/refs/…
Change logs:
https://trustedfirmware-a.readthedocs.io/en/v2.13.0/change-log.html#id1https://trustedfirmware-a-tests.readthedocs.io/en/v2.13.0/change-log.html#v…https://hafnium.readthedocs.io/en/v2.13.0/change-log.html#v2-13https://tf-rmm.readthedocs.io/en/latest/about/change-log.html#v0-7-0https://trusted-services.readthedocs.io/en/stable/project/change-log.html#v…
Regards,
Olivier.
This event has been canceled with a note:
"Hi, No topic proposed so cancelling this week. Regards, Olivier. "
TF-A Tech Forum
Thursday May 15, 2025 ⋅ 5pm – 6pm
Central European Time - Paris
Location
https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…
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