- TF-M - lists.trustedfirmware.org

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Nov 25, 15:00-16:00 UTC (US time zone). This is Thanksgiving day and public holiday in US so we might want to cancel the forum expecting fewer participants unless we have a good topic to discuss. Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 5 months

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Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors

by David Hu

Hi Thomas, The tf-m-tests fix is under review and has not been merged yet. Therefore that commit ID is not available in tf-m-tests. I'd suggest to do following to test the fix: * Cherry pick https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/12563 to your local tf-m-tests repo * Cherry pick https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12564 to your local trusted-firmware-m repo * Add `-DTFM_TEST_REPO_PATH=<local tf-m-tests folder>` in the build command. After the fix is merged, the commit will be available when fetching the tf-m-tests repo. Best regards, Hu Ziji ________________________________ From: Thomas Törnblom <thomas.tornblom(a)iar.com> Sent: Thursday, November 18, 2021 8:10 PM To: David Hu <David.Hu(a)arm.com>; David Wang <David.Wang(a)arm.com>; Feder Liang <Feder.Liang(a)arm.com> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors I'm getting another error after cherry picking these: PS D:\Projects\trusted-firmware-m\iar> cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_IARARM.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF -- Populating tfm_test_repo -- Configuring done -- Generating done -- Build files have been written to: D:/Projects/trusted-firmware-m/iar/lib/ext/tfm_test_repo-subbuild [1/9] Creating directories for 'tfm_test_repo-populate' [1/9] Performing download step (git clone) for 'tfm_test_repo-populate' Cloning into 'tfm_test_repo-src'... remote: Enumerating objects: 1094, done. remote: Counting objects: 100% (1094/1094), done. remote: Compressing objects: 100% (613/613), done. remote: Total 2057 (delta 913), reused 511 (delta 481), pack-reused 963 Receiving objects: 100% (2057/2057), 2.05 MiB | 8.43 MiB/s, done. Resolving deltas: 100% (1371/1371), done. fatal: invalid reference: 14ca288 CMake Error at tfm_test_repo-subbuild/tfm_test_repo-populate-prefix/tmp/tfm_test_repo-populate-gitclone.cmake:40 (message): Failed to checkout tag: '14ca288' FAILED: tfm_test_repo-populate-prefix/src/tfm_test_repo-populate-stamp/tfm_test_repo-populate-download cmd.exe /C "cd /D D:\Projects\trusted-firmware-m\iar\lib\ext && "C:\Program Files\CMake\bin\cmake.exe" -P D:/Projects/trusted-firmware-m/iar/lib/ext/tfm_test_repo-subbuild/tfm_test_repo-populate-prefix/tmp/tfm_test_repo-populate-gitclone.cmake && "C:\Program Files\CMake\bin\cmake.exe" -E touch D:/Projects/trusted-firmware-m/iar/lib/ext/tfm_test_repo-subbuild/tfm_test_repo-populate-prefix/src/tfm_test_repo-populate-stamp/tfm_test_repo-populate-download" ninja: build stopped: subcommand failed. CMake Error at C:/Program Files/CMake/share/cmake-3.20/Modules/FetchContent.cmake:1012 (message): Build step for tfm_test_repo failed: 1 Call Stack (most recent call first): C:/Program Files/CMake/share/cmake-3.20/Modules/FetchContent.cmake:1141:EVAL:2 (__FetchContent_directPopulate) C:/Program Files/CMake/share/cmake-3.20/Modules/FetchContent.cmake:1141 (cmake_language) lib/ext/tf-m-tests/fetch_repo.cmake:27 (FetchContent_Populate) lib/ext/tf-m-tests/tf-m-tests.cmake:56 (include) config/set_config.cmake:68 (include) CMakeLists.txt:42 (include) Den 2021-11-18 kl. 13:00, skrev David Hu: Hi Thomas, Sorry for the failure and the trouble. The build logic of QCBOR NS test was adjusted to fit FP feature but the logic has defect when QCBOR NS test = OFF. Please cherry pick the following 2 patches and have a try: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/12563 https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12564 The fix will be port back to master branch when release completes. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:57 PM To: David Wang <David.Wang(a)arm.com><mailto:David.Wang@arm.com>; Feder Liang <Feder.Liang(a)arm.com><mailto:Feder.Liang@arm.com> Cc: nd <nd(a)arm.com><mailto:nd@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Oh, and it fails the same on Windows and linux, as well as ARMCLANG and IARARM. /Thomas Den 2021-11-18 kl. 11:56, skrev Thomas Törnblom: commit fd88f7fbde4d23720c3c9be7350e628df51ef964 (HEAD -> master, tag: TF-Mv1.5.0-RC1, origin/master, origin/HEAD, list) Den 2021-11-18 kl. 11:27, skrev David Wang: Hi Thomas, Could you share the SHA of your branch HEAD? Or you can try to fetch the latest tag and code. Regards, David Wang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:10 PM To: Feder Liang <Feder.Liang(a)arm.com><mailto:Feder.Liang@arm.com> Cc: nd <nd(a)arm.com><mailto:nd@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Nope, I was using "master", which was 1.5.0 RC1, both fails. /Thomas Den 2021-11-18 kl. 10:56, skrev Feder Liang: Hi, Thomas It seems TF-M and Test repo is not synced. Could you help a try on latest TF-M master branch or tag: TF-Mv1.5.0-RC1? Best Regards Feder From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 5:42 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Looks like this patch is causing build errors, at least for Musca S1. cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF [1233/1238] Linking C executable bin\tfm_ns.axf FAILED: bin/tfm_ns.axf cmd.exe /C "cd . && D:\apps\Keil_v5\ARM\ARMCLANG\bin\armlink.exe --cpu=cortex-m33 --info=summarysizes,sizes,totals,unused,veneers --strict --symbols --xref --diag_suppress=6312 --diag_suppress=6314 --diag_suppress=6304 --diag_suppress=6329 --fpu=softvfp --map --scatter=D:/Projects/trusted-firmware-m/armclang/platform/target/CMakeFiles/tfm_ns_scatter.dir/./Device/Source/armclang/musca_ns.o platform\libplatform_ns.a app\libtfm_ns_integration_test.a app\libtfm_api_ns.a ns_log\libtfm_ns_log.a test\suites\core\libtfm_test_suite_core_ns.a app\libtfm_ns_integration_test.a test\suites\core\libtfm_test_suite_core_ns.a test\suites\attestation\libtfm_test_suite_attestation_ns.a test\suites\crypto\libtfm_test_suite_crypto_ns.a test\suites\qcbor\libtfm_test_suite_qcbor_ns.a -ltfm_qcbor_test test\suites\ps\libtfm_test_suite_ps_ns.a test\suites\its\libtfm_test_suite_its_ns.a test\suites\t_cose\libtfm_test_suite_t_cose_ns.a test\suites\t_cose\libtfm_t_cose_test.a test\suites\t_cose\libtfm_t_cose_ns.a test\suites\qcbor\libtfm_qcbor_ns.a test\suites\platform\libtfm_test_suite_platform_ns.a test\suites\ipc\libtfm_test_suite_ipc_ns.a lib\ext\tfm_test_repo-src\CMSIS\RTOS2\RTX\Library\ARM\RTX_V8MMN.lib app\libtfm_api_ns.a secure_fw\libtfm_s_veneers.a ns_log\libtfm_ns_log.a platform\libplatform_ns.a app\CMakeFiles\tfm_ns.dir\main_ns.o app\CMakeFiles\tfm_ns.dir\__\__\platform\ext\target\arm\musca_s1\Device\Source\armclang\startup_cmsdk_musca_ns.o app\CMakeFiles\tfm_ns.dir\__\ns_interface\ns_client_ext\tz_shim_layer.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Config\RTX_Config.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Source\rtx_lib.o app\CMakeFiles\tfm_ns.dir\os_wrapper_cmsis_rtos_v2.o -o bin\tfm_ns.axf --list=bin\tfm_ns.axf.map && cd ." Fatal error: L3900U: Unrecognized option '-ltfm_qcbor_test'. Finished: 0 information, 0 warning, 0 error and 1 fatal error messages. ninja: build stopped: subcommand failed. -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems>

3 years, 5 months

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Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors

by David Hu

The mailing list was lost. From: David Hu Sent: Thursday, November 18, 2021 8:00 PM To: Thomas Törnblom <thomas.tornblom(a)iar.com>; David Wang <David.Wang(a)arm.com>; Feder Liang <Feder.Liang(a)arm.com> Cc: nd <nd(a)arm.com> Subject: RE: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Hi Thomas, Sorry for the failure and the trouble. The build logic of QCBOR NS test was adjusted to fit FP feature but the logic has defect when QCBOR NS test = OFF. Please cherry pick the following 2 patches and have a try: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/12563 https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12564 The fix will be port back to master branch when release completes. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:57 PM To: David Wang <David.Wang(a)arm.com<mailto:David.Wang@arm.com>>; Feder Liang <Feder.Liang(a)arm.com<mailto:Feder.Liang@arm.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Oh, and it fails the same on Windows and linux, as well as ARMCLANG and IARARM. /Thomas Den 2021-11-18 kl. 11:56, skrev Thomas Törnblom: commit fd88f7fbde4d23720c3c9be7350e628df51ef964 (HEAD -> master, tag: TF-Mv1.5.0-RC1, origin/master, origin/HEAD, list) Den 2021-11-18 kl. 11:27, skrev David Wang: Hi Thomas, Could you share the SHA of your branch HEAD? Or you can try to fetch the latest tag and code. Regards, David Wang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:10 PM To: Feder Liang <Feder.Liang(a)arm.com><mailto:Feder.Liang@arm.com> Cc: nd <nd(a)arm.com><mailto:nd@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Nope, I was using "master", which was 1.5.0 RC1, both fails. /Thomas Den 2021-11-18 kl. 10:56, skrev Feder Liang: Hi, Thomas It seems TF-M and Test repo is not synced. Could you help a try on latest TF-M master branch or tag: TF-Mv1.5.0-RC1? Best Regards Feder From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 5:42 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Looks like this patch is causing build errors, at least for Musca S1. cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF [1233/1238] Linking C executable bin\tfm_ns.axf FAILED: bin/tfm_ns.axf cmd.exe /C "cd . && D:\apps\Keil_v5\ARM\ARMCLANG\bin\armlink.exe --cpu=cortex-m33 --info=summarysizes,sizes,totals,unused,veneers --strict --symbols --xref --diag_suppress=6312 --diag_suppress=6314 --diag_suppress=6304 --diag_suppress=6329 --fpu=softvfp --map --scatter=D:/Projects/trusted-firmware-m/armclang/platform/target/CMakeFiles/tfm_ns_scatter.dir/./Device/Source/armclang/musca_ns.o platform\libplatform_ns.a app\libtfm_ns_integration_test.a app\libtfm_api_ns.a ns_log\libtfm_ns_log.a test\suites\core\libtfm_test_suite_core_ns.a app\libtfm_ns_integration_test.a test\suites\core\libtfm_test_suite_core_ns.a test\suites\attestation\libtfm_test_suite_attestation_ns.a test\suites\crypto\libtfm_test_suite_crypto_ns.a test\suites\qcbor\libtfm_test_suite_qcbor_ns.a -ltfm_qcbor_test test\suites\ps\libtfm_test_suite_ps_ns.a test\suites\its\libtfm_test_suite_its_ns.a test\suites\t_cose\libtfm_test_suite_t_cose_ns.a test\suites\t_cose\libtfm_t_cose_test.a test\suites\t_cose\libtfm_t_cose_ns.a test\suites\qcbor\libtfm_qcbor_ns.a test\suites\platform\libtfm_test_suite_platform_ns.a test\suites\ipc\libtfm_test_suite_ipc_ns.a lib\ext\tfm_test_repo-src\CMSIS\RTOS2\RTX\Library\ARM\RTX_V8MMN.lib app\libtfm_api_ns.a secure_fw\libtfm_s_veneers.a ns_log\libtfm_ns_log.a platform\libplatform_ns.a app\CMakeFiles\tfm_ns.dir\main_ns.o app\CMakeFiles\tfm_ns.dir\__\__\platform\ext\target\arm\musca_s1\Device\Source\armclang\startup_cmsdk_musca_ns.o app\CMakeFiles\tfm_ns.dir\__\ns_interface\ns_client_ext\tz_shim_layer.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Config\RTX_Config.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Source\rtx_lib.o app\CMakeFiles\tfm_ns.dir\os_wrapper_cmsis_rtos_v2.o -o bin\tfm_ns.axf --list=bin\tfm_ns.axf.map && cd ." Fatal error: L3900U: Unrecognized option '-ltfm_qcbor_test'. Finished: 0 information, 0 warning, 0 error and 1 fatal error messages. ninja: build stopped: subcommand failed. -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems>

3 years, 5 months

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d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors

by Thomas Törnblom

Looks like this patch is causing build errors, at least for Musca S1. cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF [1233/1238] Linking C executable bin\tfm_ns.axf FAILED: bin/tfm_ns.axf cmd.exe /C "cd . && D:\apps\Keil_v5\ARM\ARMCLANG\bin\armlink.exe --cpu=cortex-m33 --info=summarysizes,sizes,totals,unused,veneers --strict --symbols --xref --diag_suppress=6312 --diag_suppress=6314 --diag_suppress=6304 --diag_suppress=6329 --fpu=softvfp --map --scatter=D:/Projects/trusted-firmware-m/armclang/platform/target/CMakeFiles/tfm_ns_scatter.dir/./Device/Source/armclang/musca_ns.o platform\libplatform_ns.a app\libtfm_ns_integration_test.a app\libtfm_api_ns.a ns_log\libtfm_ns_log.a test\suites\core\libtfm_test_suite_core_ns.a app\libtfm_ns_integration_test.a test\suites\core\libtfm_test_suite_core_ns.a test\suites\attestation\libtfm_test_suite_attestation_ns.a test\suites\crypto\libtfm_test_suite_crypto_ns.a test\suites\qcbor\libtfm_test_suite_qcbor_ns.a -ltfm_qcbor_test test\suites\ps\libtfm_test_suite_ps_ns.a test\suites\its\libtfm_test_suite_its_ns.a test\suites\t_cose\libtfm_test_suite_t_cose_ns.a test\suites\t_cose\libtfm_t_cose_test.a test\suites\t_cose\libtfm_t_cose_ns.a test\suites\qcbor\libtfm_qcbor_ns.a test\suites\platform\libtfm_test_suite_platform_ns.a test\suites\ipc\libtfm_test_suite_ipc_ns.a lib\ext\tfm_test_repo-src\CMSIS\RTOS2\RTX\Library\ARM\RTX_V8MMN.lib app\libtfm_api_ns.a secure_fw\libtfm_s_veneers.a ns_log\libtfm_ns_log.a platform\libplatform_ns.a app\CMakeFiles\tfm_ns.dir\main_ns.o app\CMakeFiles\tfm_ns.dir\__\__\platform\ext\target\arm\musca_s1\Device\Source\armclang\startup_cmsdk_musca_ns.o app\CMakeFiles\tfm_ns.dir\__\ns_interface\ns_client_ext\tz_shim_layer.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Config\RTX_Config.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Source\rtx_lib.o app\CMakeFiles\tfm_ns.dir\os_wrapper_cmsis_rtos_v2.o -o bin\tfm_ns.axf --list=bin\tfm_ns.axf.map && cd ." Fatal error: L3900U: Unrecognized option '-ltfm_qcbor_test'. Finished: 0 information, 0 warning, 0 error and 1 fatal error messages. ninja: build stopped: subcommand failed. -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 5 months

3
5
0 0

Open CI Does Not Cover ITS/PS Access Flash Tests on MUSCA_B1

by Xinyu Zhang

Hi, I'm sorry to inform you that ITS/PS access flash on MUSCA_B1 could not be covered on Open CI for the time being. Because the flash on MUSCA_B1 board in Open CI is broken, we temporarily use RAM_FS as workaround. This issue will be fixed ASAP. We'll keep following and inform you with further updates. Sorry for any inconvenience! BR, Xinyu

3 years, 5 months

2
2
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Re: [TF-M] TF-M release v1.5.0 will start after Nov 15

by Anton Komlev

Hello, To include all planned changes we need more time to review the patches so the feature freeze is postponed to the beginning of the next week when release branch will be created. This gives all a few more days for reviews and last moment changes. The intention is to keep the final date unchanged. Best regards, Anton From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Thursday, November 11, 2021 8:33 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] TF-M release v1.5.0 will start on Nov 15 Hello, Following the updated release strategy, presented on the tech forum today I plan to create the release branch on Nov 13, and freeze project features at that moment. Please review and merge all patches intended for v1.5.0 by the end of this week. Normal development can continue on the main branch without any restriction. Thanks, Anton

3 years, 5 months

1
0
0 0

Another PSoC problem

by Chris.Brand＠infineon.com

Build command is: cmake -S . -B output -G"Unix Makefiles" -DTFM_PLATFORM=cypress/psoc64 -DTFM_TOOLCHAIN_FILE=toolchain_GNUARM.cmake -DTEST_NS_MULTI_CORE=ON -DTFM_ISOLATION_LEVEL=1 The result is a hang at this point: > Executing 'MULTI_CLIENT_CALL_HEAVY_TEST' Description: 'Multiple outstanding NS PSA client calls heavyweight test' Totally 5 threads for test start Each thread run 0x20 rounds tests Some experimentation shows that: It happens with both gcc and armclang (unable to test IAR). It doesn't always happen, but does seem to hang more often than it succeeds. It doesn't happen with TFM_ISOLATION_LEVEL=2. It looks like this test was passing consistently before 5e68b11764673ee32bae0de8ecf3cde45cc55ea1, so I guess this is another scheduling issue. There's not a lot of code that differs with TFM_LVL, so I wonder if there's a race condition that is always present but just doesn't happen to get hit at TFM_LVL=2...? BTW, being able to build just the one test is extremely useful! Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

3 years, 5 months

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race condition in IPC

by Sebastian Bøe

Hi, are there any known race conditions in IPC/PS that affect TF-M 1.4-ish? More specifically TF-M revision a199c3047f320a2f82b9a0c27af5b50991184e0f, which is 38 commits prior to TF-Mv1.4.0-RC1. I am observing that adding printfs, or otherwise changing the flash alignment and therefore runtime of my code will affect whether the PS reliability test suite passes or not. More specifically, if it triggers a secure fault after x iterations of 2001, or y iterations of 2002, etc. depending on where I put my printfs or otherwise affect the alignment of the code. This is run on the nrf platform as a part of the nrf SDK. Test Suite PS reliability tests (TFM_PS_TEST_2XXX)... 'repetitive sets and gets in/from an asset' 'repetitive sets, gets and removes' It does not reproduce under GDB and I am unable to unwind the backtrace from the secure fault handler. Any tips about recovering a backtrace from a secure fault handler would also be appreciated. #0 SecureFault_Handler () at /home/sebo/ncs/modules/tee/tfm/trusted-firmware-m/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c:96 #1 0xffffffb4 in ?? () I have not been able to reproduce it in the latest upstream TF-M release/revision, but that could just be because I haven't been able to hit the race condition. Sebastian Bøe

3 years, 5 months

2
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[ATTENTION REQUIRED] Manifest Tool being aware of Secure Partition enabled status when building

by Kevin Peng

Hi, I worked out a patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12025> to make the Manifest Tool (tfm_parse_manifest_list.py) aware of the Secure Partition status when building. Currently, the tool generates everything and then the Build System picks up the files needed. With the development of FF-M 1.1 feature, we need the tool to be aware of the Secure Partition enabled status to generate SPM configurations. The patch make use of the feature of CMake command configure_file which substitutes variable values referenced as @VAR@ or ${VAR}. It requires the "conditional" attributes in manifest lists to be surrounded by "@" for "${}". Then when you disable some Partition for building, the tool will not generate anything for that Partition such as PID/SID and TF-M Partition load info. So please out of tree Secure Partition manifest lists do the corresponding change to make the tool aware of that any Partitions are DISABLED. The tool currently only takes conditional value "OFF" or "FALSE" as Partitions being disabled, all other values are treated as enabled. This means if you do not make the change in the manifest list, the tool treats all the partitions as enabled always. Best Regards, Kevin

3 years, 5 months

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TF-M release v1.5.0 will start on Nov 15

by Anton Komlev

Hello, Following the updated release strategy, presented on the tech forum today I plan to create the release branch on Nov 13, and freeze project features at that moment. Please review and merge all patches intended for v1.5.0 by the end of this week. Normal development can continue on the main branch without any restriction. Thanks, Anton

3 years, 5 months

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Musca B1 SE build broken?

by Chris.Brand＠infineon.com

Hi, I'm trying to build Musca B1 SE (as part of my work to create a new ns_agent_mailbox partition), and it seems that it has been missed in some HAL API changes: spm/libtfm_spm.a(backend_ipc.o): In function `ipc_system_run': .../secure_fw/spm/ffm/backend_ipc.c:132: undefined reference to `tfm_hal_update_boundaries' spm/libtfm_spm.a(spm_ipc.o): In function `tfm_spm_init': .../secure_fw/spm/cmsis_psa/spm_ipc.c:643: undefined reference to `tfm_hal_bind_boundaries' spm/libtfm_spm.a(spm_ipc.o): In function `do_schedule': .../secure_fw/spm/cmsis_psa/spm_ipc.c:694: undefined reference to `tfm_hal_update_boundaries' spm/libtfm_spm.a(static_load.o): In function `load_irqs_assuredly': .../secure_fw/spm/cmsis_psa/static_load.c:195: undefined reference to `tfm_hal_irq_enable' .../secure_fw/spm/cmsis_psa/static_load.c:198: undefined reference to `tfm_hal_irq_disable' spm/libtfm_spm.a(psa_api.o): In function `tfm_spm_partition_psa_eoi': .../secure_fw/spm/ffm/psa_api.c:830: undefined reference to `tfm_hal_irq_clear_pending' .../secure_fw/spm/ffm/psa_api.c:831: undefined reference to `tfm_hal_irq_enable' spm/libtfm_spm.a(psa_api.o): In function `tfm_spm_partition_irq_enable': .../secure_fw/spm/ffm/psa_api.c:858: undefined reference to `tfm_hal_irq_enable' spm/libtfm_spm.a(psa_api.o): In function `tfm_spm_partition_irq_disable': .../secure_fw/spm/ffm/psa_api.c:876: undefined reference to `tfm_hal_irq_disable' spm/libtfm_spm.a(tfm_core_svcalls_ipc.o): In function `tfm_flih_prepare_depriv_flih': .../secure_fw/spm/cmsis_psa/tfm_core_svcalls_ipc.c:137: undefined reference to `tfm_hal_update_boundaries' spm/libtfm_spm.a(tfm_core_svcalls_ipc.o): In function `tfm_flih_return_to_isr': .../secure_fw/spm/cmsis_psa/tfm_core_svcalls_ipc.c:170: undefined reference to `tfm_hal_update_boundaries' Chris Brand Cypress Semiconductor (Canada), Inc. An Infineon Technologies Company Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com> International Place 13700 V6V 2X8 Richmond Canada www.infineon.com<www.cypress.com> www.cypress.com<http://www.cypress.com> Discoveries<http://www.infineon.com/discoveries> Facebook<http://www.facebook.com/infineon> Twitter<http://www.twitter.com/Infineon> LinkedIn<http://www.linkedin.com/company/infineon-technologies> Part of your life. Part of tomorrow. NOTICE: The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material of Infineon Technologies AG and its affiliated entities which is for the exclusive use of the individual designated above as the recipient. Any review, retransmission, dissemination or other use of, or taking of any action in reliance upon, this information by persons or entities other than the intended recipient is prohibited. If you received this in error, please contact immediately the sender by returning e-mail and delete the material from any computer. If you are not the specified recipient, you are hereby notified that all disclosure, reproduction, distribution or action taken on the basis of this message is prohibited.

3 years, 5 months

2
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Technical Forum call - Nov 11

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Nov 11, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 5 months

1
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lpcxpresso55s69 builds broken

by Thomas Törnblom

More breakage: In file included from ../secure_fw/spm/include/tfm_arch.h:19, from ../secure_fw/spm/cmsis_psa/spm_ipc.h:13, from ../secure_fw/partitions/idle_partition/load_info_idle_sp.c:10: ../secure_fw/spm/include/tfm_arch_v8m.h:58:2: error: #error "VTOR not present, check configurations." 58 | #error "VTOR not present, check configurations." | ^~~~~ ninja: build stopped: subcommand failed. Same issue with IAR. /Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 5 months

3
13
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PSoC64 TF-M - Port to CYB06447BZI-D54

by Cristiano Rodrigues

Hi guys, I am trying to put tf-m running in the PSoC64 board. However, I have a board that is slightly different from the one used by default in the tf-m. (I have *CYB06447BZI-D54* and the default tf-m is prepared to *CYS0644xxZI-S2D44). *For what I saw, the main difference among them is in memory, *CYB06447BZI-D54 *has 1MB of flash and 256kB of RAM and *CYS0644xxZI-S2D44 *has 2MB of Flash and 1MB of RAM. So now I'm trying to make a small port from tf-m to *CYB06447BZI-D54. * I changed the flash size in the flash_layout.h file to meet the *CYB06447BZI-D54 *flash size, however, I am having some difficulties in changing the RAM size. I am trying to change the RAM partitions size in region_defs.h and the smpu definitions of that partitions in smpu_config.h, but without much success. My question are: - Is possible to do the porting? Or does *CYB06447BZI-D54* not have enough memory to run tf-m? - If possible, what is I missing? Are more changes needed than I'm making? Best regards, Cristiano Rodrigues

3 years, 5 months

2
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Key derivation from HUK in NS application

by Kevin Townsend

Hi, I need to derive a new key from the HUK using HKDF, but are we able to request key derivation with the HUK from the NS side, or would we need to create a custom ARoT partittion for that? The requirements are identical to what PS does here with HKDF -- no salt and a fixed 'info' value, resulting in a key that is device-bound and can be regenerated at startup with no storage requirements: https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig… (that API usage looks to be out of date, BTW, since "psa_open_key" now takes two params). I tried to do something similar from the NS side, modifying this code https://github.com/zephyrproject-rtos/zephyr/blob/main/samples/tfm_integrat… ..., but get an error when trying to open the HUK with "TFM_CRYPTO_KEY_ID_HUK". That isn't surprising, but is there any alternative to generate keys from the HUK without a custom ARoT service? The fact that no storage is required when deriving from the HUK is significant. Best regards, Kevin

3 years, 5 months

1
0
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Using software random generator for FIH library

by Roman.Mazurak＠infineon.com

Hi all, Does anyone know if using software random generator seeded with TRNG to provide random delays for Fault Injection Hardening library is correct from PSA Level 3 certification point of view? The basic idea is to : 1. Use TRNG to provide seed for software random generator on fih_delay_init. 2. Use software random generator to implement fih_delay_random. 3. Periodically reseed software random generator with data from TRNG (optional). Thanks, Roman.

3 years, 5 months

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Commit b8bc0d2a breaks Musca_S1

by Thomas Törnblom

Appears there are more recent breakage. b8bc0d2a "HAL: Expand the scope of tfm_hal_platform_init API" breaks Musca_S1 /Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 5 months

2
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fce78aef breaks psoc64 console output with IARARM and ARMCLANG toolchain

by Thomas Törnblom

The current version breaks console output for the secure partition on psoc64 with IAR or ARMCLANG. Appears to work with GNUARM. It appears that this commit is the culprit: fce78aef Platform: Duplicate the tfm_hal_platform_init The console starts out good, then during tests only garbage is seen. Linker script issues? /Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 5 months

4
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BL2 builds, no "PYTHON_EXECUTABLE" defined

by Thomas Törnblom

While attempting to build for the musca_s1, with mcuboot, on Windows, the build failed very late and brought up a Code Writer window on my screen. I nailed it down to no "PYTHON_EXECUTABLE" being defined while processing bl2/ext/mcuboot/CMakeLists.txt, which caused the build line to just attempt to run wrapper.py, with no interpreter, and windows brought up the appropriate tools to write python code. Adding "-DPYTHON_EXECUTABLE=python" to the cmake line fixed that, but it seems that this shouldn't be needed. The build tools should handle this, or? There is a line: #! /usr/bin/env python3 in wrapper.py, and I assume linux will handle this appropriately, but it doesn't seem windows does. Cheers, Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 6 months

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Flash definitions usage

by Bohdan.Hunko＠infineon.com

Hi everyone, I was trying to understand usage of TOTAL_ROM_SIZE and FLASH_TOTAL_SIZE from musca_b1/sse_200/partitions/flash_layout.h file. I haven't found any usage of these definitions. Does anyone know what is the reason to have them defined? Regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 6 months

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Inline asm syntax unified and symbol reference in IAR toolchain

by Ken Liu

Hi Thomas and all, I noticed there are some #if !defined(__ICCARM__) ".syntax unified \n" #endif In source code, looks like ".syntax unified" is not support in IAR, is that true? If it could not be supported in a short term, we can define some wrapper such as: #ifdef __ICCARM__ #define CLAIM_SYNTAX_UNIFIED "\n" #else #define CLAIM_SYNTAX_UNIFIED ".syntax unified \n" #endif Another question is about the: #if defined(__ICCARM__) #pragma required = do_schedule #endif If we claim do_schedule in the constraints, is the above "#pragma required" still needed? __asm (".... :: "i"(do_schedule)); We can create a patch to test this - using a constraint looks more proper. Thanks. /Ken

3 years, 6 months

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Re: [TF-M] System reset

by Andrew Thoelke

Hi Sebastian, The section in the Platform Security Model is describing the behavior of a system reset – the recommendation is that any preceding runtime state (in volatile memory, or in CPU or peripheral registers) does not influence the execution of the reboot. This is except for an optional suspend or hibernate state, which explicitly maintains runtime state while powering off most or all of the system and will resume via a CPU reset. System security requirements might require explicit clearing of volatile memory on reset to prevent cold-boot style attacks that could allow an attacker to read any residual RAM contents – although software-based attacks of this kind are partly mitigated by trusted boot, which prevents an attacker from running arbitrary code at reset (unlike devices that boot from untrusted flash memory). The specific bullet list in the PSA Firmware Framework for M (in §3.5.1 on Panics) is describing the challenges for an implementation that does NOT do the recommended action of resetting the system when a Secure Partition panics, which justifies the recommendation to reset the system. If the SPM does reset the system, then the challenges in that bullet list are avoided. The issues listed are: > * An individual Secure Partition cannot be reset and restarted in isolation. > * A Secure Partition may have state maintained on behalf of clients that will be destroyed when restarting the service. There is no mechanism to re-synchronize the clients. > * It is not possible to determine at the point of panic how much corruption has occurred within the Secure Partition and elsewhere in the SPE. If the SPM only restarted the Secure Partition that panicked, then any previous runtime state within that Secure Partition is lost, including any ongoing connections with clients of services within that partition, or any resources that those services were managing for their clients. FF-M does not provide a specified mechanism for such clients to be informed that the connections are broken, and there is no way to provide a general strategy that allows a client to recover from a service failure. This is what is meant by “There is no mechanism to re-synchronize the clients.”. I have just realized that in FF-M 1.1, there may be scenarios in which restarting a Secure Partition could be justified and technically feasible. If a Secure Partition with only Stateless services maintains no client state or resources, and also maintains no connections to other RoT Services (so there are no RoT Services maintaining state for this Secure Partition) – then restarting this Secure Partition might not suffer from the first two complications listed in §3.5.1. The third issue is harder to control: the risks from the data corruption that lead up to the panic depends partly on the SPE isolation policies, and on what this Secure Partition was responsible for. Reset remains the recommended response to a Secure Partition panic in v1.1.0. Regards, Andrew Thoelke Arm Ltd. From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: 26 October 2021 10:51 To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] System reset Hi Sebastian, The specification writer looks not here these two days, let me try to explain it based on my understanding. I think two specs both recommend clearing general runtime data while resetting. If the booting runtime clearing code can clear the RAM data for a specific platform, the memory clearing in the 'tfm_spm_hal_system_reset ' can be skipped. Basically, simple hardware reset triggering is just fine. The special-purpose memory to be retained during resetting is not a generic runtime memory, hence they need to be treated specially, such as putting them in a special bank or region and skipping clearing them during booting. This special region can be treated as a private asset of one service, which could NOT be shared between components for direct access. The owner service provides the functionality around this asset. Please put more comments or corrections, thanks. /Ken From: TF-M <mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Sebastian Bøe via TF-M Sent: Monday, October 25, 2021 3:16 PM To: mailto:tf-m@lists.trustedfirmware.org Subject: [TF-M] System reset Hi, I would like some clarification about system reset. There are these two statements about it in the PSM and PSA-FF: "No run-time state from before the reset should be retained or used, except where necessary if suspend or hibernate are supported, see section 4.6." -- PSM page 22. "A Secure Partition may have state maintained on behalf of clients that will be destroyed when restarting the service." -- PSA-FF page 47. Is it the responsibility of tfm_spm_hal_system_reset to destroy this state or is it OK to destroy it after reset as a part of the C runtime startup procedure? I assume for instance that PRoT .bss is cleared as a part of the C runtime startup procedure, but should it also have been destroyed as a part of tfm_spm_hal_system_reset ? PSM - Platform Security Model. https://developer.arm.com/documentation/den0128/0100/ PSA-FF PSA Firmware Framework https://armkeil.blob.core.windows.net/developer/Files/pdf/PlatformSecurityA… Sebastian Bøe Nordic Semiconductor

3 years, 6 months

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[PLATFORM ATTENTION REQUIRED] Unify the HAL APIs for IPC Model

by Kevin Peng

Hi all, I'm been working to unify the HAL APIs for IPC Model. The IPC Model currently uses two different sets of HAL APIs: * tfm_spm_hal_* - This is mainly used by the Library Model and IPC Model re-uses some of them * tfm_hal_* - This is introduced for IPC Model and some are shared to Library Model This might be confusing for platform vendors. So I'm trying to make it clear for IPC Model by: * Duplicating the shared APIs and rename the IPC copy to tfm_hal_* * Combining several platform init APIs to a single tfm_platform_init for IPC Model * tfm_spm_hal_enable_fault_handlers * tfm_spm_hal_system_reset_cfg * tfm_spm_hal_init_debug * tfm_spm_hal_nvic_interrupt_target_state_cfg * tfm_spm_hal_nvic_interrupt_enable With these changes, IPC Model will use tfm_hal_* APIs only. Please platform owners review these patches<https://review.trustedfirmware.org/q/topic:%22decouple_legacy_hal_for_ipc%2…> to see if any mistakes (the patches mainly move codes around) or any platforms missed in the patches. Plan to have them merged before the end of October. Thanks. Best Regards, Kevin

3 years, 6 months

1
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System reset

by Sebastian Bøe

Hi, I would like some clarification about system reset. There are these two statements about it in the PSM and PSA-FF: "No run-time state from before the reset should be retained or used, except where necessary if suspend or hibernate are supported, see section 4.6." -- PSM page 22. "A Secure Partition may have state maintained on behalf of clients that will be destroyed when restarting the service." -- PSA-FF page 47. Is it the responsibility of tfm_spm_hal_system_reset to destroy this state or is it OK to destroy it after reset as a part of the C runtime startup procedure? I assume for instance that PRoT .bss is cleared as a part of the C runtime startup procedure, but should it also have been destroyed as a part of tfm_spm_hal_system_reset ? PSM - Platform Security Model. https://developer.arm.com/documentation/den0128/0100/ PSA-FF PSA Firmware Framework https://armkeil.blob.core.windows.net/developer/Files/pdf/PlatformSecurityA… Sebastian Bøe Nordic Semiconductor

3 years, 6 months

2
1
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ITS File System Enhancement

by Sherry Zhang

Hi, I created patches to add the XOR checksum of the whole metadata into the ITS metadata_block header. This is to check the possible error in the flash. It can happen that the ITS file system is upgraded to the new one while the ITS assets are maintained with the current ITS file system. To support compatibility with the current ITS filesystem version, at the initialization of the file system, the file metadata and the block metadata, together with the metadata_block_header are updated to the new ITS file system. The patches are: https://review.trustedfirmware.org/q/topic:%22ITS_FILESYSTEM%22+(status:ope… Would you like to review the patches? Any comments are welcomed! Regards, Sherry Z

3 years, 6 months

1
0
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PSoC scheduling broken

by Chris.Brand＠infineon.com

Running regression tests with the current HEAD, the secure tests all pass but the non-secure tests get stuck early on (I suspect that responses don't get back to the NS core). Reverting 5e68b11764673ee32bae0de8ecf3cde45cc55ea1 "SPM: Trigger scheduler at the end of SPM API" fixes the issue. Was that patch tested with multi-core? I created a patch to revert that patch for now - https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11998 Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

3 years, 6 months

2
5
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Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

by Singh, Yaduvir

Hi All, I want to enable GPIO IRQ in Trusted firmware-m 1.3 on nrf5340DK. I have TFM 1.3 which comes with zephyr v2.7.0 image flashed to board. followed the steps of https://www.trustedfirmware.org/docs/tech_forum_20210819BriefUpdatesInterru… and tfm_slih_test_service which has TIMER0 interrupt handler. Steps1: Assigning the interrupt GPIOTE0 and TIMER0 in secure partition manifest file. Steps2: Assigning the MMIO region of GPIOTE0 and TIMER0 in secure partition manifest file. Step3: Enable(psa_irq_enable) for both GPIOTE0,TIMER0 and Start (tfm_plat_test_secure_timer_start) the TIMER0. Step4: waiting for interrupt SIGNAL defined in secure partition manifest file for GPIOTE0 and TIMER0) using psa_wait(PSA_WAIT_ANY, PSA_BLOCK) in the secure partition source code. But do not receive any signal for TIMER0 and GPIOTE0. Q1) at least TIMER0 signal should be received after the timer start? Q2)Are there any steps i missed to enable IRQ in TFM secure partition? Q3)Also, for GPIOTE i need to enable IRQ on the particular pin of port0 ex P0.8, How can i know the signal generated for the interrupt is for P0.8? Q4)In tfm_secure_irq_handling.rst it mentions "it is important the macro name matches the platform's handler function for that IRQ source." - In case ``source`` is defined IRQ macro, the name of the handler becomes ``void <macro>_Handler(void)``. I do not understand why we need to have a handler function name matching with IRQ source when we have to wait on psa_wait(PSA_WAIT_ANY, PSA_BLOCK) for IRQ signal? Step1,Step2 /*#####################################################################*/ modules\tee\tfm\trusted-firmware-m\platform\ext\target\nordic_nrf\common\nrf5340\tfm_peripherals_def.h #ifndef __TFM_PERIPHERALS_DEF_H__ #define __TFM_PERIPHERALS_DEF_H__ #include <nrf.h> #ifdef __cplusplus extern "C" { #endif #define TFM_TIMER0_IRQ (TIMER0_IRQn) #define TFM_TIMER1_IRQ (TIMER1_IRQn) #define TFM_GPIOTE0_IRQ (GPIOTE0_IRQn) #define TFM_SPIM4_IRQ (SPIM4_IRQn) struct platform_data_t; extern struct platform_data_t tfm_peripheral_std_uart; extern struct platform_data_t tfm_peripheral_timer0; extern struct platform_data_t tfm_peripheral_std_gpiote0; extern struct platform_data_t tfm_peripheral_std_spim4; #define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart) #define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0) #define TFM_PERIPHERAL_GPIOTE0 (&tfm_peripheral_std_gpiote0) #define TFM_PERIPHERAL_SPIM4 (&tfm_peripheral_std_spim4) #define TFM_PERIPHERAL_FPGA_IO (0) #ifdef __cplusplus } #endif #endif /* __TFM_PERIPHERALS_DEF_H__ */ modules\tee\tfm\trusted-firmware-m\platform\ext\target\nordic_nrf\common\nrf5340\target_cfg.c struct platform_data_t tfm_peripheral_timer0 = { NRF_TIMER0_S_BASE, NRF_TIMER0_S_BASE + (sizeof(NRF_TIMER_Type) - 1), }; struct platform_data_t tfm_peripheral_std_uart = { NRF_UARTE1_S_BASE, NRF_UARTE1_S_BASE + (sizeof(NRF_UARTE_Type) - 1), }; struct platform_data_t tfm_peripheral_std_gpiote0 = { NRF_GPIOTE0_S_BASE, NRF_GPIOTE0_S_BASE + (sizeof(NRF_GPIOTE_Type) - 1), }; struct platform_data_t tfm_peripheral_std_spim4 = { NRF_SPIM4_S_BASE, NRF_SPIM4_S_BASE + (sizeof(NRF_SPIM_Type) - 1), }; /*Secure partition manifest file change*/ samplepartition.yaml { "psa_framework_version": 1.1, "name": "TFM_SP_sample", # Possible options: "PSA-ROT | APPLICATION-ROT" "type": "APPLICATION-ROT", "priority": "NORMAL", "model": "IPC", "entry_point": "sample_partition_main", "stack_size": "0x200", "services": [ # Define the secure service here. { "name": "TFM_EXAMPLE_SERVICE", # SIDs must be unique, ones that are currently in use are documented in # tfm_secure_partition_addition.rst on line 184 "sid": "0x00001001", "non_secure_clients": true, "version": 1, "version_policy": "STRICT" }, ], # Define all the IRQs that the service wants to handle. "mmio_regions": [ { "name": "TFM_PERIPHERAL_GPIOTE0", "permission": "READ-WRITE" }, { "name": "TFM_PERIPHERAL_SPIM4", "permission": "READ-WRITE" }, { "name": "TFM_PERIPHERAL_TIMER0", "permission": "READ-WRITE" }, ], "irqs": [ { "source": "TFM_GPIOTE0_IRQ", "name": "TFM_GPIOTE0_IRQ", "handling": "SLIH", "tfm_irq_priority": 64, }, { "source": "TFM_SPIM4_IRQ", "name": "TFM_SPIM4_IRQ", "handling": "SLIH", "tfm_irq_priority": 64, }, { "source": "TFM_TIMER0_IRQ", "name": "TFM_TIMER0_IRQ", "handling": "SLIH", "tfm_irq_priority": 64, } ], "dependencies": [ "TFM_CRYPTO" ] } Step3, Step4 /*#####################################################################*/ /*Secure partition Code*/ sample_partition.c #define TIMER_RELOAD_VALUE (1*1000*1000) static void gpiote0_handler(void) { LOG_INFFMT("gpiote0_handler called!!\n"); psa_irq_disable(TFM_GPIOTE0_IRQ_SIGNAL); psa_eoi(TFM_GPIOTE0_IRQ_SIGNAL); } static void spim4_handler(void) { LOG_INFFMT("spim4_handler called !\n"); psa_irq_disable(TFM_SPIM4_IRQ_SIGNAL); psa_eoi(TFM_SPIM4_IRQ_SIGNAL); } static void timer0_handler(void) { LOG_INFFMT("timer0_handler called!\n"); psa_irq_disable(TFM_TIMER0_IRQ_SIGNAL); psa_eoi(TFM_TIMER0_IRQ_SIGNAL); } static void timer_init(NRF_TIMER_Type * TIMER, uint32_t ticks) { nrf_timer_mode_set(TIMER, NRF_TIMER_MODE_TIMER); nrf_timer_bit_width_set(TIMER, NRF_TIMER_BIT_WIDTH_32); nrf_timer_frequency_set(TIMER, NRF_TIMER_FREQ_1MHz); nrf_timer_cc_set(TIMER, NRF_TIMER_CC_CHANNEL0, ticks); nrf_timer_one_shot_enable(TIMER, NRF_TIMER_CC_CHANNEL0); } static void timer_stop(NRF_TIMER_Type * TIMER) { nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_STOP); nrf_timer_int_disable(TIMER, NRF_TIMER_INT_COMPARE0_MASK); nrf_timer_event_clear(TIMER, NRF_TIMER_EVENT_COMPARE0); } static void timer_start(NRF_TIMER_Type * TIMER) { timer_stop(TIMER); nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_CLEAR); nrf_timer_int_enable(TIMER, NRF_TIMER_INT_COMPARE0_MASK); nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_START); } void tfm_plat_test_secure_timer_start(void) { timer_init(NRF_TIMER0, TIMER_RELOAD_VALUE); timer_start(NRF_TIMER0); } void tfm_plat_test_secure_timer_stop(void) { timer_stop(NRF_TIMER0); } void sample_partition_main(void) { psa_signal_t signals; psa_irq_enable(TFM_SPIM4_IRQ_SIGNAL); psa_irq_enable(TFM_GPIOTE0_IRQ_SIGNAL); /*Start timer interrupt*/ psa_irq_enable(TFM_TIMER0_IRQ_SIGNAL); tfm_plat_test_secure_timer_start(); /* Continually wait for one or more of the partition's RoT Service or * interrupt signals to be asserted and then handle the asserted signal(s). */ while (1) { signals = psa_wait(PSA_WAIT_ANY, PSA_BLOCK); if (signals & TFM_GPIOTE0_IRQ_SIGNAL) { gpiote0_handler(); }else if (signals & TFM_SPIM4_IRQ_SIGNAL) { spim4_handler(); }else if (signals & TFM_TIMER0_IRQ_SIGNAL) { timer0_handler(); } else { psa_panic(); } } } /*#####################################################################*/ Thanks Yaduvir

3 years, 6 months

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Re: [TF-M] [ATTENTION] SPM Update: Secure Partition build flag 'CONFIG_TFM_BUILDING_SPE' required.

by Ken Liu

Hi everyone, If you are creating out-of-tree partitions, please assign c-flag 'CONFIG_TFM_BUILDING_SPE' to the partitions sources. The reason is that FFM client header is used by both SPE and NSPE clients, and SPE would support multiple ABI methods and these methods can co-exist in the system, this flag can help the partition to choose correct ABI for FFM API. Check here for an example: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11897/11/sec… Or do you think choosing one ABI as the default ABI (default ABI owns the spec originally defined symbols) should work? Any comments please feel free to raise. BR. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Wednesday, October 20, 2021 3:12 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [ATTENTION] SPM logic is under significant updating before End of Oct Hi, To support FFM 1.1 features (SFN mainly), the SPM logic is under significant updating till End of Oct, please: - If you are doing release-targeted development, please based on the released tags. - If you are developing with the latest master branch, please report bugs met. Our plan is to collect all bugs and fix them after this update, before the next release. - Keen to receive your fixes and contributions. It would be very nice if you can do these. All patches would go as a usual process, hence it should work for most of the configurations, except those not covered by the automation test. The platform related interfaces are not changing, hence no worry for platform owners. Thanks! /Ken

3 years, 6 months

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Re: [TF-M] Sending events from TF-M to non-secure world?

by Li, Jun R

Hi Ken, Thanks for the suggestions! Actually on the chip we are using (Nordic SoC), there is an event generator unit we can use directly without the needs to do hardware changes. I would like to try that approach. The reason we can't do polling is that the events are generated during the enrollment process. I don't think that our biometric secure partition is reentrant while a process is onging, right? It is using just the single thread model. Regards, Jun Message: 1 Date: Wed, 20 Oct 2021 05:43:23 +0000 From: Ken Liu <Ken.Liu(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Message-ID: <DB9PR08MB676161D704B2D3D861283E6CF5BE9(a)DB9PR08MB6761.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" Hi Jun, To trigger an interrupt by software, Register 'STIR' may help you. The scenario you are describing is a practical use case hence it makes sense to think more about it. The scenarios you are describing is more related to the programming model - As the SPE is working more like a library, the NS caller polling the status of secure services by service interfaces and updating local presenting are more straight (and simple). And if you have involved a callback/event-based programming model into your secure service already (3rd party provided such a library, e.g.), you'll have to invent some mechanism to interactive with NS. From the Firmware Framework - M perspective, the peripheral is private to a partition, you can treat shared peripheral/memory as private resources to this partition, claim it in the manifest, and use it to communicate with NS. This shared peripheral (Aka MMIO in the specification) is private, it cannot be shared with other partitions. More comments? BR. /Ken -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Li, Jun R via TF-M Sent: Tuesday, October 19, 2021 10:42 PM To: tf-m(a)lists.trustedfirmware.org Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Hi Ken, Thanks for the nice suggestions! I was thinking of using an interrupt from TF-M to NS world as well but that needs some hardware support, which should be fine since I'm still designing the device. Maybe there is a software interrupt solution? Our application needs to put a biometric service inside TF-M and its enrollment process needs to send out some intermediate events to give the user some feedbacks. This is why I'm asking this question. I think TF-M can use an input buffer from NS world to store the new events and notify the NS world with the interrupt to fetch the new events. Sounds good? Regards, Jun On 10/19/21, 00:23, "TF-M on behalf of tf-m-request(a)lists.trustedfirmware.org" <tf-m-bounces(a)lists.trustedfirmware.org on behalf of tf-m-request(a)lists.trustedfirmware.org> wrote: Send TF-M mailing list submissions to tf-m(a)lists.trustedfirmware.org To subscribe or unsubscribe via the World Wide Web, visit https://lists.trustedfirmware.org/mailman/listinfo/tf-m or, via email, send a message with subject or body 'help' to tf-m-request(a)lists.trustedfirmware.org You can reach the person managing the list at tf-m-owner(a)lists.trustedfirmware.org When replying, please edit your Subject line so it is more specific than "Re: Contents of TF-M digest..." Today's Topics: 1. Re: Sending events from TF-M to non-secure world? (Ken Liu) 2. Inline asm syntax unified and symbol reference in IAR toolchain (Ken Liu) ---------------------------------------------------------------------- Message: 1 Date: Tue, 19 Oct 2021 02:06:35 +0000 From: Ken Liu <Ken.Liu(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Message-ID: <DB9PR08MB67613655A2ACA207C751C791F5BD9(a)DB9PR08MB6761.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" Hi Jun, Basically, the service accessing model is a client-service model, hence the service won't call back to the client which makes the client a 'service'. Service can get client info by passed-in parameters and other SPM controlled channels. Assuming you are using a Trustzone based hardware, the hardware provides the capability that calling back to NSPE, but it is not encouraged inside TF-M because it breaks the simplified model proposed by FF-M and difficulties the secure threat analysis - a simple case is that the secure context is blocked because it is waiting for NS returns. If you do need to perform such operations, implement an interrupt based asynchronous mechanism is safer than software callbacks. The most queried requirement we have met is someone querying if the execution can be delivered back to NSPE when secure IDLE is going to happen. Not sure if you are facing the similar, is it okay to share more details? BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Li, Jun R via TF-M Sent: Tuesday, October 19, 2021 12:20 AM To: tf-m(a)lists.trustedfirmware.org Subject: [TF-M] Sending events from TF-M to non-secure world? Hi, Anyone has idea how a service inside a secure partition can send out some events to the non-secure world? Does callback still work over IPC? It seems non-secure world can connect to a SP but not easy to do the other way. Appreciate any comments or suggestions! Jun Intel Corporation @ SC, CA -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.trustedfirmware.org/pipermail/tf-m/attachments/20211019/1ff875…> -- TF-M mailing list TF-M(a)lists.trustedfirmware.org https://lists.trustedfirmware.org/mailman/listinfo/tf-m

3 years, 6 months

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Re: [TF-M] Supporting encryption with ITS

by Vasilakis, Georgios

Hey Andrew, These are very valuable points! For us I think that we aim mainly for per key integrity and confidentiality on the key material and integrity only for the key metadata. Providing confidentiality for the whole keystore will need major changes in the PSA APIs and will be out of scope for us. Providing per key confidentiality for the key material is a very straightforward change as you described. ITS will not need to change at all in this case, we will only modify the PSA crypto APIs. Providing per key integrity for key metadata will need a bit more thinking since apart from the fields included in the psa_persistent_key_storage_format we will also need the fields from the psa_storage_info_t struct but this should not be a serious issue as well. To conclude I think that we need to design the changes so that it is possible for platforms to implement these two requirments but we don't need to enforce them. I think that we need to have the flexibility to allow platforms to make their decisions on what they want to support depending on their needs. If, for example, a platform wants to support only confidentiality on the key material, they should be able to do that in my opinion. Since we are discussing platform specific implementations, the IV or any additional data needed could be probably stored (hidden to the PSA APIs) inside a platform specific struct inside the psa_persistent_key_storage_format struct. This will minimize the storage requirements for each platform. Regards, George ________________________________ From: Kvamtrø, Frank Audun <frank.kvamtro(a)nordicsemi.no> Sent: Wednesday, October 20, 2021 3:13 PM To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no> Subject: Vs: [TF-M] Supporting encryption with ITS ________________________________ Fra: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> på vegne av Andrew Thoelke via TF-M <tf-m(a)lists.trustedfirmware.org> Sendt: onsdag 20. oktober 2021 10:31 Til: tf-m(a)lists.trustedfirmware.org <tf-m(a)lists.trustedfirmware.org> Kopi: nd <nd(a)arm.com> Emne: Re: [TF-M] Supporting encryption with ITS Hi, Note that, by specification, ITS must provide confidentiality, integrity and replay protection for the data stored within it. However, if the platform already provides that protection via isolation/logical/physical mechanisms, then adding cryptographic protection provides some defence in depth, or may mitigate some forms of physical attack. In this case, it is not obvious what forms of cryptographic protection are needed, as cryptography is not providing the primary security properties for the ITS data. As a result, I think the best design for this requirement will depend on the details of the protection that is required. In this use case, which of the following types of cryptographic protection are needed: 1. Confidentiality of key material (the actual bits of the key data) 2. Confidentiality of key material and key metadata 3. Confidentiality of the full keystore 4. Per-key Integrity of key material 5. Per-key Integrity of key material and key metadata 6. Per-key Confidentiality and Integrity of key material and key metadata 7. Confidentiality and integrity of the full keystore 8. Rollback protection? Per-key confidentiality, or confidentiality+integrity would be reasonably straight-forward to implement in a layer over the simple ITS storage – but would probably add IV or nonce+tag data to each key stored (assuming a HUK-derived encryption key is used). For just encryption, given the pseudo-random nature of secret keys – it might be possible to drop the need for random IV (and just use the client id + key id as an IV/nonce). Full key store confidentiality or confidentiality+integrity requires much more complex design, as this aims to conceal and protect the identity of the keys that are stored, not just the key material and/or key metadata. Regards, Andrew From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Vasilakis, Georgios via TF-M Sent: 19 October 2021 14:31 To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Supporting encryption with ITS Hello again, sorry for the second email by my formatting got lost in the first one unfortunately. Let me include the formatted context below: Following the discussion regarding the encryption with ITS let's discuss a bit further the ideas discussed in the meeting. 1)Allow the protected storage to be used as a storage backend for persistent key storage in PSA crypto: This introduces the problem of reentrance that we discussed before. We cannot call crypto from the inside the PSA storage partition (either ITS of PS if we wanted to switch) 2)Do the encryption in the crypto partition instead of the ITS: This will require to create some platform specific encryption abstraction since we cannot have reentrance in PSA crypto as well. Meaning that we cannot call PSA crypto from PSA crypto. The main thing that needs to be solved in this solution is where can we store the metadata. The key itself can be derived from the HUK and does not need to be stored but the metadata need to be stored. These metadata can be stored by expanding the psa_storage_info_t struct or by introducing a new struct. The crypto storage apis will need to be modified to be aware of the extra information and handle them. 3)Put a frontend to ITS so that we select specific keys that need to be derived by the HUK. This is like the idea 2 I think in a concept level. The previous two designs described in the mailing list was to refactor the ITS and the PS partitions to have a common "encryption" library and the idea of refactoring the ITS itself to have an encryption layer. I personally prefer the solution 2 more than the other solutions. Moving the encryption in a higher level and using the ITS as a simple storage solution seems a cleaner approach. This will introduce a crypto abstraction layer (different than PS) but I don't consider it as a major disadvantage since all the crypto implementations in this scope will be very platform specific. Let me know about your opinions on this, if there are no major objections, I am willing to design a solution and some header files to elaborate more on this design. ________________________________ From: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Sent: Tuesday, October 19, 2021 3:18 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Supporting encryption with ITS Hello all, Following the discussion regarding the encryption with ITS let's discuss a bit further the ideas discussed in the meeting. Allow the protected storage to be used as a storage backend for persistent key storage in PSA crypto: This introduces the problem of reentrance that we discussed before. We cannot call crypto from the inside the PSA storage partition (either ITS of PS if we wanted to switch) Do the encryption in the crypto partition instead of the ITS: This will require to create some platform specific encryption abstraction since we cannot have reentrance in PSA crypto as well. Meaning that we cannot call PSA crypto from PSA crypto. The main thing that needs to be solved in this solution is where can we store the metadata. The key itself can be derived from the HUK and does not need to be stored but the metadata need to be stored. These metadata can be stored by expanding the psa_storage_info_t struct or by introducing a new struct. The crypto storage apis will need to be modified to be aware of the extra information and handle them. Put a frontend to ITS so that we select specific keys that need to be derived by the HUK. This is like the idea 2 I think in a concept level. The previous two designs described in the mailing list was to refactor the ITS and the PS partitions to have a common "encryption" library and the idea of refactoring the ITS itself to have an encryption layer. I personally prefer the solution 2 more than the other solutions. Moving the encryption in a higher level and using the ITS as a simple storage solution seems a cleaner approach. This will introduce a crypto abstraction layer (different than PS) but I don't consider it as a major disadvantage since all the crypto implementations in this scope will be very platform specific. Let me know about your opinions on this, if there are no major objections, I am willing to design a solution and some header files to elaborate more on this design. Regards, George ________________________________ From: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Sent: Wednesday, September 29, 2021 2:04 PM To: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Supporting encryption with ITS Hello Sherry, Thank you for the feedback! Does the storage area on your device meet this requirement? Yes, our devices can secure against read and write access through the dedicated peripherals (SPU + MPU). Is the memory physically isolated? If by that you mean if they are located outside of the chip then it is not. It is part of the package. If not, I wonder why not uses the Protected Storage service instead? The reason that we cannot use the protected storage service is that it is not supported as a storage backend by the PSA crypto APIs. Storing non-volatile keys right now using the PSA APIs uses ITS as a storage backend. Your comments regarding storing the IV and the TAG in Protected Storage are, of course, valid. If we decide to use a common code base we will have to do changes in the design of both services to overcome these issues. Overall, the motivation for encrypted ITS is based on the raising popularity of hardware-based attacks. The fact that right now we provide all the security measures needed does not mean that nothing will get compromised in the future. A security in depth approach seems more reasonable for such sensitive data. I am happy to join the TF-M Tech forum this Thursday and discuss it further, yes! Regards, George ________________________________ From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: Tuesday, September 28, 2021 12:20 PM To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [TF-M] Supporting encryption with ITS Hi George, The ITS without encryption is not a compromised RoT. In the PSA Secure Storage API spec, the PSA Internal Trust Storage aims at providing a place for devices to store their most intimate secrets. Also “””””””””””””””””””” 1. The storage underlying the PSA Internal Trusted Storage Service MUST be protected from read and modification by attackers with physical access to the device. 2. The storage underlying the PSA Internal Trusted Storage Service MUST be protected from direct read or write access from software partitions outside of the PSA Root of Trust (PRoT). “””””””””””””””””””” So, for internal trusted storage service, it requires the underlying storage itself should provide being read or write protection. The storage area should be a “trusted” area. Does the storage area on your device meet this requirement? Is the memory physically isolated? If not, I wonder why not uses the Protected Storage service instead? For the design of adding encryption in ITS, in the PS partition, the `iv` and the encrypted object data are stored with the object file while the tag of each object is stored with the object table file. So, if encrypt the PS object in the ITS file system, how the PS partition get the `tag` of each object? After a rough thought, I think probably a standalone encryption for ITS is more reasonable. As this is a relatively “big topic”, would you like to hold a discussion on the TF-M Tech forum if it is not limited by confidential information? The next Tech forum will be hold on this Thursday 3:00 PM UTC time. Regards, Sherry Zhang From: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Sent: Friday, September 24, 2021 8:52 PM To: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Supporting encryption with ITS Hello Sherry, Thank you for your input! 1. Our threat model is more concerned about attacks which can happen very early in the boot process, I think. A completely compromised RoT is not in our threat model. 2. I see that, ITS is supposed to store small objects. The storage overhead of adding encryption will be probably bigger than 20 bytes I think but the intention is to have this only as a configuration, not as the default option. 3. Agreed, a HAL API should be used for this. Do you have any opinion on the design of it? Do you think that it adds value to do try to use a common design for the object handling of both PS and ITS or is it better to have it as a standalone thing for the ITS. Regards, George ________________________________ From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: Friday, September 24, 2021 11:58 AM To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [TF-M] Supporting encryption with ITS Hi George, Some comments from my side: 1. Internal trusted storage is part of the Root of Trust domain. If ITS storage device is attacked, then the code flash where the PSA Rot SP locates may also be attacked. Does the thread model of your system require the encryption in ITS? 2. The ITS service is intended to be used to interface to a small piece of storage. Encryption would increase the context for each ITS file. For example, similarly to PS object context, the `IV` which is used in encryption as well as the generated `tag` should be added into each file context. They total together can be about more than 20 bytes. 3. If the encryption is mandatory/ necessary required by the thread model of your system, as discussed, the PSA crypto service should not be called to avoid the circular. I think a HAL API for encryption may be created in ITS for platform implementation defined encryption/decryption. Regards, Sherry Zhang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Vasilakis, Georgios via TF-M Sent: Thursday, September 23, 2021 10:47 PM To: Gyorgy Szing <Gyorgy.Szing(a)arm.com<mailto:Gyorgy.Szing@arm.com>>; Fabian Schmidt <fabian.schmidt(a)nxp.com<mailto:fabian.schmidt@nxp.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] Supporting encryption with ITS Hey Gyorgy, These are very valuable comments! I am aware of the circular dependency issue because the PSA apis are using the ITS as a storage backend. This, as you said, can be circumvented by using a software crypto library or an implementation specific API. So, for the encryption a flexible API can be used which can allow externals to use their own function calls. Regarding the key storage, this is what I had in mind as well, using derived keys from the HUK. So that we don't need to store anything but the crypto metadata. Adding another layer of storage will raise more issues, I think. ________________________________ From: Gyorgy Szing <Gyorgy.Szing(a)arm.com<mailto:Gyorgy.Szing@arm.com>> Sent: Thursday, September 23, 2021 4:30 PM To: Fabian Schmidt <fabian.schmidt(a)nxp.com<mailto:fabian.schmidt@nxp.com>>; Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>>; nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [TF-M] Supporting encryption with ITS Hi, AFAIK the main reason for ITS not using encryption is the problem of circular dependency. ITS is used by crypto SP for key storage, so how will crypto fetch the key from ITS to decrypt ITS? You could use a software crypto implementation (another mbed-tls instance) in ITS, but where would you safely store the keys? If you have a two layer ITS, one for only storing the keys for the second instance, and a second, encrypted one, then you end up with something like ITS and PS. You may not need a full blown on-chip FLASH device for ITS. If you have a HUK available, you can derive the same SP specific keys from that at each boot, and store these in RAM backed ITS. You won’t be able to store other keys in ITS in a persistent way of course, but for that you can use PS. Well, something along these lines. Perhaps the TF-M team could help better if you could share some details on why your customer would need encrypted ITS. (A PSA for Cortex-A (TS) maintainer chiming in to a “not his business” discussion here 😉 ) /George From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Fabian Schmidt via TF-M Sent: September 23, 2021 15:51 To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] Supporting encryption with ITS Hi George, I’m wondering if that would add value. To my understanding, ITS was never designed to be encrypted because of the way it’s supposed to be set up. (It’s Internal Trusted Storage.) I believe best practice is to place it in a “trusted” location, one that is ideally only accessible from Secure world, and also ideally on-die. If you then restrict outside access to the internal flash (JTAG, flash programmer ports,…), you’re pretty golden, in that no unauthorized party should be able to read from or write to the ITS.* Let me know if I misunderstand anything about ITS or TrustZone, but that’s my view. Maybe I’m painting an idealized picture. Greetings, Fabian Schmidt * at least short of a sophisticated physical attack or finding some loophole in TrustZone… From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Vasilakis, Georgios via TF-M Sent: Donnerstag, 23. September 2021 15:28 To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [EXT] [TF-M] Supporting encryption with ITS Caution: EXT Email Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

3 years, 6 months

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Technical Forum call - October 28

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, October 28, 15:00-16:00 UTC (US time zone). That session Chris Reed kindly agreed to present "Introduction to pyOCD" - the method to program and debug TF-M and Cortex-M MCUs, in general, using the open-source tool https://pyocd.io/ Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 6 months

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CMAKE library dependency trace tool for TF-M

by Jianliang Shen

Hi all, I'd like to introduce a CMAKE library dependency trace tool to you. This python script can * Search a specific library's dependent libraries and to-be-linked libraries in a list of repo paths. * Draw a diagram to show the link relationship. * Give some other information about: * Include paths * Source files * Compile definitions The main feature of diagram is similar with [CMakeGraphVizOptions]<https://cmake.org/cmake/help/latest/module/CMakeGraphVizOptions.html#cmakeg…>, the differences are: * The new tool can focus on certain library with specific trace depth like 1, 2 and n. * The new tool is not runtime, it is a static search and can search all libraries whose runtime build may be silenced. * The new tool makes the diagram more colourful to be more readable. With this tool, I hope you can get and check the structure of CMAKE library more quickly when developing the code and libraries. I have proposed a patch in tf-m-tools repo: [library dependency trace tool]<https://review.trustedfirmware.org/c/TF-M/tf-m-tools/+/12019>. This tool may not be convenient for everyone of you so here I beg for your feedbacks to make it better. Thanks. Best Regards Jianliang Shen

3 years, 6 months

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[ATTENTION] SPM logic is under significant updating before End of Oct

by Ken Liu

Hi, To support FFM 1.1 features (SFN mainly), the SPM logic is under significant updating till End of Oct, please: - If you are doing release-targeted development, please based on the released tags. - If you are developing with the latest master branch, please report bugs met. Our plan is to collect all bugs and fix them after this update, before the next release. - Keen to receive your fixes and contributions. It would be very nice if you can do these. All patches would go as a usual process, hence it should work for most of the configurations, except those not covered by the automation test. The platform related interfaces are not changing, hence no worry for platform owners. Thanks! /Ken

3 years, 6 months

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Re: [TF-M] Sending events from TF-M to non-secure world?

by Li, Jun R

Hi Ken, Thanks for the nice suggestions! I was thinking of using an interrupt from TF-M to NS world as well but that needs some hardware support, which should be fine since I'm still designing the device. Maybe there is a software interrupt solution? Our application needs to put a biometric service inside TF-M and its enrollment process needs to send out some intermediate events to give the user some feedbacks. This is why I'm asking this question. I think TF-M can use an input buffer from NS world to store the new events and notify the NS world with the interrupt to fetch the new events. Sounds good? Regards, Jun On 10/19/21, 00:23, "TF-M on behalf of tf-m-request(a)lists.trustedfirmware.org" <tf-m-bounces(a)lists.trustedfirmware.org on behalf of tf-m-request(a)lists.trustedfirmware.org> wrote: Send TF-M mailing list submissions to tf-m(a)lists.trustedfirmware.org To subscribe or unsubscribe via the World Wide Web, visit https://lists.trustedfirmware.org/mailman/listinfo/tf-m or, via email, send a message with subject or body 'help' to tf-m-request(a)lists.trustedfirmware.org You can reach the person managing the list at tf-m-owner(a)lists.trustedfirmware.org When replying, please edit your Subject line so it is more specific than "Re: Contents of TF-M digest..." Today's Topics: 1. Re: Sending events from TF-M to non-secure world? (Ken Liu) 2. Inline asm syntax unified and symbol reference in IAR toolchain (Ken Liu) ---------------------------------------------------------------------- Message: 1 Date: Tue, 19 Oct 2021 02:06:35 +0000 From: Ken Liu <Ken.Liu(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Message-ID: <DB9PR08MB67613655A2ACA207C751C791F5BD9(a)DB9PR08MB6761.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" Hi Jun, Basically, the service accessing model is a client-service model, hence the service won't call back to the client which makes the client a 'service'. Service can get client info by passed-in parameters and other SPM controlled channels. Assuming you are using a Trustzone based hardware, the hardware provides the capability that calling back to NSPE, but it is not encouraged inside TF-M because it breaks the simplified model proposed by FF-M and difficulties the secure threat analysis - a simple case is that the secure context is blocked because it is waiting for NS returns. If you do need to perform such operations, implement an interrupt based asynchronous mechanism is safer than software callbacks. The most queried requirement we have met is someone querying if the execution can be delivered back to NSPE when secure IDLE is going to happen. Not sure if you are facing the similar, is it okay to share more details? BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Li, Jun R via TF-M Sent: Tuesday, October 19, 2021 12:20 AM To: tf-m(a)lists.trustedfirmware.org Subject: [TF-M] Sending events from TF-M to non-secure world? Hi, Anyone has idea how a service inside a secure partition can send out some events to the non-secure world? Does callback still work over IPC? It seems non-secure world can connect to a SP but not easy to do the other way. Appreciate any comments or suggestions! Jun Intel Corporation @ SC, CA -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.trustedfirmware.org/pipermail/tf-m/attachments/20211019/1ff875…>

3 years, 6 months

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Re: [TF-M] Enablement of external bl2 builds

by Bohdan.Hunko＠infineon.com

Hi Sherry, So I actually checked issue from last mail ‘When building TFM with CRYPTO_HW_ACCELERATOR=ON and BL2=OFF I am getting this error:’ and turns out everything is fine in master branch, that error is only present in my local branch due to changes I have made. I am glad we have one bug less 😊 Sorry for wrong report. Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com> From: Hunko Bohdan (CSUKR CSS ICW SW FW) Sent: 01 October 2021 12:49 To: Hunko Bohdan (CSUKR CSS ICW SW FW) <Bohdan.Hunko(a)infineon.com>; Sherry.Zhang2(a)arm.com; Brand Chris (CSCA CSS ICW SW PSW 1) <Chris.Brand(a)infineon.com>; Kytsun Hennadiy (CSUKR CSS ICW SW FW) <Hennadiy.Kytsun(a)infineon.com>; Mazurak Roman (CSUKR CSS ICW SW FW) <Roman.Mazurak(a)infineon.com>; Tkachov Kostiantyn (CSUKR CSS ICW SW FW) <Kostiantyn.Tkachov(a)infineon.com> Cc: nd(a)arm.com Subject: RE: Enablement of external bl2 builds Hi all, One more thing on this topic. There is one more issue with building TFM without BL2. When building TFM with CRYPTO_HW_ACCELERATOR=ON and BL2=OFF I am getting this error: CMake Error at platform/ext/accelerator/CMakeLists.txt:11 (add_library): No SOURCES given to target: bl2_crypto_hw So I think this is one more thing that needs to be fixed. Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com> From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Bohdan Hunko via TF-M Sent: 30 September 2021 17:34 To: Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>; Brand Chris (CSCA CSS ICW SW PSW 1) <Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>>; Kytsun Hennadiy (CSUKR CSS ICW SW FW) <Hennadiy.Kytsun(a)infineon.com<mailto:Hennadiy.Kytsun@infineon.com>>; Mazurak Roman (CSUKR CSS ICW SW FW) <Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>>; Tkachov Kostiantyn (CSUKR CSS ICW SW FW) <Kostiantyn.Tkachov(a)infineon.com<mailto:Kostiantyn.Tkachov@infineon.com>> Cc: nd(a)arm.com<mailto:nd@arm.com> Subject: Re: [TF-M] Enablement of external bl2 builds Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://intranet-content.infineon.com/explore/aboutinfineon/rules/informati…>. Hi Sherry, Thanks for patching MCUBOOT_IMAGE_NUMBER issue. It was one of the issues we faced with. I also agree that mcuboot_config.h should be taken from our BL2 repo. So no changes needed there. About porting files (tfm/bl2 folder). We are planning to use existing porting files. But as you said currently they are not included into the build because BL2=0. So this needs to be fixed to include these porting files when TFM_PARTITION_FIRMWARE_UPDATE is ON. One minor issue we have is BOOT_DATA_AVAILABLE currently it is only defined if BL2=1 and MCUBOOT_MEASURED_BOOT=1. See this line of code<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/secure_fw/…>. I think we can either change that line of code or we can defile BOOT_DATA_AVAILABLE in our platform files using add_definitions(-DBOOT_DATA_AVAILABLE). First way is a bit harder but I thinks it fits better into TFM architecture. Second way is easier but it seems more like workaround than like solution. Do you have any suggestions about this problem? We are not blocked by these issues, so no worries here. Best regards Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com> From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: 30 September 2021 11:38 To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>; Tkachov Kostiantyn (CSUKR CSS ICW SW FW) <Kostiantyn.Tkachov(a)infineon.com<mailto:Kostiantyn.Tkachov@infineon.com>>; Mazurak Roman (CSUKR CSS ICW SW FW) <Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>>; Kytsun Hennadiy (CSUKR CSS ICW SW FW) <Hennadiy.Kytsun(a)infineon.com<mailto:Hennadiy.Kytsun@infineon.com>>; Hunko Bohdan (CSUKR CSS ICW SW FW) <Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Enablement of external bl2 builds Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://intranet-content.infineon.com/explore/aboutinfineon/rules/informati…>. Hi Bohdan, I tried to build TF-M with FWU service without BL2 with the following command(FWU enabled with shared data while no BL2): cmake -S . -B cmake_build -DTFM_PLATFORM=arm/musca_b1/sse_200 -DCRYPTO_HW_ACCELERATOR=OFF -DPLATFORM_DUMMY_NV_SEED=ON -DBL2=0 -DMCUBOOT_PATH=../mcuboot The following issues I met: 1. Build time error by that ` MCUBOOT_IMAGE_NUMBER ` is passed as an empty macro into the flash_layout.h I have created a patch to fix it. https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11729 1. Build error in ` bootutil_public.c `. The mcuboot_config.h which is generated automatically when the BL2=ON is not found. Also the files( in tf-m/bl2 folder) about porting MCUboot into TF-M is not found by the build system as BL2=0. For the config file, I think, it should be imported from your specific MCUboot repo as it is generated when BL2 image is built. For the MCUboot porting files, are you using the files under tf-m/bl2 folder or using your specific porting files? The FWU service needs the porting source files. See code at https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/secure_fw/…. Are your blocked by these two issues? Can you share the detailed issue you met if there is more? Regards, Sherry From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Bohdan Hunko via TF-M Sent: Tuesday, September 28, 2021 6:44 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: Kostiantyn.Tkachov(a)infineon.com<mailto:Kostiantyn.Tkachov@infineon.com>; Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>; Hennadiy.Kytsun(a)infineon.com<mailto:Hennadiy.Kytsun@infineon.com> Subject: [TF-M] Enablement of external bl2 builds Hi everyone, When adding support for new platform we ran into an issue with BL2 variable. In our architecture we have Bootloader based on MCUboot (aka BL2) but we are not planning to build it with TF-M. Bootloader would be separate repo and be built separately. So we need the way to build TF-M with FWU service and shared data definitions when BL2=OFF. I was trying to add support for this but was not able to do this because build structure is quite complicated. Does anyone have ideas or suggestions about the way we can implement this feature? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 6 months

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Deprecation of ARM/MPS2/fvp_sse300 platform

by Anton Komlev

Hi Everyone, I would like to propose the deprecation of arm/mps2/fvp_sse300 platform because the main platform for Corstone-300 is MPS3, available in arm/mps3/an547 and we would like to reduce the number of the platforms to maintain. Following the deprecation process, https://tf-m-user-guide.trustedfirmware.org/platform/ext/platform_deprecati… this proposal is open for discussion at least for 4 weeks before the platform will be marked as deprecated and removed from TF-M unless any objection received. Thanks and Best regards, Anton Komlev

3 years, 6 months

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Announcement: documentation build is separated from the main.

by Anton Komlev

Hello, >From now on, documentation has no interference with the main build and runs as an independent CMake project. This reduces CMake configuration phase and not requires doc tools for the normal development anymore. There are no changes for building the binaries, but documentation build shall start in the docs folder cmake -S docs -B build_docs cmake --build build_docs More details are here: https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/instr… Thanks, Anton

3 years, 6 months

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Sending events from TF-M to non-secure world?

by Li, Jun R

Hi, Anyone has idea how a service inside a secure partition can send out some events to the non-secure world? Does callback still work over IPC? It seems non-secure world can connect to a SP but not easy to do the other way. Appreciate any comments or suggestions! Jun Intel Corporation @ SC, CA

3 years, 6 months

2
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PSA Arch attestation test failure

by Chris.Brand＠infineon.com

Hi, We're seeing a failure in the PSA Arch attestation test, specifically: TEST: 601 | DESCRIPTION: Testing attestation initial attestation APIs | UT: psa_initial_attestation [Info] Executing tests from non-secure [Check 1] Test psa_initial_attestation_get_token with Challenge 32 [Check 2] Test psa_initial_attestation_get_token with Challenge 48 Failed at Checkpoint: 1 Actual: -138 Expected: 0 TEST RESULT: FAILED (Error Code=0x1) The failure is seen on PSoC, but only the gcc Release build (armclang and the other three gcc builds are all fine. Haven't tested IAR), which makes it tricky to debug. PSoC uses the common attest HAL code, though, so I imagine the issue may also be present on other platforms. Bisecting the problem leads to commit 09d71ffd40368b978d428744ad7ba0d3963f8d1d ("Platform: Use OTP as backing for attestation data"). -138 is PSA_ERROR_BUFFER_TOO_SMALL. I'm running gcc-arm-none-eabi-7-2018-q2-update, in case that matters. Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

3 years, 6 months

3
6
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Automatic code formatting

by Bøe, Sebastian

Hi, does anyone have a .clang-format file, or another technology for automatic code formatting to the TF-M coding standard?

3 years, 6 months

2
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Platform specific test out-of-tree build

by Jianliang Shen

Hi all, Thanks for Chris Brand's enhancement suggestion about platform-specific tests. I'm enabling out-of-tree build mode of platform specific test suites with tf-m-tests. Currently I have proposed the following changes: * [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11296>] * [tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11297>] My proposal supplies a flexible interface for partners to out-of-tree build local tests. With this new feature, * Partners can perform local test quickly during development to improve test efficiency * Partners can maintain local test code outside tf-m-tests repo in case of confidential information or IP issues. I also put an out-of-tree example test source code into tf-m-extras repo and a document in TF-M repo: * [tf-m-extras patch<https://review.trustedfirmware.org/c/TF-M/tf-m-extras/+/11323>] * [TF-M patch doc<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11336>] This example indicates that platform-specific tests can be integrated with tf-m-tests, without following tf-m-tests structure or definitions. The document introduces the usage and coding guide of this new feature. PS: If partners would like to upstream platform specific test code, we will be glad to create a specific folder under tf-m-tests repo as Chris Brand suggested. I'd be grateful if you can take a look at the patch sets above. Any suggestion or comment is welcome. Best Regards Jianliang Shen

3 years, 6 months

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Re: [TF-M] Adding platform specific functions to Crypto Service.

by Roman.Mazurak＠infineon.com

Hi Fabian, Yes, our team is thinking about adding feature to the Crypto service API, which are not cryptographic in nature. This is one of the possible solution in our design to avoid additional data processing layer between cryptographic clients and crypto accelerator. Our crypto accelerator also provides additional features which will be used by other secure partitions in TF-M but it doesn’t support handling of crypto and non-crypto requests at the same time. It’s not a problem for CC312 which is used for crypto services and OTP in the latest commit. As far as I understand CC312 allows to use crypto operations and OTP related functions at the same time without additional synchronization. So, the reference design is not very helpful in our situation. So, implementation of additional service is not the best solution. It will extend processing time for each cryptographic requests. The other option is to implement synchronization by using mutex. I think mutex is preferable approach, but this feature is also not support by TF-M yet 😊 There is the discussion which I started for mutex : https://lists.trustedfirmware.org/pipermail/tf-m/2021-October/001914.html Thanks, Roman. From: Fabian Schmidt <fabian.schmidt(a)nxp.com> Sent: Tuesday, October 12, 2021 13:47 To: Shebu.VargheseKuriakose(a)arm.com; David.Hu(a)arm.com; Mazurak Roman (CSUKR CSS ICW SW FW) <Roman.Mazurak(a)infineon.com>; mbed-tls(a)lists.trustedfirmware.org Cc: nd(a)arm.com Subject: RE: [TF-M] Adding platform specific functions to Crypto Service. Hi Roman, My understanding is that you would like to add features to the Crypto service API, but the features which you would like to add are not cryptographic in nature. Have you considered creating your own service for those features, instead of modifying the Crypto service? Or is there anything makes this not a viable option? If you are thinking about adding hardware acceleration for some Crypto features, that’s indeed covered in Shebu’s link. Greetings, Fabian Schmidt From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Shebu Varghese Kuriakose via TF-M Sent: Dienstag, 12. Oktober 2021 11:46 To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>>; Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>; mbed-tls(a)lists.trustedfirmware.org<mailto:mbed-tls@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [EXT] Re: [TF-M] Adding platform specific functions to Crypto Service. Caution: EXT Email Hi Roman, I also might not have understood the question completely. As you mention crypto HAL API, here is the specification which defines a standardized mechanism for PSA Crypto implementations to interface with Secure elements and crypto accelerators - https://github.com/ARMmbed/mbedtls/blob/development/docs/proposed/psa-drive…<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.co…> Also adding mbed-tls mailing list as the thread is crypto related.. Regards, Shebu From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of David Hu via TF-M Sent: Tuesday, October 12, 2021 4:18 AM To: Roman.Mazurak(a)infineon.com<mailto:Roman.Mazurak@infineon.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Adding platform specific functions to Crypto Service. Hi Roman, Are you asking about adding platform specific HAL API to implement PSA Crypto API function? Please correct me if I misunderstand your question. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Roman Mazurak via TF-M Sent: Monday, October 11, 2021 9:45 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] Adding platform specific functions to Crypto Service. Hi all, We would like to add a number of platform specific functions to Crypto Service API. Is it ok if such functions will not be related to cryptographic service, but such approach allows us to optimize platform design? Is there any initiative to create a Crypto Service HAL API to extend Crypto with custom functions? Best regards, Roman.

3 years, 6 months

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TF-M Cadence change proposal

by Anton Komlev

Hello, Following the Tech Forum today I am duplicating the proposal of TF-M cadence change from 4 to 6 months here. This will generate 2 releases a year, planed for the end or March and the end of October starting from v1.6.0. The upcoming release v1.5.0 will stay on planned date. Please share your comments and concerns on the topic. Thanks, Anton

3 years, 6 months

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PSA API crypto test breakage

by Chris.Brand＠infineon.com

Commit 42e77b561fcfe19819ff1e63cb7c0b672ee8ba41 ("Crypto: Remove TF-M Crypto service key handle array") seems to break PSA Arch Crypto test 218 (on PSoC64, with gcc, at least). After this commit, the test reports Failed at Checkpoint: 7 Actual: -137 Expected: -136 (so actual is PSA_ERROR_BAD_STATE and expected is PSA_ERROR_INVALID_HANDLE). That same test passes with the previous commit. Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

3 years, 6 months

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FWU mark TFM image as accepted

by Bohdan.Hunko＠infineon.com

Hi everyone, When studying FWU service I have noticed that there is a function psa_status_t psa_fwu_accept(psa_image_id_t image_id) It is used to mark image as accepted, and it works by writing magic number to image trailer. This function can be used to mark NS or S application as accepted. The first question is: who is responsible for making a call to mark TFM image as accepted ? Is this responsibility of NS application? The second thing I see is write access problem. TFM can receive a call to mark TFM image as accepted, so this means that TFM must have permission to write in its own primary slot. Doesn't this create a possibility for security violation? I can imagine that in ideal world TFM would only have Read and Execute mission for its own primary slot. The only thing that should be able to write to TFM primary slot should be bootloader (it need this functionality to swap images). No one else should be able to write into TFM primary slot. Am I missing something? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 6 months

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Technical Forum call - Oct 14

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Oct 14, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 6 months

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Mutex in SPE

by Roman.Mazurak＠infineon.com

Hi all, We need a mutex to protect access to a shared resource within Platform RoT Services. Is there any plan to add implementation of mutex in TF-M? Maybe it should be a platform specific implementation? Thanks, Roman.

3 years, 6 months

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TF Open CI FYI

by Don Harbin

Hi all, In a discussion with Anton, it was realized that all contributors may not be aware of some of the information available regarding Open CI. If interested in digging deeper and understanding here are some helpful links. - The Open CI "mini-website" can be found here <https://www.trustedfirmware.org/projects/open-ci/>. - Note in the intro paragraph a hotlink to the *Open CI Lava farm* showing the hardware platforms in the lab, recent test results, etc. Note it requires a login to see all the information - Also of value is a detailed *users guide* that provides an overview of Open CI. You can click on the "docs" icon or just go here <https://tf-ci-users-guide.readthedocs.io/en/latest/>. It's a living document and contributions are encouraged. :) - This page also shares how to get further involved and the location of the code. Best regards, Don

3 years, 6 months

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Adding platform specific functions to Crypto Service.

by Roman.Mazurak＠infineon.com

Hi all, We would like to add a number of platform specific functions to Crypto Service API. Is it ok if such functions will not be related to cryptographic service, but such approach allows us to optimize platform design? Is there any initiative to create a Crypto Service HAL API to extend Crypto with custom functions? Best regards, Roman.

3 years, 6 months

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Enable a peripheral interrupt to an App RoT

by Cristiano Rodrigues

Hi everyone, I am developing an App RoT for STM32L552 and testing the recent integrated FLIH interrupt feature, but I am missing something in the step of "Initializing the Interrupts" and "Integrating the Interrupt Handling Function". As is described in Secure Interrupt Integration Guide <https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/tfm_secu…>, to enable an interrupt it is needed: 1. Binding the interrupt to a Secure Partition. 2. Granting the Secure Partition access permissions to the device of the interrupt. 3. Initializing the interrupt. 4. Integrating the interrupt handling function Step *1 *and *2, * think that is "checked": - by adding this code to the partition manifest file. "mmio_regions": [ { "name": "TFM_PERIPHERAL_TIMER7", "permission": "READ-WRITE" } ], "irqs": [ { "source": "TFM_TIMER7_IRQ", "name": "TFM_TIMER7_IRQ", "handling": "FLIH", } - By defining the macro with platform peripheral structure in *patform/ext/target/stm/common/stm32l5xx/boards/tfm_peripherals_def.h* extern struct platform_data_t timer7 #define TFM_PERIPHERAL_TIMER7 &timer7 - *By assign the peripheral address in platform\ext\target\stm\common\stm32l5xx\secure\target_cfg.c* struct platform_data_t timer7 = { __TIMER7_BASE, __TIMER7_BASE + 0x3FF, -1, -1 }; - By adding the peripheral name to “partition_named_mmio_list[]” in the file *patform/ext/target/stm/common/stm32l5xx/boards/mmio_defs.h* const uintptr_t partition_named_mmio_list[] = { (uintptr_t)TFM_PERIPHERAL_TIMER0, (uintptr_t)TFM_PERIPHERAL_STD_UART, (uintptr_t) TFM_PERIPHERAL_TIMER7, }; - And add to my partition code, the irq function, and the function to configure the timer psa_flih_result_t tfm_timer7_irq_flih(void) { .... } static void flih_test_case_1(psa_msg_t *msg) { psa_irq_enable(TFM_TIMER7_IRQ_SIGNAL); timer_start(); ....... timer_stop(); psa_irq_disable(TFM_TIMER7_IRQ_SIGNAL); psa_reply(msg->handle, PSA_SUCCESS); } My problem, I think, is with the other two steps, *3 *and *4. *The TF-M documentation is not clear in these two steps. In step *3, *as is said in the documentation it is needed: i) to configure the interrupt priority; ii) to ensure that the interrupt targets the Secure State. iii) and save the interrupt information. So I suppose it goes something like this: struct irq_t { void *p_pt; struct irq_load_info_t *p_ildi; } save_tfm_timer7_irq_info; enum tfm_hal_status_t tfm_timer7_irq_init(void *p_pt, struct irq_load_info_t *p_ildi) { //targetting the interrupt to S state NVIC_ClearTargetState(TIM7_IRQn); NVIC_SetPriority(TIM7_IRQn, 1); NVIC_EnableIRQ(TIM7_IRQn); //Saving the Interrupt Information save_tfm_timer7_irq_info.p_pt = p_pt; save_tfm_timer7_irq_info.p_ildi = p_ildi; return TFM_HAL_SUCCESS; } *But in which file should I put this function? And where should I call this function??* And in step *4, *I also do not understand how can I meet this requirement -> "Platforms should call this entry function in the interrupt handlers defined in Vector Table with the saved information for each interrupt." Being the function in question -> *void spm_handle_interrupt(void *p_pt, struct irq_load_info_t *p_ildi).* *Which file can I do this in? And how should I do this step?* Cheers, Cristiano Rodrigues

3 years, 6 months

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Boot shared data TLV length

by Bohdan.Hunko＠infineon.com

Hi everyone, IAS docs have this<https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/services…> note that says: There is a size field tlv_len which has different definitions in the upstream MCUboot repository and in its TF-M forked version: * Upstream MCUboot: Covers only the length of data but not the header size. * TF-M MCUboot: Covers the size of the entry header and the data together. This difference is handled by TF-M code based on which bootloader is used along with TF-M runtime. I was wondering where in code is this difference handled? When calculating next TLV entry address attest_core.c line 213<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/secure_fw/…> takes into account SHARED_DATA_ENTRY_HEADER_SIZE: tlv_curr = (*tlv_ptr) + SHARED_DATA_ENTRY_HEADER_SIZE + tlv_entry.tlv_len; So tlv_entry.tlv_len then must cover only length of entry (without header). This way corresponds to: "Upstream MCUboot: Covers only the length of data but not the header size" I was not able to find anything related to "TF-M MCUboot: Covers the size of the entry header and the data together". Is this difference handled in TF-M fork of MCUboot or is it just outdated IAS doc? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 6 months

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Problem with PSoC armclang build

by Chris.Brand＠infineon.com

Hi, We've been investigating a problem with the armclang builds for PSoC. The symptoms are that the board just repeatedly reboots. We've narrowed it down to commit 300c68da11 "SPM: Use Main Stack for initialization". This commit is fine with the gcc toolchain but doesn't seem right for armclang (we haven't yet looked at IAR). Still digging into the issue, but I figured it might be helpful to give it more publicity. Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

3 years, 6 months

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nxp/lpcxpresso55s69 builds broken

by Thomas Törnblom

While verifying that my Musca B1/S1 fixes for IAR did not break other targets I ran into building problems for the nxp/lpcxpresso55s69 for both gnuarm and iararm. I've tested with the following cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=nxp/lpcxpresso55s69 "-DTFM_TOOLCHAIN_FILE=..\toolchain_GNUARM.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DTFM_PSA_API=ON -DBL2=OFF Fails with: d:/apps/gnuarm/10-2020-q4-major/bin/../lib/gcc/arm-none-eabi/10.2.1/../../../../arm-none-eabi/bin/ld.exe: C:\Users\thomasto\Projects\tf-m12\trusted-firmware-m\gnuarm/../secure_fw/spm/ffm/psa_api.c:890: undefined reference to `tfm_hal_irq_disable' I notice that tfm_hal_irq_disable() is guarded by: #if TFM_LVL == 3 in .../nxp/common/tfm_hal_isolation.c, while the other targets does not have this guard. What isthe reason for that? Trying to set that with cmake causes other failures. commit 8444011d works commit 4051016f fails I tried bisecting between these two commits, but the builds run into other build failures so I gave up on that. Is his a known issue? I have successfully built and run regression tests on musca b1, musca s1, psoc64 and I have built, but not run an519, an521, an524 Cheers, Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com <mailto:thomas.tornblom@iar.com> Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 6 months

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[PLATFORM ATTENTION REQUIRED] Partition interrupt binding patches have been merged

by Ken Liu

Dear platform owners, Theses interrupt binding patch(es) are merged: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11474 As the most part of the change happen in platform, please report platform integration if you met. Sorry I had thought the notification mail has been sent during the PR stage but it did not, hence it is not broadcasted in time. Current there are build errors reported on nxp/nordic platforms, and this patch should fix the problem: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11741 Also, Ci reported arch-test build fail, hence the fix for arch-test is here: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11742 Feel free to put comments and I will update them later, or just update the patch if it is quick for you, add your name into the author in commit message. You also can create standalone patches if you change is not covered by mentioned patches. Thanks. /Ken

3 years, 6 months

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Enablement of external bl2 builds

by Bohdan.Hunko＠infineon.com

Hi everyone, When adding support for new platform we ran into an issue with BL2 variable. In our architecture we have Bootloader based on MCUboot (aka BL2) but we are not planning to build it with TF-M. Bootloader would be separate repo and be built separately. So we need the way to build TF-M with FWU service and shared data definitions when BL2=OFF. I was trying to add support for this but was not able to do this because build structure is quite complicated. Does anyone have ideas or suggestions about the way we can implement this feature? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 7 months

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Technical Forum call - Sep 30

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Sep 30, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 7 months

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[IMPORTANT: PLATFORM BUILD ISSUE] [REQUIRE PLATFORM ACK] RE: [Request Platform Support] Abstracted MMIO HAL

by Ken Liu

Hi everyone, Being notified by some platform vendors that platforms build breaks in MASTER branch (releases are working well and not affected) due to not integrate with the latest HAL change: The reference link: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 And these platforms reported build break: Nordic NXP Because of bandwidth issues, we can’t maintain all the platform sources, hence require upstreamed platform owners to take a look at their platform builds and runs ok, and integrate with the updated HAL if it does fail. Please reply to this thread if there are problems and I have created one ticket for tracking this if replying in a thread is more convenient for you: https://developer.trustedfirmware.org/T967 Sorry for the inconvenience made, I should warn all the platform owners in earlier mails – I will validate the build again later in Oct to see if there are still platform breaks and contact the platform code owners to discuss plans. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Friday, September 17, 2021 3:06 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL The MMIO binding patch set are all merged, assume this will simplify the SPM integration much. Follow up fixups will be created if missing comments reported. Anyway, all platform patches are not blocked anymore, feel free to merge the reviewed and CI passed patches. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Friday, September 3, 2021 1:27 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL Hi, Another reminder to mention the MMIO binding patches. Several platforms are changed to pass the CI, please platform owners to review the patches, such as: PSOC: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 STM: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11186 Some of other platform patches are created as well. This is a significant change for platform which helps much easier integration. After the first series of patches, the problems not covered by the CI need to be fixed adhoc. Please read the tech forum topic on 2nd Sep for more details or you can just scroll down to check the previous content. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Monday, August 30, 2021 5:18 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL The patchset has updated and now CI passed okay: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Thursday, August 19, 2021 2:16 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] [Request Platform Support] Abstracted MMIO HAL Hi everyone, The existing HAL interface for isolation hardware is not unified, we have to call several interfaces to setup isolation boundaries. Hence, a deeper abstracted interface are provided. Here are the details: - It assumes the hardware resources usages are decided by system designer. Hence there are couple of listed hardware data in the platform code, now most of them are defined in C sources. - When a partition is referencing peripheral (represented as MMIO in FFM), the manifest tooling would link specified resources with the data defined in platform. Now it is using a naming pattern, to let the partition found the resources defined above (now it uses linker to do this). - A HAL API 'tfm_hal_bind_partition' is called when a partition runtime structure is created. This API tells partition info to platform, let platform return an encoded 'p_boundaries' for SPM binding partition with platform. - When boundaries related operations happen in future, SPM would delivery this 'p_boundaries' back to platform, let platform perform boundary setup and check, such as boundary switch or memory check. SPM won't care about the hardware specific settings any more, such as privilged, non-secure/secure and how many MMIO the partition claimed, even the MPU/MPC/PPC things. - Resources defined in platform sources but not referenced would be stripped by toolchain flag. Resources not defined but referenced by partition would generate a linker error, as symbol can't be resolved. We created a patch to showcase the usage on AN521: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 This patch applies a simple encoding for all isolation levels. You can check how the p_boundaries is used under different isolation levels. Platform can use other encoding mechanism if applicable. Now come to the request: Please review this patch, and port similar HAL API into your platform. We are maintaining the default platforms such as AN521, AN519 and MUSCA_B1, but it need so much effort on port to all the platforms. Current CI cannot pass on this patch (as it contains modification for one platform only), our first goal is to let CI pass build on all checked platforms, and then please platform owner ensures it works on your platform. Any feedbacks are welcome. Thank you very much! /Ken -- TF-M mailing list TF-M(a)lists.trustedfirmware.org<mailto:TF-M@lists.trustedfirmware.org> https://lists.trustedfirmware.org/mailman/listinfo/tf-m

3 years, 7 months

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NSID improvement patches are in review

by David Wang

Hi, Believe you still remember I shared the non-secure client ID management update in tech forum<https://www.trustedfirmware.org/meetings/tf-m-technical-forum/> a few months ago (slides<https://www.trustedfirmware.org/docs/Non_Secure_Client_ID_management_update…>, video<https://linaro-org.zoom.us/rec/share/k7vJnf8qcugoRNxu5hRSyc0thzSTbTT295ZLyy…> (passcode: dqHBI$2z)). The patches and document are available in tf.org for public review. The integration reference and test suite are also provided. If you're using SPM to manage the NSID (fixed `-1` for all NS connections) which is the default option (`TFM_NS_CLIENT_IDENTIFICATION` is OFF), then it basically won't affect you (if you don't play with `TFM_NS_CLIENT_IDENTIFICATION` flag which is changed). NSCE (non-secure client extension) module is introduced to manage the non-secure context in TF-M which includes the NSID as a member. If you have a requirement to support different NSIDs for NS tasks, then it's for that purpose. Patches: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11288 (add non-secure context management) https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11289 (add NSCE interface API) https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11616 (Doc) https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11294 (Add NSCE support in nspm and build system) RTOS integration reference (based on RTX): https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11290/ (NSID manager example) https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11291/ (TZ API to NSCE API shim layer) A test suite is added. Tip of the test cases: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11659/ Welcome to comment. Thanks. Regards, David Wang ARM Electronic Technology (Shanghai) Co., Ltd Phone: +86-21-6154 9142 (ext. 59142)

3 years, 7 months

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Proposal to separate vendor components

by Roman.Mazurak＠infineon.com

Hi all, The goal of this proposal is to separate TF-M core and platform code to simplify development and support. Take, for example, the Cypress PSoC 64 platform, we see that a significant amount of code can be committed into the repository. For end user perspective, it doesn't seem logical that project source tree has a lot of irrelevant stuff. It complicates a performance of IDE, searching and analyzing a code. Pros : Platform support can be provided separately without the need to upgrade outdated platforms or problematic platforms : https://lists.trustedfirmware.org/pipermail/tf-m/2021-January/001454.html https://developer.trustedfirmware.org/w/collaboration/project-maintenance-p… It should help to avoid or at least to minimize number of patches that requires fixes in platform folders : https://lists.trustedfirmware.org/pipermail/tf-m/2019-April/000162.html Reduces the amount of work for core team by delegating promotion of a new API support to vendors : https://lists.trustedfirmware.org/pipermail/tf-m/2019-November/000506.html Proposed solution : There are other projects that face a similar situation, for example OpenWRT, Yocto, Android. Their common feature is that they have many dependencies. The solution they propose is based on the fact that these projects have their own build infrastructure. The user's task is to create a configuration in which you can add your own components. In its current state, the TF-M already has some tools to implement platform as an external dependency. The user can specify the path to the platform using the TFM_PLATFORM variable. There is also work underway to implement support of external test infrastructure. (https://lists.trustedfirmware.org/pipermail/tf-m/2021-September/001824.html). There is a need to add support of external secure partitions instead of current solution (https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/services…). I can't say if this issue is directly related to the platform, but it's possible that it will give more opportunities to vendors or will be a useful tool for adding new platforms. The last question that needs to be addressed is how to link the sources supplied by vendors (platforms or security partitions) to the TF-M sources. Using the git submodule mechanism probably is not a good solution. There are two options : 1. Platforms, security partitions and test-suits will be listed as a submodule in the TF-M tree. But this approach will not actually solve the main problem of delegating more responsibility to vendors and breaking the connection between the vendors component and TF-M. 2. The TF-M source tree will be specified as a submodule in modules supplied by vendors. In this case we will have more problems. Because if the user's project will use two or more vendor components (for example, platform and custom security partitions), then TF-M will be mentioned more than once and it is quite possible to have several different revisions of TF-M. So, it will be impossible to properly assemble the project. Therefore, I see the use of the following approach as an alternative : 1. External components check the TF-M version using the TFM_VERSION variable. 2. A project that uses TF-M, as well as the necessary components (platforms, external security partitions, vendor / project test suites) specifies dependencies using any method. The simplest way is to commit TF-M and vendor components as submodules in the user project. 3. Paths to all dependencies should be transferred from the project to necessary parts of TF-M via CMake variables. This should be equally convenient for platforms vendors, TF-M components vendors, and TF-M end users. Risks : If the project assembled by end user will use several vendor modules (for example platform and custom security partitions). It is possible that the TF-M version required by different vendors modules will be different. But this problem is present at the moment, because any significant change to the TF-M API generates many problems that need to be solved for all supported platforms (mentioned in the pros). Any feedbacks are welcome. Best regards, Roman

3 years, 7 months

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Request Access To a Board Peripheral for a App RoT - Problem

by Cristiano Rodrigues

Hi everyone, I'm trying to access an STM32L552 peripheral in a RoT APP (tf-m isolation v1.4 Level 2), but I'm having trouble doing that. I know that I have to request the peripheral in the YAML file of my partition's manifest, but that request didn't work for me. I filled the required campus and couldn't get access to the peripheral. I'm requesting the peripheral by putting this piece of code in my partition manifest YAML file. Am I missing something? ..... "mmio_regions" : [ { "name": "TFM_PERIPHERAL_TIMER0", "permission": "READ-WRITE" } ...... Another thing, I am only able to request the TIMER0 and UART peripherals? If I want to access other timers, e.g., TIMER 6 or TIMER 7, am I not allowed to do so? Cheers, Cristiano

3 years, 7 months

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[Ask for review] FPU support in TF-M

by Feder Liang

Hi, All Patches for FPU support in TF-M are ready for review now. Looking for your comments! FPU here refers to Float-point unit for Arm-M profile architecture. 1. FPU support in TF-M * Support platforms: all platforms with FPU available. Current patches are developed on arm musca_s1 board as example. * After necessary settings in TF-M, it is configurable that FPU can be enabled in SPE or NSPE, or both sides. System developer can activate FPU feature on a platform by setting those flags in CMake command line. i. Enable FP in secure side: -DTFM_SYSTEM_FP= 0-software, 1-hybird, 2-hardware ii. Enable FP in non-secure side: -DTFM_SYSTEM_FP_NS= 0-software, 1-hybird, 2-hardware Also lazy stacking feature can be enabled/disabled in SPE or NSPE separately. iii. Enable lazy stacking in secure side: -DTFM_LAZY_FP=ON iv. Enable lazy stacking in non-secure side: -DTFM_LAZY_FP_NS=ON * The secure service developer/application developer does need to know the FPU setting details, they can just compile their program with proper toolchain flags to take advantage of FPU. The tested toolchains are: GNU Arm embedded toolchain and Arm Compiler. Other toolchain has FPU support should also work but needs test report from partners. Three floating-point Application Binary Interface (ABI) types of mentioned toolchain are tested: software, hybrid, and hardware option. * Support isolation level 1,2,3. * FPU needs to be available in your platform if you want to take the advantage of a hardware FPU. Please check your platform hardware specification whether FPU is available. Also need to check specification of toolchain whether the FPU architecture of your platform is supported. FPU architecture can be specified by -DTFM_FP_ARCH in CMake command line. 1. Notes: * As FF-M alignment is one of our design goals, it only supports IPC partitions at current stage. * The security mechanism is designed based on ARMv8-M Mainline and later. * To simplify the scenarios, we defined several guidelines that no involving FPU usage inside an interrupt handler, including deprivileged handler in one Partition. This can be fine-tuned later if there are requirements that insists a FPU support in handler mode. * In general, FPU is commonly available on a Armv8.0-M mainline. Please check your platform specification and report exception cases if seen. 1. For the VLLDM instruction security vulnerability of FPU, to mitigate this security vulnerability, it is required to recompile the secure image with compilers that has the software workaround implemented. For more information, please check https://developer.arm.com/support/arm-security-updates/vlldm-instruction-se…. 1. Those patches will be merged in 4-6 weeks if there is no big issue found. tf-m repo: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11688 FP context protection https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11689 Add FPU support for gnu arm embedded toolchain https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11690 Configure non-secrue timer for FPU test https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11691 Add FPU support design document https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11692 Output support for FP numbers https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11693 FPU support for Armclang compiler tf-m-tests repo: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11684 Add FPU support https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11685 Adding FPU test cases https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11686 Adding FPU non-secure interrupt test case https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11687 Printf support for FP numbers Best Regards Feder

3 years, 7 months

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Outdated file location in FWU doc

by Bohdan.Hunko＠infineon.com

Hi everyone, While reading FWU service doc<https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig…> I found that Components paragraph<https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig…> contain table which says that tfm_bootloader_fwu_abstraction.h file is located in ./secure_fw/partitions/firmware_update/tfm_bootloader_fwu_abstraction.h , but it TF-M repo it is located in secure_fw\partitions\firmware_update\bootloader\tfm_bootloader_fwu_abstraction.h. Minor thing, but still worth fixing. Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 7 months

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Trouble building Musca S1 with IAR

by Thomas Törnblom

I'm working on adding IARARM as a toolchain for the Musca S1 (and B1) and I'm running into an issue where the NS image can not properly access the UART. The NS code loops trying to check the UART status @0x40102030, which holds the value 0x301, as can be seen with the debugger and also from the secure code, but when read by the NS code it returns 0, with no error. As this code works when building with ARMCLANG and GNUARM, I assume there is some memory protection that gets incorrectly setup when I build with the IAR toolchain, but I'm struggling to find where this gets setup. I assume it is done in the secure image. Any hints where i should be looking? Thanks, Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com <mailto:thomas.tornblom@iar.com> Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 7 months

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Re: [TF-M] Supporting encryption with ITS

by Fabian Schmidt

Hi George, I'm wondering if that would add value. To my understanding, ITS was never designed to be encrypted because of the way it's supposed to be set up. (It's Internal Trusted Storage.) I believe best practice is to place it in a "trusted" location, one that is ideally only accessible from Secure world, and also ideally on-die. If you then restrict outside access to the internal flash (JTAG, flash programmer ports,.), you're pretty golden, in that no unauthorized party should be able to read from or write to the ITS.* Let me know if I misunderstand anything about ITS or TrustZone, but that's my view. Maybe I'm painting an idealized picture. Greetings, Fabian Schmidt * at least short of a sophisticated physical attack or finding some loophole in TrustZone. From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Vasilakis, Georgios via TF-M Sent: Donnerstag, 23. September 2021 15:28 To: tf-m(a)lists.trustedfirmware.org Subject: [EXT] [TF-M] Supporting encryption with ITS Caution: EXT Email Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

3 years, 7 months

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TF-M v1.4.1 hotfix have been released

by Anton Komlev

Hello, Please be informed about the update v1.4.1 containing a hotfix for a vulnerability found in v1.4.0. The vulnerability exists in Profile Small only so please update to v1.4.1 version if you are currently using TF-M v1.4.0 and Profile Small. The detailed security advisory will be provided later. Best regards, Anton

3 years, 7 months

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Re: [TF-M] Supporting encryption with ITS

by Vasilakis, Georgios

Thank you both for the input! Andrej, you are correct that right now PS == Encrypted ITS but my understanding of the spec tells me that this will not always be the case. They do refer to platforms that will use external storage for PS (even though they still require ITS even in this case indeed). And just to clarify, I don't propose creating yet another ITS. The second thought that I had regarding the refactoring is mainly a common library that both ITS and PS can use for object handling. Fabian, I also understand it similarly, the ITS is supposed to be trusted on-chip storage which is more protected than PS. And the isolation from TrustZone in normal circumstances should be adequate (at the moment). But physical attacks these days are not that sophisticated anymore, and I think that this is the main driving force for this requirement. Regards, George ________________________________ From: Fabian Schmidt Sent: Thursday, September 23, 2021 3:50 PM To: Vasilakis, Georgios Cc: tf-m(a)lists.trustedfirmware.org Subject: RE: [TF-M] Supporting encryption with ITS Hi George, I’m wondering if that would add value. To my understanding, ITS was never designed to be encrypted because of the way it’s supposed to be set up. (It’s Internal Trusted Storage.) I believe best practice is to place it in a “trusted” location, one that is ideally only accessible from Secure world, and also ideally on-die. If you then restrict outside access to the internal flash (JTAG, flash programmer ports,…), you’re pretty golden, in that no unauthorized party should be able to read from or write to the ITS.* Let me know if I misunderstand anything about ITS or TrustZone, but that’s my view. Maybe I’m painting an idealized picture. Greetings, Fabian Schmidt * at least short of a sophisticated physical attack or finding some loophole in TrustZone… From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Vasilakis, Georgios via TF-M Sent: Donnerstag, 23. September 2021 15:28 To: tf-m(a)lists.trustedfirmware.org Subject: [EXT] [TF-M] Supporting encryption with ITS Caution: EXT Email Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

3 years, 7 months

1
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Supporting encryption with ITS

by Vasilakis, Georgios

Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

3 years, 7 months

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1
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Use IPC Model to build by default

by Kevin Peng

Hi all, Please be noted that we are changing the build system to build IPC model by default instead of Library model for the following reasons: * The Library Model is not being developed anymore. It does not support for new FF-M features. * New comers to TF-M should be encouraged to start with the IPC model to have the better experiences. * Most importantly, Library Model will be replaced by SFN Model in future. Patch here: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11384 With this patch, the TFM_PSA_API is not intended for users to choose between library and IPC model anymore. To build Library model, please set TFM_LIB_MODEL to ON. The TFM_PSA_API=ON can be kept as is for the time being. So there would be impacts wherever Library Model is used. Please get prepared. Thanks. Best Regards, Kevin

3 years, 7 months

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Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL

by Ken Liu

Hi, Another reminder to mention the MMIO binding patches. Several platforms are changed to pass the CI, please platform owners to review the patches, such as: PSOC: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 STM: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11186 Some of other platform patches are created as well. This is a significant change for platform which helps much easier integration. After the first series of patches, the problems not covered by the CI need to be fixed adhoc. Please read the tech forum topic on 2nd Sep for more details or you can just scroll down to check the previous content. Thanks. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Monday, August 30, 2021 5:18 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL The patchset has updated and now CI passed okay: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Thursday, August 19, 2021 2:16 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] [Request Platform Support] Abstracted MMIO HAL Hi everyone, The existing HAL interface for isolation hardware is not unified, we have to call several interfaces to setup isolation boundaries. Hence, a deeper abstracted interface are provided. Here are the details: - It assumes the hardware resources usages are decided by system designer. Hence there are couple of listed hardware data in the platform code, now most of them are defined in C sources. - When a partition is referencing peripheral (represented as MMIO in FFM), the manifest tooling would link specified resources with the data defined in platform. Now it is using a naming pattern, to let the partition found the resources defined above (now it uses linker to do this). - A HAL API 'tfm_hal_bind_partition' is called when a partition runtime structure is created. This API tells partition info to platform, let platform return an encoded 'p_boundaries' for SPM binding partition with platform. - When boundaries related operations happen in future, SPM would delivery this 'p_boundaries' back to platform, let platform perform boundary setup and check, such as boundary switch or memory check. SPM won't care about the hardware specific settings any more, such as privilged, non-secure/secure and how many MMIO the partition claimed, even the MPU/MPC/PPC things. - Resources defined in platform sources but not referenced would be stripped by toolchain flag. Resources not defined but referenced by partition would generate a linker error, as symbol can't be resolved. We created a patch to showcase the usage on AN521: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 This patch applies a simple encoding for all isolation levels. You can check how the p_boundaries is used under different isolation levels. Platform can use other encoding mechanism if applicable. Now come to the request: Please review this patch, and port similar HAL API into your platform. We are maintaining the default platforms such as AN521, AN519 and MUSCA_B1, but it need so much effort on port to all the platforms. Current CI cannot pass on this patch (as it contains modification for one platform only), our first goal is to let CI pass build on all checked platforms, and then please platform owner ensures it works on your platform. Any feedbacks are welcome. Thank you very much! /Ken

3 years, 7 months

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memory_region_limits structure contents

by Bohdan.Hunko＠infineon.com

Hi everyone, I was wondering is there any reasons to use REGION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) declared in this code<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…> and used here<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…>? >From code in common linker script<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…> I can see: Load$$LR$$LR_NS_PARTITION$$Base = NS_PARTITION_START. So the question is: why regions are used instead of simply using NS_PARTITION_START? And the follow up questions is: do platforms that are built in IPC model (not library model) really need REGION_NAME(Load$$LR$$, LR_VENEER, $$Base)in memory_region_limits memory_regions struct, or that could be just dummy value? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 7 months

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Move MCUBoot configs to bl2 specific config file

by Jianliang Shen

Hi all, We decide to move MCUBoot specific configurations to TF-M/bl2/ext/mcuboot folder. This change is to decouple MCUBoot and TF-M configurations and make default_config.cmake clearer. I have proposed the patch set: * [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10560>] I'm grateful to receive any suggestion or enhancement from you. Best Regards Jianliang Shen

3 years, 7 months

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Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M

by David Hu

Hi all, I'd like to merge the following patch set tomorrow, if there is no more major comment. * Decouple tf-m-tests specific config setting from trusted-firmware-m. [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11167>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11169>] * Decouple tf-m-tests secure log from non-secure log. Switch tf-m-tests secure log to TF-M SP log. [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11153>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11131/>] After the above patches are merged, there are two major changes: * tf-m-tests dedicated configuration setup process will be moved to tf-m-test repo, from TF-M. Therefore you can update tf-m-tests config setting, without modifying TF-M repo. * Tf-m-tests commit ID is specified in TF-M `lib\ext\tf-m-tests\repo_config_default.cmake`, rather than in TF-M main `config_default.cmake`. You can update tf-m-tests commit ID in TF-M without touching the large `config_default.cmake`. Any suggestion or comment is always welcome! Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of David Hu via TF-M Sent: Tuesday, August 24, 2021 5:33 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Hi all, As you may know, Jianliang and I are working to better decouple tf-m-tests from trusted-firmware-m repo. The purpose of the decoupling enhancement includes: * Making it more easier to integrate TF-M and port tf-m-tests * Making it more easier to develop TF-M tests, to minimize the changes to TF-M source code or build system. * Making it more flexible to re-structure tf-m-tests and minimize the impact to TF-M Previously Jianliang has decouple test case control and enable users to select single NS/S regression test case in build and test. Currently we are focusing on decoupling tf-m-tests specific config setting from TF-M. So far we have proposed the following major changes: * Decouple tf-m-tests specific config setting from trusted-firmware-m. [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11167>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11169/1>] * Move tf-m-tests specific configs to tf-m-tests repo from trusted-firmware-m [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10647>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/10556>] More patch sets for decoupling are under review as well. * Decouple tf-m-tests secure log from non-secure log. Switch tf-m-tests secure log to TF-M SP log. [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11153>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11131/3>] * Trigger secure regression tests in TF-M SPE in IPC model, to simplify multi-core development/tests [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11181>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11182>] I'd appreciate it if you can take a look at the patch sets above. Any suggestion or comment is welcome. If you have any specific requirement or suggestion of tf-m-tests enhancement, please feel free to contact Jianliang and me. Thanks in advance. Best regards, Hu Ziji

3 years, 7 months

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Adding tfm_mailbox_config.h to .gitignore

by Bohdan.Hunko＠infineon.com

Hello everyone. After building the project interface/include/multi_core/tfm_mailbox_config.h is generated, but it is not in .gitignore I think this file should be in .gitignore because it is build artifact and is really annoying to deal with. Am I wrong somewhere? Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 7 months

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Remove some platform specific test cases

by Shawn Shan

Hi all, We are going to remove some test cases in tfm_core_test. They are: * TFM_INTERACTIVE_TEST * TFM_PERIPH_ACCESS_TEST The main reasons is that these peripheral and interactive test cases are mainly platform specific(button and LEDs), rather than test the main features and secure functionalities of TF-M. Besides, it also a burden for flatform owner to support and maintain those test cases. Do you have any concerns for remove those test cases? Best Regards, Shawn

3 years, 7 months

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Technical Forum call - Sep 16

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Sep 16, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 7 months

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Re: [TF-M] TF-M Digest, Vol 35, Issue 6

by Michael Thomas

Ken, Hu, I just saw this message now and wanted to give my perspective based on some of the code Renesas has developed. In general, the primary benefits of having enums are return codes are type checking and portability. So of you have a top level application using an API that always returns an error from a defined enum list, then the application can switch to using different implementations of the same API and does not have to change its error handling code etc. However, if you are returning uint32 instead then its likely that different implementations of the same API will have any possible return code making the application non-portable. I think the issue arises when the enum list is not sufficiently well defined so each enum entry ends up acting as a funnel for x number of lower level error code so there is loss of information etc. But w.r.t the line in the TFM coding guide : " Use enumeration for error codes to keep the code readable.", if the objective is just to make the code readable, then you don’t really need an enum for that... you can achieve readability by using #define XYZ_error. I think that will be much harder to maintain particularly in terms of preventing different error codes from being defined to the same value unless we have a common file where all error code are defined for a specific layer. -Michael -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of tf-m-request(a)lists.trustedfirmware.org Sent: Friday, September 3, 2021 4:38 AM To: tf-m(a)lists.trustedfirmware.org Subject: TF-M Digest, Vol 35, Issue 6 Send TF-M mailing list submissions to tf-m(a)lists.trustedfirmware.org To subscribe or unsubscribe via the World Wide Web, visit https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.tru… or, via email, send a message with subject or body 'help' to tf-m-request(a)lists.trustedfirmware.org You can reach the person managing the list at tf-m-owner(a)lists.trustedfirmware.org When replying, please edit your Subject line so it is more specific than "Re: Contents of TF-M digest..." Today's Topics: 1. Re: [RFC] Can we remove the rule to use enum for error code? (Ken Liu) 2. Re: [RFC] Can we remove the rule to use enum for error code? (Andrew Thoelke) ---------------------------------------------------------------------- Message: 1 Date: Fri, 3 Sep 2021 07:54:41 +0000 From: Ken Liu <Ken.Liu(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] [RFC] Can we remove the rule to use enum for error code? Message-ID: <DBBPR08MB4741B0807FC4ACD9F4466520F5CF9(a)DBBPR08MB4741.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" I am okay to remove it. Even it can be used to check the error types, but some of the developers do typecast on enum which makes the rule no sense. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of David Hu via TF-M Sent: Friday, September 3, 2021 3:45 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [RFC] Can we remove the rule to use enum for error code? Hi all, Probably you didn’t know that there is such a rule in TF-M coding standard<https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftf-m-user…>: * Use enumeration for error codes to keep the code readable. Personally, I’d prefer macros to enum, for error codes. * The implicit type casting of enum can be an issue in coding. TF-M has a document<https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftf-m-user…> to solve this. * Using macros to define error codes aligns with PSA return code definitions. * Enum makes function and variable definitions longer * Enum may help developers skip writing specific error code values. But it becomes a trouble when you see an error number from log. You might need to count the enum fields one by one. * Error codes for errors are usually negative but enums are positive ones by default. I’d like to propose to remove this rule from TF-M coding standard. But it doesn’t mean that enum shall not be used anymore. I’m wondering if macros for error code in TF-M can be approved as well. 😊 May I know your opinions please? If it is a convention or a good practice to use enum for error codes in security/trusted software, please help point me to the reference. I don’t find one via google. Thanks a lot! Best regards, Hu Ziji -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.trus…> ------------------------------ Message: 2 Date: Fri, 3 Sep 2021 08:38:02 +0000 From: Andrew Thoelke <Andrew.Thoelke(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] [RFC] Can we remove the rule to use enum for error code? Message-ID: <DB7PR08MB38651B33CD7BAEB9BF05F0229ACF9(a)DB7PR08MB3865.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" Hi, In my experience, the only significant benefit of using enums is that some debuggers display the symbolic name for a value with the enum type. But, as already mentioned, using enums does not help in parsing logs, or decoding error values in integer variables/registers; particularly when the definition does not provide explicit values for each identifier. In addition, the rules for determining the implicit integer type for an enum type are non-trivial. This results in a lack of transparency when reading or reviewing code with respect to the size of the enum type in a data structure, or the behaviour when converting an enum value to an integer (or back again). This is why the PSA specifications use explicitly sized integer types for types like psa_status_t, and macros to define values of such types. Regards, Andrew From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of David Hu via TF-M Sent: 03 September 2021 08:45 To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [RFC] Can we remove the rule to use enum for error code? Hi all, Probably you didn’t know that there is such a rule in TF-M coding standard<https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftf-m-user…>: * Use enumeration for error codes to keep the code readable. Personally, I’d prefer macros to enum, for error codes. * The implicit type casting of enum can be an issue in coding. TF-M has a document<https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftf-m-user…> to solve this. * Using macros to define error codes aligns with PSA return code definitions. * Enum makes function and variable definitions longer * Enum may help developers skip writing specific error code values. But it becomes a trouble when you see an error number from log. You might need to count the enum fields one by one. * Error codes for errors are usually negative but enums are positive ones by default. I’d like to propose to remove this rule from TF-M coding standard. But it doesn’t mean that enum shall not be used anymore. I’m wondering if macros for error code in TF-M can be approved as well. 😊 May I know your opinions please? If it is a convention or a good practice to use enum for error codes in security/trusted software, please help point me to the reference. I don’t find one via google. Thanks a lot! Best regards, Hu Ziji -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flists.trus…> ------------------------------ Subject: Digest Footer TF-M mailing list TF-M(a)lists.trustedfirmware.org https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.tru… ------------------------------ End of TF-M Digest, Vol 35, Issue 6 *********************************** Disclaimer: This message and any files or text attached to it are intended only for the recipients named above and contain information that may be confidential or privileged. If you are not an intended recipient, you must not forward, copy, use or otherwise disclose this communication or the information contained herein. In the event you have received this message in error, please notify the sender immediately by replying to this message, and then delete all copies of it from your system. Thank you.

3 years, 7 months

2
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Unaligned flash read/write is supported in Boot & FWU

by Sherry Zhang

Hi, The following patch enables the flash read/write with unaligned address/cnt for MCUboot and Firmware Update partition. https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10947 This patch has been merged and thanks to all who have reviewed on this patch. As this patch can impact the MCUboot booting up on the platforms, if there is any booting up issue on your platform after this commit, do not hesitate to feedback to me. 😊 Thanks, Regards, Sherry Zhang

3 years, 7 months

1
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BOOT_TFM_SHARED_DATA_* usage in arm/musca_b1

by Bohdan.Hunko＠infineon.com

Hi everyone! I see definitions of BOOT_TFM_SHARED_DATA_* in platform\ext\target\arm\musca_b1\sse_200\partition\region_defs.h but I don't see any real usage of that memory. I have found TF-M doc<https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig…> that describe usage of shared memory for Firmware Update Service but once again I was not able to find any code that uses that. I would appreciate if someone could point to docs on this or to code that actually uses shared data between BL2 and TF-M SPE. Best regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 7 months

4
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[RFC] Can we remove the rule to use enum for error code?

by David Hu

Hi all, Probably you didn’t know that there is such a rule in TF-M coding standard<https://tf-m-user-guide.trustedfirmware.org/docs/contributing/coding_guide.…>: * Use enumeration for error codes to keep the code readable. Personally, I’d prefer macros to enum, for error codes. * The implicit type casting of enum can be an issue in coding. TF-M has a document<https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig…> to solve this. * Using macros to define error codes aligns with PSA return code definitions. * Enum makes function and variable definitions longer * Enum may help developers skip writing specific error code values. But it becomes a trouble when you see an error number from log. You might need to count the enum fields one by one. * Error codes for errors are usually negative but enums are positive ones by default. I’d like to propose to remove this rule from TF-M coding standard. But it doesn’t mean that enum shall not be used anymore. I’m wondering if macros for error code in TF-M can be approved as well. 😊 May I know your opinions please? If it is a convention or a good practice to use enum for error codes in security/trusted software, please help point me to the reference. I don’t find one via google. Thanks a lot! Best regards, Hu Ziji

3 years, 7 months

4
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Re: [TF-M] TF-M v1.3.0 release - Fault Injection and DPA in line with PSA L3 Certification

by Reed Hinkel

Hello Suresh: How are you? I hope all is well with you! Virtual Linaro Connect Fall is next week and there is a presentation relevant to your question along with some others. As an online event, it is free registration and I am listing here below a few sessions that might be of interest to you related to security and AI inferencing for microcontrollers: https://connect.linaro.org/schedule LVC21F-116 Assessing the effectiveness of MCUBoot protections against fault injection attacks https://events.pinetool.ai/2231/#sessions/67139?referrer%5Bpathname%5D=%2Fs… LVC21F-112 Picolibc: A C Library for Smaller Systems https://events.pinetool.ai/2231/#sessions/67136?referrer%5Bpathname%5D=%2Fs… LVC21F-303 Secure Sensor Data Pipeline https://events.pinetool.ai/2231/#sessions/67174?referrer%5Bpathname%5D=%2Fs… LVC21F-312 TrustedFirmware.org panel discussion https://events.pinetool.ai/2231/#sessions/67183?referrer%5Bpathname%5D=%2Fs… LVC21F-319 TVM for micro targets https://events.pinetool.ai/2231/#sessions/67190?referrer%5Bpathname%5D=%2Fs… I thought you may be interested in the AI as well since there are security implications for trusted AI. All the best! Reed From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> on behalf of Suresh Marisetty via TF-M <tf-m(a)lists.trustedfirmware.org> Reply-To: "Suresh.Marisetty(a)infineon.com" <Suresh.Marisetty(a)infineon.com> Date: Thursday, September 2, 2021 at 8:23 AM To: Anton Komlev <Anton.Komlev(a)arm.com>, "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] TF-M v1.3.0 release - Fault Injection and DPA in line with PSA L3 Certification Hi, I have a question related to the PSA L3 certification and the requirement to support Side-channel and fault injection attacks. I have noted that TFM and MCUBoot does implement some software countermeasures for Fault Injection. However, I am wondering if there is similar implementation support for the Crypto Lib in TFM (or Mbed TLS) with software counter measures for side channel DPA. Needless to say, there are some known best practices for DPA software countermeasures. thanks Suresh Marisetty Infineon Semiconductor Corporation From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Friday, April 9, 2021 6:25 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] TF-M v1.3.0 release Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://goto.infineon.com/SocialEngineering>. Hello, TF-M project released version v1.3.0, tagged as TF-Mv1.3.0. Please take a look into the release notes for the new features and changes: https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/refer… The major features: * Support stateless RoT Service defined in FF-M 1.1 * Support Second-Level Interrupt Handling (SLIH) defined in FF-M 1.1 * Add Firmware Update (FWU) secure service, following Platform Security Architecture Firmware Update API * Migrate to Mbed TLS v2.25.0 * Update MCUboot version to v1.7.2 * Add a TF-M generic threat model * Implement Fault Injection Handling library to mitigate physical attacks * Add Profile Large * Enable code sharing between boot loader and TF-M * Support Armv8.1-M Privileged Execute Never (PXN) attribute and Thread reentrancy disabled (TRD) feature * New platforms added * Add a TF-M security landing page * Enhance dual-cpu non-secure mailbox reference implementation This is the first release performed in the OpenCI infrastructure with no single issue encountered. Thanks to everyone who directly and indirectly contributed to this milestone. Anton Komlev TF-M technical lead Arm Ltd.

3 years, 7 months

1
0
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Re: [TF-M] TF-M v1.3.0 release - Fault Injection and DPA in line with PSA L3 Certification

by Suresh.Marisetty＠infineon.com

Hi, I have a question related to the PSA L3 certification and the requirement to support Side-channel and fault injection attacks. I have noted that TFM and MCUBoot does implement some software countermeasures for Fault Injection. However, I am wondering if there is similar implementation support for the Crypto Lib in TFM (or Mbed TLS) with software counter measures for side channel DPA. Needless to say, there are some known best practices for DPA software countermeasures. thanks Suresh Marisetty Infineon Semiconductor Corporation From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Friday, April 9, 2021 6:25 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] TF-M v1.3.0 release Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://goto.infineon.com/SocialEngineering>. Hello, TF-M project released version v1.3.0, tagged as TF-Mv1.3.0. Please take a look into the release notes for the new features and changes: https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/refer… The major features: * Support stateless RoT Service defined in FF-M 1.1 * Support Second-Level Interrupt Handling (SLIH) defined in FF-M 1.1 * Add Firmware Update (FWU) secure service, following Platform Security Architecture Firmware Update API * Migrate to Mbed TLS v2.25.0 * Update MCUboot version to v1.7.2 * Add a TF-M generic threat model * Implement Fault Injection Handling library to mitigate physical attacks * Add Profile Large * Enable code sharing between boot loader and TF-M * Support Armv8.1-M Privileged Execute Never (PXN) attribute and Thread reentrancy disabled (TRD) feature * New platforms added * Add a TF-M security landing page * Enhance dual-cpu non-secure mailbox reference implementation This is the first release performed in the OpenCI infrastructure with no single issue encountered. Thanks to everyone who directly and indirectly contributed to this milestone. Anton Komlev TF-M technical lead Arm Ltd.

3 years, 7 months

2
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Re: [TF-M] Technical Forum call - Sep 2

by Anton Komlev

Hi, The agenda for the forum tomorrow: 1. "Summary of the proposed changes in FF-M v1.1 beta" by Andrew Thoelke 2. "Summary of upcoming significant changes in SPM" by Ken Liu containing: * MMIO and interrupt binding. * Remove unformal symbols such as ARM_LIB_STACK_MSP. Thanks, Anton From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Saturday, August 28, 2021 9:36 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Technical Forum call - Sep 2 Hi, There are some significant changes happen in SPM and I want to introduce them in a summary, contains: * MMIO and interrupt binding. * Remove unformal symbols such as ARM_LIB_STACK_MSP. Assuming 30 mins should be good enough. BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Anton Komlev via TF-M Sent: Wednesday, August 25, 2021 7:13 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] Technical Forum call - Sep 2 Hi, The next Technical Forum is planned on Thursday, September 2, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 7 months

1
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Re: [TF-M] [RFC] Changing initialization Stack from PSP to MSP

by Kevin Peng

Hi all, We plan to merge the below patch on next Monday. We will not be able to verify on all platforms. Please do have a test on your platforms. Best Regards, Kevin From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Kevin Peng via TF-M Sent: Tuesday, August 24, 2021 11:02 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [RFC] Changing initialization Stack from PSP to MSP Hi dear platform maintainers, I'd like to draw your attention on this patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11165>. It changes the initialization stack from PSP to MSP. Would you please check if this change breaks your platform? Hi Thomas@IAR, would you please check the changes for IAR? Thanks. For the details of the change, please refer to the patch. Best Regards, Kevin

3 years, 7 months

1
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Re: [TF-M] [Request Platform Support] Abstracted MMIO HAL

by Ken Liu

The patchset has updated and now CI passed okay: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11187 BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Thursday, August 19, 2021 2:16 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [Request Platform Support] Abstracted MMIO HAL Hi everyone, The existing HAL interface for isolation hardware is not unified, we have to call several interfaces to setup isolation boundaries. Hence, a deeper abstracted interface are provided. Here are the details: - It assumes the hardware resources usages are decided by system designer. Hence there are couple of listed hardware data in the platform code, now most of them are defined in C sources. - When a partition is referencing peripheral (represented as MMIO in FFM), the manifest tooling would link specified resources with the data defined in platform. Now it is using a naming pattern, to let the partition found the resources defined above (now it uses linker to do this). - A HAL API 'tfm_hal_bind_partition' is called when a partition runtime structure is created. This API tells partition info to platform, let platform return an encoded 'p_boundaries' for SPM binding partition with platform. - When boundaries related operations happen in future, SPM would delivery this 'p_boundaries' back to platform, let platform perform boundary setup and check, such as boundary switch or memory check. SPM won't care about the hardware specific settings any more, such as privilged, non-secure/secure and how many MMIO the partition claimed, even the MPU/MPC/PPC things. - Resources defined in platform sources but not referenced would be stripped by toolchain flag. Resources not defined but referenced by partition would generate a linker error, as symbol can't be resolved. We created a patch to showcase the usage on AN521: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 This patch applies a simple encoding for all isolation levels. You can check how the p_boundaries is used under different isolation levels. Platform can use other encoding mechanism if applicable. Now come to the request: Please review this patch, and port similar HAL API into your platform. We are maintaining the default platforms such as AN521, AN519 and MUSCA_B1, but it need so much effort on port to all the platforms. Current CI cannot pass on this patch (as it contains modification for one platform only), our first goal is to let CI pass build on all checked platforms, and then please platform owner ensures it works on your platform. Any feedbacks are welcome. Thank you very much! /Ken

3 years, 8 months

1
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Re: [TF-M] Technical Forum call - Sep 2

by Ken Liu

Hi, There are some significant changes happen in SPM and I want to introduce them in a summary, contains: * MMIO and interrupt binding. * Remove unformal symbols such as ARM_LIB_STACK_MSP. Assuming 30 mins should be good enough. BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Wednesday, August 25, 2021 7:13 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] Technical Forum call - Sep 2 Hi, The next Technical Forum is planned on Thursday, September 2, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

1
0
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Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M

by David Hu

Hi Chris, It is an excellent suggestion. Out-of-tree Secure Partition build can help integrate secure test service. Non-secure tests are a bit limited due to current tf-m-tests framework right now. Do you prefer to run platform-specific tests alone or still integrate platform-specific tests into TF-M regression tests? Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of chris.brand--- via TF-M Sent: Tuesday, August 24, 2021 11:46 PM To: tf-m(a)lists.trustedfirmware.org Subject: Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Just wondering if any though has been given to supporting platform-specific tests? Chris From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of David Hu via TF-M Sent: Tuesday, August 24, 2021 3:21 AM To: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://intranet-content.infineon.com/explore/aboutinfineon/rules/informati…>. Hi Andrej, Thanks for the suggestion. Sure. I will track it in the backlog. Currently Jianliang and I are more focusing on the structure level enhancement. But definitely later we will take more effort in the detailed optimizations. Please let us know any time if any other potential issue shall be optimized. Best regards, Hu Ziji From: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Sent: Tuesday, August 24, 2021 6:15 PM To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [RFC] Decoupling tf-m-tests from TF-M Hi Hu Zij, Thank you for adding possibility to select test cases flexibly. Also, there are about 10 "test" services/partitions in addition to the core PSA ones. But every instance allocates own resources, which can be shared. Guess, merging these 10 test services, which have a common structure, can save some memory. Thank you, Andrej From: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Sent: Tuesday, August 24, 2021 11:54 AM To: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [RFC] Decoupling tf-m-tests from TF-M Hi Andrej, Sorry for the trouble. It does be an issue when TF-M features and test cases are growing faster. So now TF-M support to select a single test case or a subset of test cases to build and run. If running all the tests together costs too much memory, you can select some test cases or just a single one in one time. It is also helpful when you focus on a specific test in debug or development. We are also considering other additional mechanisms to select test case flexibly. Regarding "merging existing ones", do you mean that some test cases shall be disabled by default or combining the similar test cases? May I ask for some examples? Best regards, Hu Ziji From: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Sent: Tuesday, August 24, 2021 5:44 PM To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [RFC] Decoupling tf-m-tests from TF-M Hi Hu Ziji, BTW: The number of the testing partitions and services is growing consuming memory resources. So, we have to disable some tests for our memory constrained devices. Please think about minimizing number of "testing" partitions/services, by merging existing ones, when it is possible. Thank you, Andrej Butok SW Tech Lead Edge Processing NXP Semiconductors From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of David Hu via TF-M Sent: Tuesday, August 24, 2021 11:33 AM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Hi all, As you may know, Jianliang and I are working to better decouple tf-m-tests from trusted-firmware-m repo. The purpose of the decoupling enhancement includes: * Making it more easier to integrate TF-M and port tf-m-tests * Making it more easier to develop TF-M tests, to minimize the changes to TF-M source code or build system. * Making it more flexible to re-structure tf-m-tests and minimize the impact to TF-M Previously Jianliang has decouple test case control and enable users to select single NS/S regression test case in build and test. Currently we are focusing on decoupling tf-m-tests specific config setting from TF-M. So far we have proposed the following major changes: * Decouple tf-m-tests specific config setting from trusted-firmware-m. [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] * Move tf-m-tests specific configs to tf-m-tests repo from trusted-firmware-m [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] More patch sets for decoupling are under review as well. * Decouple tf-m-tests secure log from non-secure log. Switch tf-m-tests secure log to TF-M SP log. [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] * Trigger secure regression tests in TF-M SPE in IPC model, to simplify multi-core development/tests [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] I'd appreciate it if you can take a look at the patch sets above. Any suggestion or comment is welcome. If you have any specific requirement or suggestion of tf-m-tests enhancement, please feel free to contact Jianliang and me. Thanks in advance. Best regards, Hu Ziji

3 years, 8 months

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Technical Forum call - Sep 2

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, September 2, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

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Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M

by Chris.Brand＠infineon.com

Just wondering if any though has been given to supporting platform-specific tests? Chris From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of David Hu via TF-M Sent: Tuesday, August 24, 2021 3:21 AM To: Andrej Butok <andrey.butok(a)nxp.com> Cc: tf-m(a)lists.trustedfirmware.org Subject: Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://intranet-content.infineon.com/explore/aboutinfineon/rules/informati…>. Hi Andrej, Thanks for the suggestion. Sure. I will track it in the backlog. Currently Jianliang and I are more focusing on the structure level enhancement. But definitely later we will take more effort in the detailed optimizations. Please let us know any time if any other potential issue shall be optimized. Best regards, Hu Ziji From: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Sent: Tuesday, August 24, 2021 6:15 PM To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [RFC] Decoupling tf-m-tests from TF-M Hi Hu Zij, Thank you for adding possibility to select test cases flexibly. Also, there are about 10 "test" services/partitions in addition to the core PSA ones. But every instance allocates own resources, which can be shared. Guess, merging these 10 test services, which have a common structure, can save some memory. Thank you, Andrej From: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Sent: Tuesday, August 24, 2021 11:54 AM To: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [RFC] Decoupling tf-m-tests from TF-M Hi Andrej, Sorry for the trouble. It does be an issue when TF-M features and test cases are growing faster. So now TF-M support to select a single test case or a subset of test cases to build and run. If running all the tests together costs too much memory, you can select some test cases or just a single one in one time. It is also helpful when you focus on a specific test in debug or development. We are also considering other additional mechanisms to select test case flexibly. Regarding "merging existing ones", do you mean that some test cases shall be disabled by default or combining the similar test cases? May I ask for some examples? Best regards, Hu Ziji From: Andrej Butok <andrey.butok(a)nxp.com<mailto:andrey.butok@nxp.com>> Sent: Tuesday, August 24, 2021 5:44 PM To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [RFC] Decoupling tf-m-tests from TF-M Hi Hu Ziji, BTW: The number of the testing partitions and services is growing consuming memory resources. So, we have to disable some tests for our memory constrained devices. Please think about minimizing number of "testing" partitions/services, by merging existing ones, when it is possible. Thank you, Andrej Butok SW Tech Lead Edge Processing NXP Semiconductors From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of David Hu via TF-M Sent: Tuesday, August 24, 2021 11:33 AM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Hi all, As you may know, Jianliang and I are working to better decouple tf-m-tests from trusted-firmware-m repo. The purpose of the decoupling enhancement includes: * Making it more easier to integrate TF-M and port tf-m-tests * Making it more easier to develop TF-M tests, to minimize the changes to TF-M source code or build system. * Making it more flexible to re-structure tf-m-tests and minimize the impact to TF-M Previously Jianliang has decouple test case control and enable users to select single NS/S regression test case in build and test. Currently we are focusing on decoupling tf-m-tests specific config setting from TF-M. So far we have proposed the following major changes: * Decouple tf-m-tests specific config setting from trusted-firmware-m. [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] * Move tf-m-tests specific configs to tf-m-tests repo from trusted-firmware-m [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] More patch sets for decoupling are under review as well. * Decouple tf-m-tests secure log from non-secure log. Switch tf-m-tests secure log to TF-M SP log. [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] * Trigger secure regression tests in TF-M SPE in IPC model, to simplify multi-core development/tests [TF-M patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>][tf-m-tests patch<https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr…>] I'd appreciate it if you can take a look at the patch sets above. Any suggestion or comment is welcome. If you have any specific requirement or suggestion of tf-m-tests enhancement, please feel free to contact Jianliang and me. Thanks in advance. Best regards, Hu Ziji

3 years, 8 months

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Re: [TF-M] [RFC] Decoupling tf-m-tests from TF-M

by Andrej Butok

Hi Hu Ziji, BTW: The number of the testing partitions and services is growing consuming memory resources. So, we have to disable some tests for our memory constrained devices. Please think about minimizing number of "testing" partitions/services, by merging existing ones, when it is possible. Thank you, Andrej Butok SW Tech Lead Edge Processing NXP Semiconductors From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of David Hu via TF-M Sent: Tuesday, August 24, 2021 11:33 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [RFC] Decoupling tf-m-tests from TF-M Hi all, As you may know, Jianliang and I are working to better decouple tf-m-tests from trusted-firmware-m repo. The purpose of the decoupling enhancement includes: * Making it more easier to integrate TF-M and port tf-m-tests * Making it more easier to develop TF-M tests, to minimize the changes to TF-M source code or build system. * Making it more flexible to re-structure tf-m-tests and minimize the impact to TF-M Previously Jianliang has decouple test case control and enable users to select single NS/S regression test case in build and test. Currently we are focusing on decoupling tf-m-tests specific config setting from TF-M. So far we have proposed the following major changes: * Decouple tf-m-tests specific config setting from trusted-firmware-m. [TF-M patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftrusted-firmware-m%2F%2B%2F11167&data=04%7C01 %7Candrey.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4 c6fa92cd99c5c301635%7C0%7C0%7C637653943958809255%7CUnknown%7CTWFpbGZsb3d8eyJ WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata =4nA45CyrLoYjN2b9ytZ6HL16Of9ItUs5OAUbPlsFPTM%3D&reserved=0> ][tf-m-tests patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftf-m-tests%2F%2B%2F11169%2F1&data=04%7C01%7Ca ndrey.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4c6fa 92cd99c5c301635%7C0%7C0%7C637653943958809255%7CUnknown%7CTWFpbGZsb3d8eyJWIjo iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=aBB 0Wq8QLghyfAdwzpK%2BHR8R8LVN5emXxL0KOc4bPho%3D&reserved=0> ] * Move tf-m-tests specific configs to tf-m-tests repo from trusted-firmware-m [TF-M patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftrusted-firmware-m%2F%2B%2F10647&data=04%7C01 %7Candrey.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4 c6fa92cd99c5c301635%7C0%7C0%7C637653943958819210%7CUnknown%7CTWFpbGZsb3d8eyJ WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata =QwtROeuQVK8nWtprtRVZJnzXM2%2FBgX1ZZspl6dsxBFE%3D&reserved=0> ][tf-m-tests patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftf-m-tests%2F%2B%2F10556&data=04%7C01%7Candre y.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4c6fa92cd 99c5c301635%7C0%7C0%7C637653943958819210%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=IYzd75F NoPwLLzoHqvpNJrn4fAaHTeOYzTujFWJDPTQ%3D&reserved=0> ] More patch sets for decoupling are under review as well. * Decouple tf-m-tests secure log from non-secure log. Switch tf-m-tests secure log to TF-M SP log. [TF-M patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftrusted-firmware-m%2F%2B%2F11153&data=04%7C01 %7Candrey.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4 c6fa92cd99c5c301635%7C0%7C0%7C637653943958829167%7CUnknown%7CTWFpbGZsb3d8eyJ WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata =27x4o2UrAFCFMFx3fC7ebiv0EAsBvOEtY%2BqtZzc7Q6Q%3D&reserved=0> ][tf-m-tests patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftf-m-tests%2F%2B%2F11131%2F3&data=04%7C01%7Ca ndrey.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4c6fa 92cd99c5c301635%7C0%7C0%7C637653943958829167%7CUnknown%7CTWFpbGZsb3d8eyJWIjo iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=xT5 oks2R0hXyCorWsfkytx%2FCidUF8%2Bv6jMBAFxrgf2g%3D&reserved=0> ] * Trigger secure regression tests in TF-M SPE in IPC model, to simplify multi-core development/tests [TF-M patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftrusted-firmware-m%2F%2B%2F11181&data=04%7C01 %7Candrey.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4 c6fa92cd99c5c301635%7C0%7C0%7C637653943958839123%7CUnknown%7CTWFpbGZsb3d8eyJ WIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata =tMKKb6FHOh1pBZg62QKHBUCXaAXmv8o%2F%2Bwabe2XXOnc%3D&reserved=0> ][tf-m-tests patch <https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Freview.tr ustedfirmware.org%2Fc%2FTF-M%2Ftf-m-tests%2F%2B%2F11182&data=04%7C01%7Candre y.butok%40nxp.com%7Ce6deb39c9db74755362008d966e231b0%7C686ea1d3bc2b4c6fa92cd 99c5c301635%7C0%7C0%7C637653943958839123%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4 wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=j6Hf2wa 6wKm8LphtLfo8SK8kkhnazAJ%2F5RrN2eUhFIc%3D&reserved=0> ] I'd appreciate it if you can take a look at the patch sets above. Any suggestion or comment is welcome. If you have any specific requirement or suggestion of tf-m-tests enhancement, please feel free to contact Jianliang and me. Thanks in advance. Best regards, Hu Ziji

3 years, 8 months

2
3
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[RFC] Decoupling tf-m-tests from TF-M

by David Hu

Hi all, As you may know, Jianliang and I are working to better decouple tf-m-tests from trusted-firmware-m repo. The purpose of the decoupling enhancement includes: * Making it more easier to integrate TF-M and port tf-m-tests * Making it more easier to develop TF-M tests, to minimize the changes to TF-M source code or build system. * Making it more flexible to re-structure tf-m-tests and minimize the impact to TF-M Previously Jianliang has decouple test case control and enable users to select single NS/S regression test case in build and test. Currently we are focusing on decoupling tf-m-tests specific config setting from TF-M. So far we have proposed the following major changes: * Decouple tf-m-tests specific config setting from trusted-firmware-m. [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11167>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11169/1>] * Move tf-m-tests specific configs to tf-m-tests repo from trusted-firmware-m [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10647>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/10556>] More patch sets for decoupling are under review as well. * Decouple tf-m-tests secure log from non-secure log. Switch tf-m-tests secure log to TF-M SP log. [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11153>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11131/3>] * Trigger secure regression tests in TF-M SPE in IPC model, to simplify multi-core development/tests [TF-M patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11181>][tf-m-tests patch<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/11182>] I'd appreciate it if you can take a look at the patch sets above. Any suggestion or comment is welcome. If you have any specific requirement or suggestion of tf-m-tests enhancement, please feel free to contact Jianliang and me. Thanks in advance. Best regards, Hu Ziji

3 years, 8 months

1
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[RFC] Changing initialization Stack from PSP to MSP

by Kevin Peng

Hi dear platform maintainers, I'd like to draw your attention on this patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11165>. It changes the initialization stack from PSP to MSP. Would you please check if this change breaks your platform? Hi Thomas@IAR, would you please check the changes for IAR? Thanks. For the details of the change, please refer to the patch. Best Regards, Kevin

3 years, 8 months

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Re: [TF-M] Firmware update API - MCUboot update

by Tamas Ban

Hi Suresh, I think still there is some misunderstanding here about the role of MCUboot in the update process. I try to clarify it: * MCUboot is the *bootloader* in the system, it does not care how the new images are getting installed on the device. * MCUboot defines a static allocation of the flash. There are the primary slot where the active runtime images are stored and executed from there (if upgrade startegy is XIP) and there are the secondary slot where the candidate image is written by the update client, which his part of the runtime firmware. * MCUboot is not involved at all in the process when new image is downloaded from the remote server and written to the flash (to secondary slot). * MCUboot jobs to recognize that there is a new image (magic value is set at the end of secondary slot), validates it (hash + signature) and move it (if valid) to the primary slot to make it executable (because image is XIP and linked to the address space of the primary slot) * When moving is done just jumps to the reset handler of the new image. TF-M expose a standard FWU API, which can be used by any cloud client: * FWU partition in the secure side is responsible to write the new image to the flash * Because TF-M relies on MCUBoot as a bootloader therefore the image must be placed to the right place in the flash (secondary slot) and some MCUboot specific flags must be set (magic value to indicate new image existence). Therefore in the FWU secure partition there is a MCUboot shim layer to handle these bootloader specific task * However, MCUBoot can replaced by any bootloader if one wants and then the shim layer also can be replaced to do other bootloader specific things. * In this architecture update client is responsible to download the image from the remote server and the FWU partition is responsible to write it to the right location. An implementer can choose: * Implement the FWU API on the non-secure side * Do not use FWU API, just writes the image to the right flash location and set certain flags in the flash that allows MCUboot to find the image * Replace MCUboot with custom bootloader if he wants I hope this helps! The call path in the previous mail was incorrect. The correct call path is: Update client application | | Function call V FWU API | | TF-M psa_call() etc. V FWU Partition | | Function call V MCUBoot Shim Layer | | Function call V MCUBoot user API ========================== RESTART ====================== MCUboot engine parse flash, validate new image, if there is any, and move it around to the primary slot | | V Function call, never returns Reset_Handler of new image BR, Tamas From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Suresh Marisetty via TF-M Sent: 2021. május 25., kedd 16:16 To: Andrew Thoelke <Andrew.Thoelke(a)arm.com>; tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Firmware update API - MCUboot update Hi Andrew, I am thinking of two paths for the update client application: one through MCUBoot and another direct to the FWU interface. MCUBoot path is for legacy application compatibility purpose. Longer term, I am wondering if MCUBoot is needed. In embedded there is always a challenge to optimize the code size as space in storage is limited and any optimization to remove redundancies will help. Update client application | | Function call V V MCUBoot user API | Shim layer | | | | Function call | V | FWU API <------------| | | TF-M psa_call() etc. V FWU Partition | | Function call V MCUBoot user API MCUBoot engine MCUBoot image size is around 60K and thanks Suresh Marisetty Infineon Semiconductor Corporation From: Andrew Thoelke <Andrew.Thoelke(a)arm.com<mailto:Andrew.Thoelke@arm.com>> Sent: Tuesday, May 25, 2021 1:39 AM To: Marisetty Suresh (CYSC CSS ICW SW SSE) <Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Firmware update API - MCUboot update Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://goto.infineon.com/SocialEngineering>. Hi Suresh, > I am of the belief that MCUboot will be a very thin shim layer over the FWU API to provide the compatibility interface to legacy software and most of the work that was done earlier in MCUboot is pushed down into the FWU partition. Are you suggesting that the software stack might look like this: Update client application | | Function call V MCUBoot user API Shim layer | | Function call V FWU API | | TF-M psa_call() etc. V FWU Partition | | Function call V MCUBoot user API MCUBoot engine This looks like it has one more layer than it needs, as either: 1. The Update client application could Talk directly to the FWU API, or 2. The first MCUBoot user API could interact with an MCUBoot update partition (RoT Service), without having to tunnel the MCUBoot API over the FWU API. The latter might not be straightforward - I am not sure that anyone has reviewed the two APIs for this purpose. Are you only considering this software stack for a system where touching the update client application source code is not possible (needed for option #1 above)? - and you also cannot introduce a custom MCUBoot RoT Service partition (option #2 above) so you want to reuse TF-M's existing FWU API and partition? Regards, Andrew From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Suresh Marisetty via TF-M Sent: 25 May 2021 02:37 To: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Firmware update API - MCUboot update Hi Sherry, Thanks for the info. Wondering if there is some documentation or powerpoint explaining how the MCUBoot is changed to accommodate the FWU API. Details that would help: 1. How the MCUboot works without the FWU API - natively 2. How the MCUBoot needs to be modified to leverage from FWU API 3. What components are retained in MCUBoot ex: image format, signing, metadata, tools I am of the belief that MCUboot will be a very thin shim layer over the FWU API to provide the compatibility interface to legacy software and most of the work that was done earlier in MCUboot is pushed down into the FWU partition. The other way to look at it is: If somebody wants to replace MCUboot with a simple BL to integrate it tightly into TFM, what would that look like? thanks Suresh Marisetty Infineon Semiconductor Corporation From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: Thursday, May 13, 2021 7:51 PM To: Marisetty Suresh (CYSC CSS ICW SW SSE) <Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Firmware update API - MCUboot update Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://goto.infineon.com/SocialEngineering>. Hi Suresh, The MCUboot update functionality is about validating the existing images on the device which is different from that of the firmware update service which follows mostly with the PSA Firmware Update API spec<https://developer.arm.com/documentation/ihi0093/latest/>. We designed a shim layer between the firmware update partition and bootloader. A specific bootloader can be ported into the firmware update partition via that shim layer. Please refer to the firmware update service document<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/techn…>. In the MCUboot based shim layer implementation, it calls some user/public APIs provided by MCUboot to achieve its functionality. For example, the Firmware Update API spec describes that psa_fwu_install() API should validate the image or defer the validation to a system reboot. In the MCUboot shim layer implementation, it calls the boot_write_magic() API to mark the image as a candidate image for MCUboot and defers the image validation to a system reboot. Please refer to this link<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/secure_fw/…>. Can you please provide more specific suggestion or questions? Regards, Sherry Zhang From: Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com> <Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>> Sent: Thursday, May 13, 2021 11:40 PM To: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Firmware update API - MCUboot update Hi Sherry, Please take a closer look at the MCUboot and TFM might want to have a clear position/distinction between these two and how to transition from MCUboot update to this mechanism or it could be that they complement each other. thanks Suresh Marisetty Infineon Semiconductor Corporation From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: Wednesday, May 12, 2021 8:55 PM To: Marisetty Suresh (CYSC CSS ICW SW SSE) <Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Firmware update API - MCUboot update Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://goto.infineon.com/SocialEngineering>. Hi Suresh, The firmware update service APIs are for updating the firmware. The functionalities of these APIs includes loading the image into its target device(flash), verifying the image and installing it and so on. The user can call the these APIs to achieve update images. For example, in the integration of TF-M and the FreeRTOS OTA<https://github.com/Linaro/amazon-freertos/blob/tfm-fwu/libraries/abstractio…>, the OTA agent calls the firmware update service APIs to achieve an image update remotely. I guess that the "MCUboot update services" you mentioned refers to the functionality of MCUboot which acts as a bootloader. As a bootloader, it can verify the image which already exists on the device and chose the right image to start up. But it cannot, for example, load the image into device or control the image update process. The firmware update partition calls some user APIs provided by MCUboot to cooperate with it. You can refer to https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/techn…. Regards, Sherry Zhang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Suresh Marisetty via TF-M Sent: Thursday, May 13, 2021 11:09 AM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] Firmware update API - MCUboot update Hi, I would like to see if there is any guidance/documentation on how to coordinate between the firmware update services API with that of MCUboot. Does the use of this API make the MCUboot update services redundant? thanks Suresh Marisetty Infineon Semiconductor Corporation Lead Member of Technical Staff CYSC CSS ICW SW SSE Mobile: +5103863997 Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>

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Re: [TF-M] Out-of-tree secure partition build support

by David Hu

Hi all, Out-of-tree secure partition build is enabled in TF-M. I'd appreciate it if you are interested to try it in your daily development. Any feedback is welcome! Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of David Hu via TF-M Sent: Thursday, August 12, 2021 11:54 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] Out-of-tree secure partition build support Hi all, Can I ask you to review the following patch set to enable out-of-tree secure partition build in TF-M? https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10562/ The purpose is to enable developers to develop their own secure partitions outside TF-M repo. Developers can maintain their own code and repos, independently. Developers can pass their out-of-tree secure partition paths via TF-M command line, to build out-of-tree partitions with TF-M together. For more details, please check the updated document: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10696 Suggestions and comments are welcome! Best regards, Hu Ziji

3 years, 8 months

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Test configurations refinements

by Jianliang Shen

Hi all. I have introduced the topic of test configurations refinements in the tech forum on August 5. With this new feature, you can build single test case to decrease the image size and the time to wait irrelevant test cases running when debugging. You can use all the 22 new flags in test repo: TEST_NS TEST_S TEST_NS_ATTESTATION TEST_NS_AUDIT TEST_NS_CRYPTO TEST_NS_ITS TEST_NS_PS TEST_NS_PLATFORM TEST_NS_FWU TEST_NS_IPC TEST_NS_CORE TEST_NS_QCBOR TEST_NS_T_COSE TEST_NS_MULTI_CORE TEST_NS_SLIH_IRQ TEST_NS_FLIH_IRQ TEST_S_ATTESTATION TEST_S_AUDIT TEST_S_CRYPTO TEST_S_ITS TEST_S_PS TEST_S_PLATFORM TEST_S_FWU TEST_S_IPC You can easily use the command below to start single test like NS attestation test case: cmake -S . -B cmake_build -DTFM_PLATFORM=arm/mps2/an521 \ -DTFM_TOOLCHAIN_FILE=toolchain_GNUARM.cmake \ -DCMAKE_BUILD_TYPE=Release \ -DTFM_PSA_API=ON \ -DTEST_NS_ATTESTATION=ON Meanwhile, you may receive the warning messages when your test inputs are not supported on the platform. Here are the patches about this change, any suggestions or improvements are welcome in code review. l 10767: Build: Control single test without TEST_S/TEST_NS [TF-M repo] https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/10767 l 10768: Build: Control single test without TEST_S/TEST_NS [Test repo] | https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/10768 Best Regards Jianliang Shen

3 years, 8 months

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Re: [TF-M] Technical Forum call - Aug 19

by Kevin Peng

Hi Anton, Did you missed my topic below - brief update on the interrupt status in TF-M and an introduction on how to use/enable it Best Regards, Kevin From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Wednesday, August 18, 2021 11:13 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Technical Forum call - Aug 19 The agenda for the forum: 1. "Of out-of-tree Secure Partition build" by David Hu, 2. AOB See you, Anton From: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Sent: Wednesday, August 18, 2021 2:30 AM To: Anton Komlev <Anton.Komlev(a)arm.com<mailto:Anton.Komlev@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Technical Forum call - Aug 19 Hi Anton, I'd like to introduce the proposal of out-of-tree Secure Partition build. It may take 15 ~ 20 mins. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Kevin Peng via TF-M Sent: Tuesday, August 17, 2021 5:49 PM To: Anton Komlev <Anton.Komlev(a)arm.com<mailto:Anton.Komlev@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Technical Forum call - Aug 19 Hi Anton, I'd like to give a brief update on the interrupt status in TF-M and an introduction on how to use/enable it. Would take ~20 min. Best Regards, Kevin From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Anton Komlev via TF-M Sent: Tuesday, August 17, 2021 5:26 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] Technical Forum call - Aug 19 Hi, The next Technical Forum is planned on Thursday, Aug 19 at 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

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[Request Platform Support] Abstracted MMIO HAL

by Ken Liu

Hi everyone, The existing HAL interface for isolation hardware is not unified, we have to call several interfaces to setup isolation boundaries. Hence, a deeper abstracted interface are provided. Here are the details: - It assumes the hardware resources usages are decided by system designer. Hence there are couple of listed hardware data in the platform code, now most of them are defined in C sources. - When a partition is referencing peripheral (represented as MMIO in FFM), the manifest tooling would link specified resources with the data defined in platform. Now it is using a naming pattern, to let the partition found the resources defined above (now it uses linker to do this). - A HAL API 'tfm_hal_bind_partition' is called when a partition runtime structure is created. This API tells partition info to platform, let platform return an encoded 'p_boundaries' for SPM binding partition with platform. - When boundaries related operations happen in future, SPM would delivery this 'p_boundaries' back to platform, let platform perform boundary setup and check, such as boundary switch or memory check. SPM won't care about the hardware specific settings any more, such as privilged, non-secure/secure and how many MMIO the partition claimed, even the MPU/MPC/PPC things. - Resources defined in platform sources but not referenced would be stripped by toolchain flag. Resources not defined but referenced by partition would generate a linker error, as symbol can't be resolved. We created a patch to showcase the usage on AN521: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11036 This patch applies a simple encoding for all isolation levels. You can check how the p_boundaries is used under different isolation levels. Platform can use other encoding mechanism if applicable. Now come to the request: Please review this patch, and port similar HAL API into your platform. We are maintaining the default platforms such as AN521, AN519 and MUSCA_B1, but it need so much effort on port to all the platforms. Current CI cannot pass on this patch (as it contains modification for one platform only), our first goal is to let CI pass build on all checked platforms, and then please platform owner ensures it works on your platform. Any feedbacks are welcome. Thank you very much! /Ken

3 years, 8 months

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Re: [TF-M] Technical Forum call - Aug 19

by David Hu

Hi Anton, I'd like to introduce the proposal of out-of-tree Secure Partition build. It may take 15 ~ 20 mins. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Kevin Peng via TF-M Sent: Tuesday, August 17, 2021 5:49 PM To: Anton Komlev <Anton.Komlev(a)arm.com>; tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Technical Forum call - Aug 19 Hi Anton, I'd like to give a brief update on the interrupt status in TF-M and an introduction on how to use/enable it. Would take ~20 min. Best Regards, Kevin From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Anton Komlev via TF-M Sent: Tuesday, August 17, 2021 5:26 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] Technical Forum call - Aug 19 Hi, The next Technical Forum is planned on Thursday, Aug 19 at 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

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Re: [TF-M] Technical Forum call - Aug 19

by Kevin Peng

Hi Anton, I'd like to give a brief update on the interrupt status in TF-M and an introduction on how to use/enable it. Would take ~20 min. Best Regards, Kevin From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Tuesday, August 17, 2021 5:26 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] Technical Forum call - Aug 19 Hi, The next Technical Forum is planned on Thursday, Aug 19 at 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

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Technical Forum call - Aug 19

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Aug 19 at 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

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Re: [TF-M] [Question] FIH usage in platforms

by David Hu

Hi Ken, “double-check every return value of sub-functions, this is really a burden when under developing” That’s exactly why FIH can help mitigate physical attacks. It adds redundant checks and increases the complexity in code to make it difficult for attackers. It of course also increase develop efforts and it is expected for physical attack mitigation. Regarding tight schedule, it can be workaround by splitting the HAL API definitions with and without FIH enabled respectively. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Thursday, August 12, 2021 4:54 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] [Question] FIH usage in platforms Thanks, then we can do some planning and make the FIH feature online again before the deadline. I do agree FIH needs an update. There would be reasons for HAL to change its implementation or prototype; and the existing FIH needs another copy of implementation, change the prototype a bit, and double-check every return value of sub-functions, this is really a burden when under developing: We first need to ensure the non-FIH version work, get reviewed; and then prepare the FIH version, get reviewed again. And, the platform owner may be afraid of changing the HAL implementation, as it is risky to do that. I’d suggest enhancing the solution that: - Doing measurement without changing HAL API prototype. As the bandwidth is always a problem, so I have to prioritize the designs. Let’s see if we can get help from people. Otherwise, I will allocate some effort after HAL update is done. This means, there would be a couple of HAL updates with no FIH support recently, and FIH version comes later. Any volunteer is welcome. /Ken From: Michel JAOUEN <michel.jaouen(a)st.com<mailto:michel.jaouen@st.com>> Sent: Thursday, August 12, 2021 4:39 PM To: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>>; Ken Liu <Ken.Liu(a)arm.com<mailto:Ken.Liu@arm.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [Question] FIH usage in platforms Hello, Next platform with FIH enabled is foreseen to be in V1.5.0 with FIH enabled (the pull request without FIH enabled is expected in september) FIH support is planned on later pull request. So FIH recovering needs to be done at least 3 weeks before V1.5.0 code freeze, to let the time to do adaptation/test /fix on this new platform. Best Regards Michel ST Restricted From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of David Hu via TF-M Sent: jeudi 12 août 2021 10:34 To: Ken Liu <Ken.Liu(a)arm.com<mailto:Ken.Liu@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Question] FIH usage in platforms Hi Ken, Imho, it can be more reasonable to improve HAL and FIH API together, compared to removing existing security protection. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Thursday, August 12, 2021 4:26 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Question] FIH usage in platforms Hi Michel, Is there a rough timeline for the next stm platform? I can estimate if we got time to update or add it back. Besides that, curious if ST got test environments for FIH? If there are some then at least we have a method to evaluate the FIH effect. BR. /Ken From: Michel JAOUEN <michel.jaouen(a)st.com<mailto:michel.jaouen@st.com>> Sent: Thursday, August 12, 2021 4:21 PM To: Ken Liu <Ken.Liu(a)arm.com<mailto:Ken.Liu@arm.com>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: RE: [Question] FIH usage in platforms Hello, Regarding FIH feature, for stm next platform I consider FIH as key for Faul injection Mitigation, so the FIH is enabled for the next stm platform. Even if a platform gets certified without this FIH feature, other mitigations at platform level have been set to get certified. The benefits of FIH is to make the mitigation available for all platform, so I consider that maintaining it during development is important. Best regards Michel ST Restricted From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: mercredi 11 août 2021 07:24 To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] [Question] FIH usage in platforms Hi David, This mail is seeking evidence about how FIH is effectively working. As the latest L3 certified device is still using v1.0-RC2, where the FIH is not supported in that codebase. I assumed a pre-condition when “recovering back”: if FIH still can prove its importance. The FIH has to be enhanced before recovering back. FIH is a serious hardware feature so what software can do is limited. Delay and Double-check protection unit is the two easiest way can be applied. Other behaviors, as we can see, affect the development much, which makes it more proper to be done in toolchain instead of programming. Compare with this complex but less used mechanism, we have prioritized features to be done. That is the reason why we need to do the feature development first instead of solving the development difficulty at the current stage. Meanwhile, anyone proposing a better FIH mechanism is welcome – that would make the feature development and difficulty solving in parallel. BR. /Ken From: David Hu <David.Hu(a)arm.com<mailto:David.Hu@arm.com>> Sent: Wednesday, August 11, 2021 11:53 AM To: Ken Liu <Ken.Liu(a)arm.com<mailto:Ken.Liu@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [Question] FIH usage in platforms Hi Ken, Based on your idea, several fundamental countermeasures against physical attacks will be removed. * Double checking return value * Execution flow counters * Structured variables with initial failure values Mitigation to physical attacks is required in PSA Level 3 certify. It is crucial for TF-M to provide reasonable physical attack mitigations. Please provide proper justifications to prove that removal of those countermeasures above won’t weaken existing protection against physical attacks. On the other hand, even if those countermeasures above are removed now, it will still affect the HAL updates when they are “recovered back”. So why not solve the development difficulty at this moment? Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Ken Liu via TF-M Sent: Monday, August 9, 2021 10:18 AM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: [TF-M] [Question] FIH usage in platforms Hi, Is there anyone enables FIH when developing or releasing? Background: We got a couple of HAL updates during feature development and found FIH affects the development progress much, as we need to provide two sets of prototypes and implementation for involved functions, this doubles the efforts on debugging or coding. So a draft idea in my mind is to shut down part of the functionalities during this update stage and recover them back if FIH still can prove its importance later. These functionalities are KEPT during the update stage: - FIH delay, which makes it harder to find the exact time point. - Protection unit validation, ensures the protection unit is initialized as expected. Please provide your feedback about the usage and the idea. For platforms that are applying this feature, we need to find out a trade-off way. Thanks. /Ken

3 years, 8 months

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