- TF-M - lists.trustedfirmware.org

by Dave Rodgman

Hi all, Please be advised that the Mbed TLS GitHub migration is complete. The new home for Mbed TLS is: https://github.com/Mbed-TLS We recommend updating your project, checkouts, etc to point at the new repository, but it's not urgent as everything will continue to work for some time via automatic redirection. Also please note that our project boards, which we use for planning upcoming work via epics, and tracking current activity, have moved. They are now available here: Epics board: https://github.com/orgs/Mbed-TLS/projects/1 Current activity: https://github.com/orgs/Mbed-TLS/projects/2 Thanks Dave Rodgman On 22/03/2022, 14:52, "Dave Rodgman via Mbed-tls-announce" <mbed-tls-announce(a)lists.trustedfirmware.org> wrote: Hi all, Please note that in the next couple of weeks, we will migrate Mbed TLS to a new GitHub organisation. Your existing scripts, links etc for accessing Mbed TLS on GitHub should not be affected. This will change the url from https://github.com/ARMmbed/mbedtls to https://github.com/Mbed-TLS/mbedtls . GitHub will redirect any accesses to the old URL for the foreseeable future, but we would recommend updating your links once the migration is complete. All of the Mbed TLS repositories will migrate to this new organisation, i.e.: mbedtls mbedtls-docs mbedtls-test Thanks Dave Rodgman -- Mbed-tls-announce mailing list -- mbed-tls-announce(a)lists.trustedfirmware.org To unsubscribe send an email to mbed-tls-announce-leave(a)lists.trustedfirmware.org

3 years, 8 months

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Technical Forum call - March 31

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, March 31, 7:00-8:00 UTC (East time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 8 months

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TF-M on GitHub opinions collection

by Anton Komlev

Hello, Quite some time ago there was a proposal to move TF-M into GitHub. The main motivation is: more convenient review process, the Wiki for knowledge sharing and issue tracking facility. This idea had been discussed multiple times in TSC. The following options were considered: 1. Hybrid: Add TF-M on GitHub with 2 ways synchronization between GitHub and existing Git/Gerrit 2. GitHub only: Move to GitHub completely and drop Gerrit. 3. Mirror: Create a read-only mirror on GitHub. TF-M review process stays in Gerrit but Wiki and issue tracking are on GitHub. 4. Nothing: Stay on Gerrit as good enough solution. The options are ordered by complexity and cost each has pros and cons. The Mirror option (3) seeing as the best compromise and practically affordable in a short time. Please share your opinion and comments on the topic with any dependencies or specific requirements to be considered. Thanks, Anton

3 years, 9 months

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TF-M Profile Small supports SFN model

by David Hu

Hi all, I'd like to ask for your help to review the patch which enables SFN model in TF-M Profile Small. SFN model is defined in FF-M v1.1 spec. With this patch, Profile Small still enables Library model by default and users can select SFN model instead via build command. Patch: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/14500 TF-M Profile Small document update: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/14501 Any comment or suggestion is welcome. Best regards, Hu Ziji

3 years, 9 months

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TrustedFirmware Code of Conduct

by Don Harbin

Hi All, Please find the link to the TrustedFirmware Community Code of Conduct here: https://developer.trustedfirmware.org/w/collaboration/community_guidelines/… Trusted Firmware has a very diverse and global developer community. It is important that we adhere to the code of conduct in all our interactions. For some of you all this may be new and for others just a gentle reminder. In either case, if you have any questions, please feel free to reach out to me directly. And thanks to you all for your contributions to the TrustedFirmware community! Best regards, Don Harbin TrustedFirmware Community Manager don.harbin(a)linaro.org

3 years, 9 months

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Technical Forum call - March 17

by Arnold Gabriel Benedict

Hi, I would like to present our study on RPC Test Framework for TF-M along with a demo in our next technical forum on 17th March. Thanks, Arnold

3 years, 9 months

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Secure Partition interrupt signal processing

by Andersson, Joakim

Hi. I've been working on making an example on how an application can use the secure interrupts in a secure partition in TF-M. During this I've encountered an issue where the secure partition will not be scheduled to process the secure interrupt signal in certain conditions. I've compared it to the current SLIH and FLIH test cases to my observed behaviour and I could see that they did not have this problem. I've created a test-case that triggers the problem [0]. In the mailing list I can see that this was actually discussed recently [1] The summary is that secure partitions will not be scheduled to process a secure interrupt signal when the interrupt is interrupting the NSPE. I could not find that this was documented anyway, but maybe I have overlooked. In any case I find this behaviour very unexpected and I would like to know if this is indeed a design decision and the behaviour has to be this way? If I wanted to do some processing in the secure partition context it would now mean that I have to get the NSPE to trigger this through a secure partition call. This seems like a limitation to me . I'd like to know what would be the issue with scheduling the partition once it now has the signal asserted. I've done a quick test with scheduling the partition at this point with [2] and this now works as I expect it to. I'd be happy to follow up with submitting a change to schedule the partition as done in [2] if that is an acceptable solution. [0] https://github.com/joerchan/tf-m-tests/commit/d9f0a3a7653b594d0fa797d9e0bca… [1] https://lists.trustedfirmware.org/archives/list/tf-m@lists.trustedfirmware.… [2] https://github.com/joerchan/sdk-trusted-firmware-m/commit/e5512c6e8b2bad95c…

3 years, 9 months

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MCUboot upgraded to v1.9.0 in TF-M

by Sherry Zhang

Hi, Just a reminder that the MCUboot version has been upgraded to v1.9.0<https://github.com/mcu-tools/mcuboot/releases/tag/v1.9.0> in TF-M. If you are using the local MCUboot repo, then you need to update it to that version to avoid build error. Regards, Sherry Zhang

3 years, 9 months

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Technical Forum call - March 17

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, March 17, 15:00-16:00 UTC (West time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 9 months

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The new design proposal guideline now take effect

by David Hu

Hi all, The new and simplified TF-M design proposal guideline is approved: https://tf-m-user-guide.trustedfirmware.org/docs/contributing/tfm_design_pr…. Please feel free to submit your topics to mailing list or tech forum! Formal design documents are NOT required anymore. Best regards, Hu Ziji

3 years, 9 months

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TF-M release v1.6,0 date change to April 28

by Anton Komlev

Hello, TF-M release v1.6.0 will be shifted from April 15 to April 28. The main reason is Easter holiday and expected lack of availability from community and platform owners around that date. Feature freeze will be moved to April 6th when the release branch will be created. Please update your plans accordingly. Please let me know if this change make difficulty for you and better date is possible. Thanks, Anton

3 years, 9 months

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Simplify TFM_PLATFORM in build system

by Jianliang Shen

Hi all, I want to simplify the flag TFM_PLATFORM in build system. TF-M now already supports two different ways to choose specific platform, for example AN521: - Absolute path: '<tf-m path>/platform/ext/target/arm/mps2/an521' - Relative path: 'arm/mps2/an21' Recently I have uploaded a [tf-m patch]<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/14260> to support platform name: - Platform name: 'an521' I think it will be more convenient for developers to use: - Users don't need to remember and type the absolute or relative path, only target platform name is enough. - If the structure of certain platform is changed, the default build command of TFM_PLATFORM is same. I'd be very grateful if you can give any suggestion or enhancement for me. Thanks. Best Regards Jianliang Shen

3 years, 9 months

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TF-M design documents about spm

by zhilei.wang

Dear All, I view the tf-m source code for the first time, and many of the code details can not be make clear. So .., where may I find the design documents of spm, for example: trusted-firmware-m-TF-Mv1.5.0\secure_fw\spm\cmsis_func and cmsis_psa software modules. Best Regards Wang Zhilei | Software Beken Corporation ---------------------------------------------------------------------------- ---------------------------------------------------------

3 years, 9 months

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Technical Forum call - March 3

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, March 3, 7:00-8:00 UTC (Asian time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 9 months

2
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TF-M covertly results and configs to align our coverity environment to TF-M project CI

by Kostiantyn.Tkachov＠infineon.com

Hi colleagues! Could we get a list of MISRA/CERT-C violations that were found by tf-m Coverity CI, as example from https://ci.trustedfirmware.org/job/tf-m-coverity/lastSuccessfulBuild/ Also (if it possible), could you provide Coverity configs to help align this tool setup on our side to CI and to check all changes before any pool requests? Best regards, Kostiantyn Tkachov Cypress Semiconductor Ukraine Firmware Security

3 years, 9 months

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Problem compiling Trusted Firmware M in Linux for PSOC64

by AntonioJavier.CabreraGutierrez＠infineon.com

Hello, I am writing to you asking help because we are having problems when I try to compile the Trusted Firmware M from source code. I downloaded the code from the official repository: https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git I moved to the last TAG: TF-Mv1.5.0 I am following this tutorial for PSOC64 platform https://tf-m-user-guide.trustedfirmware.org/platform/ext/target/cypress/pso… When I execute the first cmake command indicating the platform and the toolchain everything works well: cmake -DTFM_PLATFORM=cypress/psoc64 -DTFM_TOOLCHAIN_FILE=../toolchain_GNUARM.cmake .. The problems appears when I build the code using the second cmake command: cmake --build cmake_build -- -j I got this output [cid:image003.jpg@01D82A77.95B43640] /home/admin/Escritorio/trusted-firmware-m/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.c: In function 't_cose_crypto_pub_key_verify': /home/admin/Escritorio/trusted-firmware-m/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.c:145:5: error: conversion to non-scalar type requested 145 | verification_key_psa = (psa_key_handle_t)verification_key.k.key_handle; | ^~~~~~~~~~~~~~~~~~~~ /home/admin/Escritorio/trusted-firmware-m/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.c: In function 't_cose_crypto_pub_key_sign': /home/admin/Escritorio/trusted-firmware-m/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.c:194:5: error: conversion to non-scalar type requested 194 | signing_key_psa = (psa_key_handle_t)signing_key.k.key_handle; | ^~~~~~~~~~~~~~~ /home/admin/Escritorio/trusted-firmware-m/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.c: In function 't_cose_crypto_sig_size': /home/admin/Escritorio/trusted-firmware-m/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.c:245:5: error: conversion to non-scalar type requested 245 | signing_key_psa = (psa_key_handle_t)signing_key.k.key_handle; | ^~~~~~~~~~~~~~~ secure_fw/partitions/internal_trusted_storage/CMakeFiles/tfm_psa_rot_partition_its.dir/build.make:425: recipe for target 'secure_fw/partitions/internal_trusted_storage/CMakeFiles/tfm_psa_rot_partition_its.dir/__/__/__/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.o' failed make[2]: *** [secure_fw/partitions/internal_trusted_storage/CMakeFiles/tfm_psa_rot_partition_its.dir/__/__/__/lib/ext/t_cose/crypto_adapters/t_cose_psa_crypto.o] Error 1 make[2]: *** Waiting for unfinished jobs.... CMakeFiles/Makefile2:1347: recipe for target 'secure_fw/partitions/internal_trusted_storage/CMakeFiles/tfm_psa_rot_partition_its.dir/all' failed make[1]: *** [secure_fw/partitions/internal_trusted_storage/CMakeFiles/tfm_psa_rot_partition_its.dir/all] Error 2 Makefile:135: recipe for target 'all' failed make: *** [all] Error 2 There are the version of the software that are using: arm-none-eabi-gcc (GNU Arm Embedded Toolchain 10.3-2021.10) 10.3.1 20210824 (release) cmake version 3.23.0-rc2 It seems strange to me that there are compilation errors in the source code, that's why I am writing this mail, in case there is a bug in the code. Best regards. Antonio Javier Cabrera Gutierrez Infineon Technologies AG PhD Candidate R&D Engineer IFAG BEX RDE RDF ISS Office: +49 89 234 36403 Mobile: +49 151 181 34322 AntonioJavier.CabreraGutierrez(a)infineon.com<mailto:AntonioJavier.CabreraGutierrez@infineon.com> Am Campeon 1-15 85579 Neubiberg Germany www.infineon.com<http://www.infineon.com> Discoveries<http://www.infineon.com/discoveries> Facebook<http://www.facebook.com/infineon> Twitter<http://www.twitter.com/Infineon> LinkedIn<http://www.linkedin.com/company/infineon-technologies> Part of your life. Part of tomorrow. Infineon Technologies AG Chairman of the Supervisory Board: Dr. Wolfgang Eder Management Board: Dr. Reinhard Ploss (CEO), Dr. Helmut Gassel, Jochen Hanebeck, Dr. Sven Schneider Registered Office: Neubiberg Commercial Register: München HRB 126492 This e-mail and any attachments are confidential. They are intended solely for the attention and use of the named addressee(s). If you are not the named addressee(s) you must not use, disclose, retain or reproduce all or any part of the information contained in this e-mail or any attachments. Any unauthorized use or disclosure may be unlawful. If you have received this e-mail by mistake, please inform the sender immediately and delete it and all copies from your system and destroy any hard copies of it.

3 years, 9 months

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Locking of PRIS bit in AIRCR register

by JAYLES Romain

Hi all, We are currently testing the tfm-m implementation on a STMicroelectronic chip: stm32u5 board. This stm32u5 has a special register: SYSCFG_CSLOCKR (see https://www.st.com/resource/en/reference_manual/rm0456-stm32u575585-armbase…). This register allows to lock the PRIS bit of the AIRCR register from further modification. The issue here is that, in the ST implementation, thanks to this SYSCFG_CSLOCKR, the PRIS bit of the AIRCR is locked at boot (Reset_Handler in file startup_stm32u5xx_s.c). Resulting in the function tfm_arch_set_secure_exception_priorities() not being able to set the PRIS bit of the AIRCR. This situation lead to big issues at runtime as interrupt priority of NSPE are able to pre-empt interrupt of SPE. Disabling the locking of PRIS bit solve our problem but currently we don't see a clean way to integrate chip specific security features (something like callback/tfm_hal_ ) after the function tfm_arch_set_secure_exception_priorities() has been called. What would be the best way to fix the current issue which could also arise on other platform ? Regards, Romain

3 years, 9 months

3
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Please review a new design proposal guideline

by David Hu

Hi all, As part of the documentation improvements, a new design proposal guideline [1] is proposed to replace and simplify the current process. The basic idea is to encourage developers to share their design via mailing list and tech forum, without a well-formatted design document. If developers prefer a document for a new feature, please provide an integration guide/user manual instead. Please check the details in the patch below. [1] https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/14104 The rendered html version: https://ci-builds.trustedfirmware.org/static-files/KTOoRMhB4VsgNQFkdMgWZcZG… Best regards, Hu Ziji

3 years, 9 months

1
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Issues with psa_wait() when waiting for interrupts and IPC function calls.

by Martin Gunnarsson

Hello, I am trying to write an Application RoT for a research project I am a part of. I have run into an issue that I have been unable to solve independently. My problem is the unexpected behavior of psa_wait() when using signal masks. I have two signals, TFM_TIMER1_IRQ_SIGNAL and TFM_SECURE_FUNCTION_SIGNAL. The TIMER1_IRQ signal is triggered by an FLIH interrupt handler that returns TFM_FLIH_SIGNAL. The interrupt is triggered every 1 second by TIMER1. The TFM_SECURE_FUNCTION_SIGNAL is triggered by a periodic function call from the NSPE (a Zephyr thread) and is called every 10 seconds. Observed result: If PSA_WAIT_ANY is used as a signal mask, the TIMER0_IRQ_SIGNAL will only be received when TFM_SECURE_FUNCTION_SIGNAL is received, ergo, every 10 s. Thus any stage 2 handling of an interrupt would be missed. If TFM_TIMER1_IRQ_SIGNAL is used as a signal mask, the signal will be received every 1 s as expected. The TFM_SECURE_FUNCTION_SIGNAL will never be received, as can be expected in the NSPEtoo. I have tried a "hybrid approach" where I call psa_wait(TFM_TIMER1_IRQ_SIGNAL, PSA_BLOCK) /* handle signals .... */ and then psa_wait(TFM_SECURE_FUNCTION_SIGNAL, PSA_POLL). The stage 2 IRS is called, and the secure function is also called. But not with the regularity that I would like. Am I missing something obvious? I have read the Secure Interrupt Integration Guide and carefully studied the SLIH and FLIH test services for the TF-M regression tests. Have I forgotten to reset a signal somewhere? Does the interrupt not preempt the NSPE? I would be immensely grateful for any or all responses. If you need more information, please let me know. Best wishes, Martin Gunnarsson PhD Student RISE Research Institutes of Sweden & Lund University Complete code of my Application RoT: #include <stdbool.h> #include <stdint.h> #include <stddef.h> #include "tfm_api.h" #include "tfm_secure_api.h" #include "psa/service.h" #include "tfm_sp_log.h" #include "psa_manifest/pid.h" #include "psa_manifest/tfm_secure_partition.h" #include <hal/nrf_gpio.h> #include <hal/nrf_timer.h> #include <helpers/nrfx_reset_reason.h> #include <nrf_board.h> #include <region_defs.h> #define TIMER_RELOAD_VALUE (1*1024*1024) static volatile uint32_t interrupt_ctr = 0; static volatile uint32_t function_ctr = 0; static void timer_init(NRF_TIMER_Type * TIMER) { nrf_timer_mode_set(TIMER, NRF_TIMER_MODE_TIMER); nrf_timer_bit_width_set(TIMER, NRF_TIMER_BIT_WIDTH_32); nrf_timer_frequency_set(TIMER, NRF_TIMER_FREQ_1MHz); nrf_timer_cc_set(TIMER, NRF_TIMER_CC_CHANNEL0, TIMER_RELOAD_VALUE); /* Clear the timer once event is generated. */ nrf_timer_shorts_enable(TIMER, NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK); } static void timer_stop(NRF_TIMER_Type * TIMER) { nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_STOP); nrf_timer_int_disable(TIMER, NRF_TIMER_INT_COMPARE0_MASK); nrf_timer_event_clear(TIMER, NRF_TIMER_EVENT_COMPARE0); } static void timer_start(NRF_TIMER_Type * TIMER) { timer_stop(TIMER); nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_CLEAR); nrf_timer_int_enable(TIMER, NRF_TIMER_INT_COMPARE0_MASK); nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_START); } static void timer_event_clear(NRF_TIMER_Type *TIMER) { nrf_timer_event_clear(TIMER, NRF_TIMER_EVENT_COMPARE0); } void tfm_secure_controller_secure_timer_start(void) { timer_init(NRF_TIMER1); timer_start(NRF_TIMER1); } void tfm_secure_controller_secure_timer_clear_intr(void) { timer_event_clear(NRF_TIMER1); } psa_flih_result_t tfm_timer1_irq_flih(void) { tfm_secure_controller_secure_timer_clear_intr(); interrupt_ctr++; return PSA_FLIH_SIGNAL; } static psa_status_t tfm_sp_secure_function_ipc(psa_msg_t *msg) { function_ctr++; LOG_INFFMT("Secure function called %u times, interrupt ctr: %u\n", function_ctr, interrupt_ctr ); return PSA_SUCCESS; } void tfm_sp_secure_function(psa_msg_t *msg) { psa_status_t status; status = tfm_sp_secure_function_ipc(msg); psa_reply(msg->handle, status); } void tfm_sp_entry(void) { LOG_INFFMT("Secure Partition: Init\n"); tfm_secure_controller_secure_timer_start(); psa_irq_enable(TFM_TIMER1_IRQ_SIGNAL); psa_signal_t signals = 0; uint32_t ctr = 0; while (1) { signals = psa_wait(TFM_TIMER1_IRQ_SIGNAL, PSA_BLOCK); if ( (signals & TFM_TIMER1_IRQ_SIGNAL) == TFM_TIMER1_IRQ_SIGNAL) { ctr++; LOG_INFFMT("FLIH stage 2 %u\n", interrupt_ctr); psa_reset_signal(TFM_TIMER1_IRQ_SIGNAL); } if ( ctr % 10 == 0 ) { signals = psa_wait(PSA_WAIT_ANY, PSA_POLL); if ( (signals & TFM_SECURE_FUNCTION_SIGNAL) == TFM_SECURE_FUNCTION_SIGNAL) { psa_msg_t msg; psa_get(signals, &msg); tfm_sp_secure_function(&msg); } } } }

3 years, 9 months

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New API tfm_hal_system_halt()

by Bøe, Sebastian

Hi, in the effort to ease debugging by supporting a choice between halting and rebooting we are introducing a new HAL API: void tfm_hal_system_halt(void) which by default (weak) does: __disable_irq(); while(1) { __WFE(); } CPUs cannot halt. But they can sleep until they are awoken in a loop, which is pretty close. tfm_hal_system_halt() is, when configured so, used by tfm_core_panic() which is why we disable irqs to stop all threads of execution, not just the thread that is executing. Currently it is proposed that tfm_core_panic() halts when TFM_HALT_ON_CORE_PANIC is ON and otherwise reboots. TFM_HALT_ON_CORE_PANIC is default ON if and only if Debug mode is enabled. Any feedback to these changes are welcome, and if any platform needs to halt in a different manner then a contribution would be welcome as well. https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/13839

3 years, 9 months

1
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TF-M regression test refinements

by Jianliang Shen

Hi, all I'd like to share two new refinements in TF-M test repo to you. l The struct variable test_result_t has been removed from the definition of struct variable test_t. It is unnecessary to set an initial value of test result for each case. With this change, the binary size will be reduced. Please see [test patch]<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/13822/4> for more details. l The flag TEST_SKIPPED has been added into enum variable test_status_t, works with TEST_PASSED and TEST_FAILED. TEST_SKIPPED indicates that the test case is skipped in runtime when the test environment is unavailable. Please ee [test patch]<https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/13826/5> for more details. Hope these two changes can help your work in the future. Please let me know if anything can be improved. Thanks! Best Regards Jianliang Shen

3 years, 10 months

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FF PSA API overhead

by Bøe, Sebastian

Hi, the performance improvement presentation[0] reports a FF PSA API overhead of 20 000 CPU cycles for the psa_call. Which is 300 us for a 64MHz CPU. This is quite a lot of instructions and I am concerned about whether real world embedded application's will have time to call these secure services. I'm interested in isolation level 2. I understand that it is not possible to have isolation level 2 with library mode. But what about SFN mode, could that eventually support isolation level 2? If not, what is the current status of optimizing the service call overhead for IPC. Is it considered to be as optimized as it can be or is there still hope for optimizing further? [0] https://www.trustedfirmware.org/docs/tf-m_forum_20211209-TF-M_Performance-I…

3 years, 10 months

2
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Technical Forum call - Feb 17

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, February 17, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 10 months

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[FYI] Tiny update in level 3 ld/sct files

by Ken Liu

Hi, We got a tiny update merged in level 3 ld/sct files to support partition runtime: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/13925 Platforms with level 3 support please have a test and report issue here if spotted. We have internally tested MPS2 and MUSCA_B1. Thanks. /Ken

3 years, 10 months

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halting or rebooting on faults

by Bøe, Sebastian

Hi, it seems we could try to be more consistent with fault handling. The current default behaviour is: Error code returned from an SPE function? Reboot. MemFault/HardFault/SecureFault in the SPE? Halt. Null-pointer dereference from the NSPE? (results in a secure fault for cortex-m) Halt. Should we perhaps consistently halt or consistently reboot for these three cases and allow this to be configurable? It is not clear to me why an error returned from a function results in a reboot, whereas a Hardfault does not. They both indicate a fault in the SPE. At the very least the behaviour should be configurable, which this PR is a step towards: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/13839

3 years, 10 months

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Security vulnerability notice - Firmware Update psa_fwu_write service vulnerability

by Sherry Zhang

Hi all, This email is a notification of a new security vulnerability reported to TF-M. In TF-M version between 3e7129f<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/commit/?id=3e71…> and 921d0ea<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/commit/?id=921d…>, the caller of ``psa_fwu_write()`` from SPE or NSPE can overwrite the stack memory outside of the local buffer in Firmware Update partition in IPC model. Please check the details in the security advisory doc<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/13873/5/docs…>. The advisory has been merged in master branch today. The fix<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/commit/?id=78f7…> has been merged into master branch before TF-Mv1.5.0. Regards, Sherry Zhang

3 years, 10 months

1
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Dual core broken

by Chris.Brand＠infineon.com

Commit 27f9a49508547320c50056a52a372674c27771eb seems to have missed changing ns_agent_mailbox, breaking dual core. I'd send a patch, but I's not immediately obvious what it should look like... Seems like a good change, but inadequately reviewed? Chris Brand Cypress Semiconductor (Canada), Inc. An Infineon Technologies Company Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com> International Place 13700 V6V 2X8 Richmond Canada www.infineon.com<www.cypress.com> www.cypress.com<http://www.cypress.com> Discoveries<http://www.infineon.com/discoveries> Facebook<http://www.facebook.com/infineon> Twitter<http://www.twitter.com/Infineon> LinkedIn<http://www.linkedin.com/company/infineon-technologies> Part of your life. Part of tomorrow. NOTICE: The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material of Infineon Technologies AG and its affiliated entities which is for the exclusive use of the individual designated above as the recipient. Any review, retransmission, dissemination or other use of, or taking of any action in reliance upon, this information by persons or entities other than the intended recipient is prohibited. If you received this in error, please contact immediately the sender by returning e-mail and delete the material from any computer. If you are not the specified recipient, you are hereby notified that all disclosure, reproduction, distribution or action taken on the basis of this message is prohibited.

3 years, 10 months

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Why ARM_FLASH_STATUS is volatile in flash driver?

by Roman Mazurak

Hi all, Why ARM_FLASH_STATUS was declared volatile in https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/commit/platform… commit ? I believe it's much better to declare volatile variable when there is such need instead of forcing all variables to become volatile through typedef. Thanks, Roman.

3 years, 10 months

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[CANCELLED] Technical Forum call - Feb 3

by Anton Komlev

Hi, Let's cancel the forum tomorrow due to the empty agenda and the holiday time in Asia. Best regards, Anton From: Anton Komlev via TF-M <tf-m(a)lists.trustedfirmware.org> Sent: Thursday, January 27, 2022 4:36 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] Technical Forum call - Feb 3 Hi, The next Technical Forum is planned on Thursday, Feb 3, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. This slot is in Chinese New Year celebration period so we can expect fewer participants from Asia. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 10 months

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Custom implementation of of tfm_hal_system_reset

by Bohdan.Hunko＠infineon.com

Hi everyone, I have a few questions related to TF-M code: 1. Default implementation of tfm_hal_system_reset(void) from platform/ext/common/tfm_platform.c<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…> just calls NVIC_SystemReset(), but some ARM platform, take musca_b1 for example, reimplement it (platform/ext/target/arm/musca_b1/sse_200/tfm_hal_platform.c<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…> ). Custom implementations tend to also disable and clean IRQ and call mpc_revert_non_secure_to_secure_cfg(); Is there any benefits of doing that??? If so then what those benefits are? 1. tfm_core_panic() (secure_fw/spm/ffm/utilities.c<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/secure_fw/…>) when TFM_FIH_PROFILE_ON is defined calls fih_delay() and tfm_hal_system_reset() twice. Is this done to ensure that tfm_hal_system_reset() will be called (even if first one was skipped there is second one)? And if so, can a comment be added there to highlight that intention? Regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 10 months

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Technical Forum call - Feb 3

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Feb 3, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. This slot is in Chinese New Year celebration period so we can expect fewer participants from Asia. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 10 months

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Please Use Test Version Specified in TF-M CMake Configs

by Xinyu Zhang

Hi All, Please do use the tf-m-tests version specified in TF-M CMake configs (TFM_TEST_REPO_VERSION in trusted-firmware-m/lib/ext/tf-m-tests/repo_config_default.cmake), otherwise there might be some unexpected build errors. Please let us know if there is any problem. Thanks, Xinyu

3 years, 10 months

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TF-M Open CI Back to Normal

by Xinyu Zhang

Hi All, TF-M Open CI is back to normal. Please feel free to use. Thanks, Xinyu From: Xinyu Zhang Sent: Monday, January 17, 2022 4:05 PM To: TF-M mailing list <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: TF-M Open CI Not Stable Right Now Hi All, Sorry to inform you that TF-M Open CI is not stable right now. Jobs are likely to come into unexpected failure. I'll keep following up with the latest information. Sorry for any inconvenience! Thanks, Xinyu

3 years, 10 months

1
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unsubscribe

by st9hack＠yahoo.com

unsubscribe

3 years, 11 months

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Technical Forum call - Jan 20

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, January 20, 15:00-16:00 UTC (US time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 11 months

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Updated invitation: TF-M Tech forum @ Every 4 weeks from 8am to 9am on Thursday (MST) (tf-m@lists.trustedfirmware.org)

by don.harbin＠linaro.org

This event has been changed. Title: TF-M Tech forum This is an open forum for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC.Feel free to forward it to colleagues.Details of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/==… Info====Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-M Tech forum - US Time Zone FriendlyTime: Oct 29, 2020 03:00 PM Greenwich Mean Time        Every 4 weeks on Thu, until Mar 18, 2021, 6 occurrence(s)        Oct 29, 2020 03:00 PM        Nov 26, 2020 03:00 PM        Dec 24, 2020 03:00 PM        Jan 21, 2021 03:00 PM        Feb 18, 2021 03:00 PM        Mar 18, 2021 03:00 PMPlease download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJEocOmvpz4tHtYu0Wvn2fOsG91u0kv_ECPd/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/95570795742?pwd=N21YWHJpUjZyS3Fzd0tkOG9hanpidz09Meeting ID: 955 7079 5742Passcode: 177658One tap mobile+12532158782,,95570795742# US (Tacoma)+13462487799,,95570795742# US (Houston)Dial by your location        +1 253 215 8782 US (Tacoma)        +1 346 248 7799 US (Houston)        +1 669 900 9128 US (San Jose)        +1 301 715 8592 US (Germantown)        +1 312 626 6799 US (Chicago)        +1 646 558 8656 US (New York)        877 853 5247 US Toll-free        888 788 0099 US Toll-freeMeeting ID: 955 7079 5742Find your local number: https://linaro-org.zoom.us/u/abx3I7IoRq When: Every 4 weeks from 8am to 9am on Thursday Mountain Standard Time - Phoenix Where: https://linaro-org.zoom.us/j/95570795742?pwd=N21YWHJpUjZyS3Fzd0tkOG9hanpidz… Calendar: tf-m(a)lists.trustedfirmware.org Who: * Don Harbin - creator * tf-m(a)lists.trustedfirmware.org * anton.komlev(a)arm.com * abdelmalek.omar1(a)gmail.com * kevin.townsend(a)linaro.org * seth(a)nxmlabs.com * leonardo.sandoval(a)linaro.org Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=djczYWZqa3ZmMW5n… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account tf-m(a)lists.trustedfirmware.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

3 years, 11 months

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Updated invitation: TF-M Tech forum @ Every 4 weeks from 8am to 9am on Thursday (MST) (tf-m@lists.trustedfirmware.org)

by don.harbin＠linaro.org

This event has been changed. Title: TF-M Tech forum This is an open forum for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC.Feel free to forward it to colleagues.Details of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/==… Info====Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-M Tech forum - US Time Zone FriendlyTime: Oct 29, 2020 03:00 PM Greenwich Mean Time        Every 4 weeks on Thu, until Mar 18, 2021, 6 occurrence(s)        Oct 29, 2020 03:00 PM        Nov 26, 2020 03:00 PM        Dec 24, 2020 03:00 PM        Jan 21, 2021 03:00 PM        Feb 18, 2021 03:00 PM        Mar 18, 2021 03:00 PMPlease download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJEocOmvpz4tHtYu0Wvn2fOsG91u0kv_ECPd/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/95570795742?pwd=N21YWHJpUjZyS3Fzd0tkOG9hanpidz09Meeting ID: 955 7079 5742Passcode: 177658One tap mobile+12532158782,,95570795742# US (Tacoma)+13462487799,,95570795742# US (Houston)Dial by your location        +1 253 215 8782 US (Tacoma)        +1 346 248 7799 US (Houston)        +1 669 900 9128 US (San Jose)        +1 301 715 8592 US (Germantown)        +1 312 626 6799 US (Chicago)        +1 646 558 8656 US (New York)        877 853 5247 US Toll-free        888 788 0099 US Toll-freeMeeting ID: 955 7079 5742Find your local number: https://linaro-org.zoom.us/u/abx3I7IoRq When: Every 4 weeks from 8am to 9am on Thursday Mountain Standard Time - Phoenix Where: https://linaro-org.zoom.us/j/95570795742?pwd=N21YWHJpUjZyS3Fzd0tkOG9hanpidz… Calendar: tf-m(a)lists.trustedfirmware.org Who: * Don Harbin - creator * tf-m(a)lists.trustedfirmware.org * anton.komlev(a)arm.com * abdelmalek.omar1(a)gmail.com * kevin.townsend(a)linaro.org * seth(a)nxmlabs.com * leonardo.sandoval(a)linaro.org Event details: https://calendar.google.com/calendar/event?action=VIEW&eid=djczYWZqa3ZmMW5n… Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account tf-m(a)lists.trustedfirmware.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

3 years, 11 months

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TF-M Open CI Not Stable Right Now

by Xinyu Zhang

Hi All, Sorry to inform you that TF-M Open CI is not stable right now. Jobs are likely to come into unexpected failure. I'll keep following up with the latest information. Sorry for any inconvenience! Thanks, Xinyu

3 years, 11 months

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Remove use of ER_INITIAL_PSP

by Mingyang Sun

Hi, ER_INITIAL_PSP section was used as the Trustzone NS Agent partition stack in IPC model. Since Trustzone NS Agent partition has changed to use private variables as its stack, ER_INITIAL_PSP related definitions and references can be removed. Change: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/13186 This change involves all the platforms for IPC model, it removes: * Definition of ER_INITIAL_PSP section in the linker script * Reference of ER_INITIAL_PSP for isolation configuration in platform HALs This can simplify the linker script a bit. This patch is going to be put there for a while as there are holidays, but please do review it when you see this mail. Plan to merge it before end of Jan, as soon as all concerns get addressed (if there are). Regards, Mingyang

3 years, 11 months

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Code size analyze tool for TF-M further optimization

by Jianliang Shen

Hi all, I'd like to introduce a code size analyse tool to you. The tool is developed to help optimize TF-M code size by gathering the data from map file and output friendly. These python scripts can - Get a database to implement data tables from ARMCLANG or GNUARM map file. - Supply an UI for developers to scan sorted information of sections, libraries, object files, functions and data. - Help analyse the biggest or smallest targets in certain image. It can also help search functions or data to locate their address and detail information. - Diff two databases to see the code size increment or decrement between two different build results. The patch is: [tf-m-tools]<https://review.trustedfirmware.org/c/TF-M/tf-m-tools/+/12665>, it also contains the document for users. Hope this tool can help you measure code size in the daily work. Please let me know if anything can be improved. I'd like to merge this tool this Friday if no critical comment. Best Regards Jianliang Shen

3 years, 11 months

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Asking for patch review of aligning flash driver to CMSIS Flash APIs

by Sherry Zhang

Hi, Currently, there is a known misalignment with the current CMSIS Flash interface in TF-M as described in TF-M doc<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/integ…>. I created this patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/13295/> to eliminate the misalignment. As it impacts all the platforms, may I ask for review on this patch? This patch has been verified by staging nightly CI. Thanks! Regards, Sherry Zhang

3 years, 11 months

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Re: Power management and TFM

by Suresh.Marisetty＠infineon.com

Here is what I could find on Zephyr: https://docs.zephyrproject.org/1.14.1/reference/power_management/index.html Any thoughts from anybody on this topic. thanks Suresh Marisetty Infineon Semiconductor Corporation From: Anton Komlev <Anton.Komlev(a)arm.com> Sent: Thursday, January 13, 2022 2:19 AM To: Joseph Yiu <Joseph.Yiu(a)arm.com>; Marisetty Suresh (CYSC CSS ICW SW SSE) <Suresh.Marisetty(a)infineon.com> Subject: RE: Power management and TFM Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://intranet-content.infineon.com/explore/aboutinfineon/rules/informati…>. Hi Suresh, As you noted, the power management topic is not covered by TF-M, leaving it for a platform or project level handling. Would you like to discuss the topic on TF-M Tech Forum and check what community thinks about it? Best regards, Anton From: Joseph Yiu <Joseph.Yiu(a)arm.com<mailto:Joseph.Yiu@arm.com>> Sent: Wednesday, January 12, 2022 8:52 PM To: Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>; Anton Komlev <Anton.Komlev(a)arm.com<mailto:Anton.Komlev@arm.com>> Subject: RE: Power management and TFM Hi Suresh, > Power management does have an impact on security flows and how it is done. Agree. > Not sure if there is a standardized framework and application note on how it can be done on Corte-M with or without Secure Enclave model Unfortunately there is no standardization of power management interface for Cortex-M systems today. And given that the low power implementation varies between different vendors significantly, trying to define a power control interface is going to be very challenging. By the way, I noticed you reply to me only. Is that intentional or would you want to have this conversation on the email list? Regards, Joseph From: Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com> <Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>> Sent: 12 January 2022 18:58 To: Joseph Yiu <Joseph.Yiu(a)arm.com<mailto:Joseph.Yiu@arm.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: Power management and TFM HI Anton and Joseph, Power management does have an impact on security flows and how it is done. This is a town down architecture/implementation starting with NSPE and down with expected behavior of SPE (secure boot, TFM context management, etc.), cold boot, warm boot, deep-sleep, hibernate and active modes. On the Cortex-A, there is PSCI framework couple with ACPI. Not sure if there is a standardized framework and application note on how it can be done on Corte-M with or without Secure Enclave model. thanks Suresh Marisetty Infineon Semiconductor Corporation From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Joseph Yiu via TF-M Sent: Monday, December 20, 2021 8:04 AM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Power management and TFM Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe<https://intranet-content.infineon.com/explore/aboutinfineon/rules/informati…>. Hi Suresh, Anton, This is an interesting topic :-) Armv8-M processors has some power management registers that can be restricted to Secure world access only. System Control Register (SCR) - Bit 2 SLEEPDEEP - 0 = Normal Sleep, 1 = Deep Sleep (this can also enable WIC feature). Access permission depends on SLEEPDEEPS. - Bit 3 SLEEPDEEPS - 0 - NS privileged world can r/w to SLEEPDEEP, 1 - SLEEPDEEP is RAZ/WI to NS privileged world (This is applicable to Cortex-M23, Cortex-M33, Cortex-M35P, Cortex-M55) Cortex-M55 also has Implementation defined power model control registers (CPDLPSTATE, DPDLPSTATE) https://developer.arm.com/documentation/101273/0101/Cortex-M55-Processor-le… If TrustZone is used (AIRCR.BFHFNMINS is 0), then these registers are Secure privileged access only. So definitely Secure firmware should provide some APIs for Non-secure software for changing the power control settings. However, I would expect that power control APIs would likely to be at a higher level which also manage other system level power control functions (which, as Anton said, device specific). In such case having APIs for modifying SLEEPDEEP and power model control registers is not helpful (or might even end up with confusions - e.g. if a SW developer trying to use both low level and high level APIs at the same time). Given that a Secure firmware can setup SLEEPDEEPS easily if it wants to allow/disallow access to SLEEPDEEP control, having an API for this might be overkill. Access to Cortex-M55's power model control registers is more tricky. Would an 'optional' reference API for updating power model control registers (CPDLPSTATE, DPDLPSTATE) be considered? Regards, Joseph From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Anton Komlev via TF-M Sent: 20 December 2021 12:32 To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Power management and TFM Hi Suresh, The power management is out of scope of TF-M core or any PSA service. Such functionality is HW platform specific and may vary depending on HW or SW adaptation capabilities. If you concern about a specific use case, where TF-M support is expected - let's discuss it here. Hope that helps, Anton From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Suresh Marisetty via TF-M Sent: Friday, December 17, 2021 8:11 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] Power management and TFM Hi, Wondering if anybody can throw some light on any ongoing efforts on power management on a system with TFM (deep sleep, etc). thanks Suresh Marisetty Infineon Semiconductor Corporation CYSC CSS ICW SW SSE Mobile: +5103863997 Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com> IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

3 years, 11 months

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FPU register (D8~D15) corrupted in library mode

by Eason Lai (賴易聖)

Hello TFM owners, I would like to report an issue for ARMv8-MAIN in TFM. From GCC9, it may use FPU registers (S16~S31) to backup general purpose registers for better performance. However, TFM’s library mode is not backup and restore FPU registers (S16~S31) base on EXC_RETURN.FType bit in tfm_core_sfn_request. (Reference for LR.FType https://developer.arm.com/documentation/100235/0004/the-cortex-m33-processo… ) This may causes FPU registers (S16~S31) to be corrupted in tfm_core_sfn_request, if interrupt happens between two SVC call. Here is an example to reproduce the issue: 1. Task A uses FPU S16 register to backup GPR R0 2. Task A calls psa_import_key() API 3. After the instruction “SVC %[SVC_REQ]” in tfm_core_sfn_request, the CONTROL.FPCA become “NOT active” 4. Enter FreeRTOS PendSV_Handler and schedule to others task. * Originally, this should backup S16 due to CONTROL.FPCA is active and EXC_RETURN.FType should be 0. * But, the EXC_RETURN.FType become 1 due to step3. So the S16 is not backup in stack and changed by others task. 1. Another task uses FPU S16 register (overwrite the value of S16 from Task A) 2. Enter FreeRTOS PendSV_Handler and schedule back to Task A 3. psa_import_key is finished and exit from TFM 4. Task A restore GPR R0 from FPU R16 5. Memory access violation in Task A due to incorrect value of GPR R0. Stacking FPU s16-s31 in tfm_core_sfn_request can fix this problem. Please check the blue instructions. Thank you. __attribute__((section("SFN"), naked)) int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr) { __ASM volatile( "PUSH {r4-r12, lr} \n" "MRS r4, control \n" /* Check FPCA in control register */ "TST r4, #0x04 \n" "IT NE \n" /* Stacking S16-S31, if CONTROL.FPCA = 1 */ "VSTMDBNE sp!, {s16-s31} \n" "PUSH {r4} \n" /* Backup CONTROL register */ "PUSH {r4} \n" /* For 8-bytes alignment to prevent xPSR.BIT9 = 1 */ "SVC %[SVC_REQ] \n" /* To remove upon instruction, xPSR.BIT9 should be masked to 0 in prepare_partition_iovec_ctx(…) */ "MOV r4, #0 \n" "MOV r5, r4 \n" "MOV r6, r4 \n" "MOV r7, r4 \n" "MOV r8, r4 \n" "MOV r9, r4 \n" "MOV r10, r4 \n" "MOV r11, r4 \n" "BLX lr \n" "SVC %[SVC_RET] \n" "POP {r4} \n" /* Restore CONTROL register */ "POP {r4} \n" "TST r4, #0x04 \n" /* Check FPCA in control register */ "IT NE \n" "VLDMIANE sp!, {s16-s31} \n" /* Restore S16-S31, if CONTROL.FPCA = 1 */ "POP {r4-r12, pc} \n" : : [SVC_REQ] "I" (TFM_SVC_SFN_REQUEST), [SVC_RET] "I" (TFM_SVC_SFN_RETURN) ); } Best regards!

3 years, 11 months

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Re: Pending PR needs merging

by Anton Komlev

Hi Jamie, The change has been merged. Sorry for the possible inconveniences caused by end of the year holidays. Best regards, Anton From: Jamie Mccrae via TF-M <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Sent: Tuesday, January 11, 2022 4:03 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] Pending PR needs merging Hi, Would it be possible to get this PR merged https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12686 due to a pending update for Zephyr? Thanks, Jamie THIS MESSAGE, ANY ATTACHMENT(S), AND THE INFORMATION CONTAINED HEREIN MAY BE PROPRIETARY TO LAIRD CONNECTIVITY, LLC. AND/OR ANOTHER PARTY, AND MAY FURTHER BE INTENDED TO BE KEPT CONFIDENTIAL. IF YOU ARE NOT THE INTENDED RECIPIENT, PLEASE DELETE THE EMAIL AND ANY ATTACHMENTS, AND IMMEDIATELY NOTIFY THE SENDER BY RETURN EMAIL. THIS MESSAGE AND ITS CONTENTS ARE THE PROPERTY OF LAIRD CONNECTIVITY, LLC. AND MAY NOT BE REPRODUCED OR USED WITHOUT THE EXPRESS WRITTEN CONSENT OF LAIRD CONNECTIVITY, LLC.

3 years, 11 months

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Pending PR needs merging

by Jamie Mccrae

Hi, Would it be possible to get this PR merged https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12686 due to a pending update for Zephyr? Thanks, Jamie THIS MESSAGE, ANY ATTACHMENT(S), AND THE INFORMATION CONTAINED HEREIN MAY BE PROPRIETARY TO LAIRD CONNECTIVITY, LLC. AND/OR ANOTHER PARTY, AND MAY FURTHER BE INTENDED TO BE KEPT CONFIDENTIAL. IF YOU ARE NOT THE INTENDED RECIPIENT, PLEASE DELETE THE EMAIL AND ANY ATTACHMENTS, AND IMMEDIATELY NOTIFY THE SENDER BY RETURN EMAIL. THIS MESSAGE AND ITS CONTENTS ARE THE PROPERTY OF LAIRD CONNECTIVITY, LLC. AND MAY NOT BE REPRODUCED OR USED WITHOUT THE EXPRESS WRITTEN CONSENT OF LAIRD CONNECTIVITY, LLC.

3 years, 11 months

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TF-M Open CI Back to Normal

by Xinyu Zhang

Hi all, TF-M CI is back to normal. Please feel free to use it. 😊 BR, Xinyu From: Xinyu Zhang Sent: Monday, January 10, 2022 11:07 AM To: TF-M mailing list <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: TF-M Open CI Fails to Run Tests Hi all, Sorry to inform you that TF-M Open CI is down for the time being – tests cannot be run. I’ll let you know as long as CI is back to normal. Apologize for any inconvenience! Thanks, Xinyu

3 years, 11 months

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TF-M Open CI Fails to Run Tests

by Xinyu Zhang

Hi all, Sorry to inform you that TF-M Open CI is down for the time being - tests cannot be run. I'll let you know as long as CI is back to normal. Apologize for any inconvenience! Thanks, Xinyu

3 years, 11 months

1
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Mailbox mechanism changed into partition

by Ken Liu

Hi, Thank Chris made a couple of changes to move the mailbox mechanism from a kernel-coupled one into a partition-based one, which simplifies the programming model much. And mailbox-related platforms (musca-b1 secure enclave and corstone 1000) may get affected after merged, please mentioned platform owners take a try on these patches. Another solution is we can merge them and then fix the problems found. Will wait for one more week for the last patch (Patches no affecting platforms out of PSoC are merged already). I think checkout this one should bring all related changes into local: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12311 Feel free to comment, thanks. /Ken

3 years, 11 months

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Technical Forum call - Jan 6

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Jan 6, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

3 years, 11 months

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PSA headers difference

by Bohdan.Hunko＠infineon.com

Hi everyone, While taking a look into PSA header files from interface/include/psa/ folder I have found out that they are actually slightly different from PSA headers in build_folder/lib/ext/mbedcrypto-src/include/psa/ folder. Here is list of files that are different: * crypto.h * crypto_compat.h * crypto_extra.h * crypto_sizes.h * crypto_struct.h * crypto_types.h * crypto_values.h My expectation was that PSA interface (header files) should be the same in both folders. Maybe we should use only one version of those files (remove files from interface/include/psa/ and just use files from build_folder/lib/ext/mbedcrypto-src/include/psa/)? Regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

3 years, 11 months

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Some broken builds

by Thomas Törnblom

Back after the holidays I have tested a few builds and I've noticed that a few builds fail a bunch of tests. Fails on all tool chains. Is this a known issue? psoc64, musca_s1 works. Musca_B1 (nxp lpcxpresso55s69 also fails: PS D:\Projects\tf-m6\trusted-firmware-m\armclang> cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_b1/sse_200 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DBL2=ON ... Running Test Suite PSA internal trusted storage S interface tests (TFM_S_ITS_TEST_1XXX)... > Executing 'TFM_S_ITS_TEST_1001' Description: 'Set interface' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:32) TEST: TFM_S_ITS_TEST_1001 - FAILED! > Executing 'TFM_S_ITS_TEST_1002' Description: 'Set interface with create flags' Set should not fail with no flags (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:91) TEST: TFM_S_ITS_TEST_1002 - FAILED! > Executing 'TFM_S_ITS_TEST_1003' Description: 'Set interface with NULL data pointer' Set should succeed with NULL data pointer and zero length (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:115) TEST: TFM_S_ITS_TEST_1003 - FAILED! > Executing 'TFM_S_ITS_TEST_1004' Description: 'Set interface with write once UID' Set should not rewrite a write once UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:138) TEST: TFM_S_ITS_TEST_1004 - FAILED! > Executing 'TFM_S_ITS_TEST_1005' Description: 'Get interface with valid data' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:186) TEST: TFM_S_ITS_TEST_1005 - FAILED! > Executing 'TFM_S_ITS_TEST_1006' Description: 'Get interface with zero data length' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:293) TEST: TFM_S_ITS_TEST_1006 - FAILED! ... (lots more failed tests) ... *** Non-secure test suites summary *** Test suite 'PSA protected storage NS interface tests (TFM_NS_PS_TEST_1XXX)' has PASSED Test suite 'PSA internal trusted storage NS interface tests (TFM_NS_ITS_TEST_1XXX)' has FAILED Test suite 'Crypto non-secure interface test (TFM_NS_CRYPTO_TEST_1XXX)' has FAILED Test suite 'Platform Service Non-Secure interface tests(TFM_NS_PLATFORM_TEST_1XXX)' has PASSED Test suite 'Initial Attestation Service non-secure interface tests(TFM_NS_ATTEST_TEST_1XXX)' has PASSED Test suite 'QCBOR regression test(TFM_NS_QCBOR_TEST_1XXX)' has PASSED Test suite 'T_COSE regression test(TFM_NS_T_COSE_TEST_1XXX)' has PASSED Test suite 'PSA firmware update NS interface tests (TFM_NS_FWU_TEST_1xxx)' has PASSED Test suite 'Core non-secure positive tests (TFM_NS_CORE_TEST_1XXX)' has PASSED Test suite 'IPC non-secure interface test (TFM_NS_IPC_TEST_1XXX)' has PASSED Test suite 'TFM IRQ Test (TFM_IRQ_TEST_1xxx)' has PASSED *** End of Non-secure test suites *** -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 11 months

2
6
0 0

Some broken builds

by Thomas Törnblom

Back after the holidays I have tested a few builds and I've noticed that a few builds fail a bunch of tests. Fails on all tool chains. Is this a known issue? psoc64, musca_s1 works. Musca_B1 (nxp lpcxpresso55s69 also fails: PS D:\Projects\tf-m6\trusted-firmware-m\armclang> cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_b1/sse_200 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=RelWithDebInfo -DBL2=ON Musca B eflash Firmware Version 3.4 [INF] Starting bootloader [WRN] This device was provisioned with dummy keys. This device is NOT SECURE [INF] Swap type: none [INF] Swap type: none CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 [INF] Bootloader chainload address offset: 0x20000 [INF] Jumping to the first image slot [WRN] This device was provisioned with dummy keys. This device is NOT SECURE [Sec Thread] Secure image initializing! TF-M FP mode: Software Booting TFM v1.5.0 #### Execute test suites for the Secure area #### Running Test Suite PSA protected storage S interface tests (TFM_S_PS_TEST_1XXX)... > Executing 'TFM_S_PS_TEST_1001' Description: 'Set interface' TEST: TFM_S_PS_TEST_1001 - PASSED! > Executing 'TFM_S_PS_TEST_1002' Description: 'Set interface with create flags' TEST: TFM_S_PS_TEST_1002 - PASSED! > Executing 'TFM_S_PS_TEST_1003' Description: 'Set interface with NULL data pointer' TEST: TFM_S_PS_TEST_1003 - PASSED! > Executing 'TFM_S_PS_TEST_1004' Description: 'Set interface with invalid data length' TEST: TFM_S_PS_TEST_1004 - PASSED! > Executing 'TFM_S_PS_TEST_1005' Description: 'Set interface with write once UID' TEST: TFM_S_PS_TEST_1005 - PASSED! > Executing 'TFM_S_PS_TEST_1006' Description: 'Get interface with valid data' TEST: TFM_S_PS_TEST_1006 - PASSED! > Executing 'TFM_S_PS_TEST_1007' Description: 'Get interface with zero data length' TEST: TFM_S_PS_TEST_1007 - PASSED! > Executing 'TFM_S_PS_TEST_1008' Description: 'Get interface with invalid UIDs' TEST: TFM_S_PS_TEST_1008 - PASSED! > Executing 'TFM_S_PS_TEST_1009' Description: 'Get interface with invalid data lengths and offsets' TEST: TFM_S_PS_TEST_1009 - PASSED! > Executing 'TFM_S_PS_TEST_1010' Description: 'Get interface with NULL data pointer' TEST: TFM_S_PS_TEST_1010 - PASSED! > Executing 'TFM_S_PS_TEST_1011' Description: 'Get info interface with write once UID' TEST: TFM_S_PS_TEST_1011 - PASSED! > Executing 'TFM_S_PS_TEST_1012' Description: 'Get info interface with valid UID' TEST: TFM_S_PS_TEST_1012 - PASSED! > Executing 'TFM_S_PS_TEST_1013' Description: 'Get info interface with invalid UIDs' TEST: TFM_S_PS_TEST_1013 - PASSED! > Executing 'TFM_S_PS_TEST_1014' Description: 'Get info interface with NULL info pointer' TEST: TFM_S_PS_TEST_1014 - PASSED! > Executing 'TFM_S_PS_TEST_1015' Description: 'Remove interface with valid UID' TEST: TFM_S_PS_TEST_1015 - PASSED! > Executing 'TFM_S_PS_TEST_1016' Description: 'Remove interface with write once UID' TEST: TFM_S_PS_TEST_1016 - PASSED! > Executing 'TFM_S_PS_TEST_1017' Description: 'Remove interface with invalid UID' TEST: TFM_S_PS_TEST_1017 - PASSED! > Executing 'TFM_S_PS_TEST_1018' Description: 'Block compaction after remove' TEST: TFM_S_PS_TEST_1018 - PASSED! > Executing 'TFM_S_PS_TEST_1019' Description: 'Multiple partial gets' TEST: TFM_S_PS_TEST_1019 - PASSED! > Executing 'TFM_S_PS_TEST_1020' Description: 'Multiple sets to same UID from same thread' TEST: TFM_S_PS_TEST_1020 - PASSED! > Executing 'TFM_S_PS_TEST_1021' Description: 'Get support interface' TEST: TFM_S_PS_TEST_1021 - PASSED! > Executing 'TFM_S_PS_TEST_1022' Description: 'Set, get and remove interface with different asset sizes' TEST: TFM_S_PS_TEST_1022 - PASSED! TESTSUITE PASSED! Running Test Suite PS reliability tests (TFM_PS_TEST_3XXX)... > Executing 'TFM_S_PS_TEST_2001' Description: 'repetitive sets and gets in/from an asset' > Iteration 15 of 15 TEST: TFM_S_PS_TEST_2001 - PASSED! > Executing 'TFM_S_PS_TEST_2002' Description: 'repetitive sets, gets and removes' > Iteration 15 of 15 TEST: TFM_S_PS_TEST_2002 - PASSED! TESTSUITE PASSED! Running Test Suite PS rollback protection tests (TFM_S_PS_TEST_3XXX)... > Executing 'TFM_S_PS_TEST_3001' Description: 'Check PS area version when NV counters 1/2/3 have the same value' TEST: TFM_S_PS_TEST_3001 - PASSED! > Executing 'TFM_S_PS_TEST_3002' Description: 'Check PS area version when it is different from NV counters 1/2/3' TEST: TFM_S_PS_TEST_3002 - PASSED! > Executing 'TFM_S_PS_TEST_3003' Description: 'Check PS area version when NV counters 1 and 2 are equals, 3 is different, and PS area version match NV counters 1 and 2' TEST: TFM_S_PS_TEST_3003 - PASSED! > Executing 'TFM_S_PS_TEST_3004' Description: 'Check PS area version when NV counters 2 and 3 are equals, 1 is different and PS area version match NV counter 2 and 3' TEST: TFM_S_PS_TEST_3004 - PASSED! > Executing 'TFM_S_PS_TEST_3005' Description: 'Check PS area version when NV counters 2 and 3 are equals, 1 is different and PS area version match NV counter 1' TEST: TFM_S_PS_TEST_3005 - PASSED! > Executing 'TFM_S_PS_TEST_3006' Description: 'Check PS area version when NV counters 1, 2 and 3 have different values and PS area version match NV counter 1 value' TEST: TFM_S_PS_TEST_3006 - PASSED! > Executing 'TFM_S_PS_TEST_3007' Description: 'Check PS area version when NV counters 1, 2 and 3 have different values and PS area version match NV counter 2 value' TEST: TFM_S_PS_TEST_3007 - PASSED! > Executing 'TFM_S_PS_TEST_3008' Description: 'Check PS area version when NV counters 1, 2 and 3 have different values and PS area version match NV counter 3 value' TEST: TFM_S_PS_TEST_3008 - PASSED! > Executing 'TFM_S_PS_TEST_3009' Description: 'Check PS area version when NV counter 1 cannot be incremented' TEST: TFM_S_PS_TEST_3009 - PASSED! TESTSUITE PASSED! Running Test Suite PSA internal trusted storage S interface tests (TFM_S_ITS_TEST_1XXX)... > Executing 'TFM_S_ITS_TEST_1001' Description: 'Set interface' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:32) TEST: TFM_S_ITS_TEST_1001 - FAILED! > Executing 'TFM_S_ITS_TEST_1002' Description: 'Set interface with create flags' Set should not fail with no flags (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:91) TEST: TFM_S_ITS_TEST_1002 - FAILED! > Executing 'TFM_S_ITS_TEST_1003' Description: 'Set interface with NULL data pointer' Set should succeed with NULL data pointer and zero length (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:115) TEST: TFM_S_ITS_TEST_1003 - FAILED! > Executing 'TFM_S_ITS_TEST_1004' Description: 'Set interface with write once UID' Set should not rewrite a write once UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:138) TEST: TFM_S_ITS_TEST_1004 - FAILED! > Executing 'TFM_S_ITS_TEST_1005' Description: 'Get interface with valid data' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:186) TEST: TFM_S_ITS_TEST_1005 - FAILED! > Executing 'TFM_S_ITS_TEST_1006' Description: 'Get interface with zero data length' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:293) TEST: TFM_S_ITS_TEST_1006 - FAILED! > Executing 'TFM_S_ITS_TEST_1007' Description: 'Get interface with invalid UIDs' TEST: TFM_S_ITS_TEST_1007 - PASSED! > Executing 'TFM_S_ITS_TEST_1008' Description: 'Get interface with data lengths and offsets greater than UID length' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:426) TEST: TFM_S_ITS_TEST_1008 - FAILED! > Executing 'TFM_S_ITS_TEST_1009' Description: 'Get interface with NULL data pointer' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:541) TEST: TFM_S_ITS_TEST_1009 - FAILED! > Executing 'TFM_S_ITS_TEST_1010' Description: 'Get info interface with write once UID' Get info should not fail for write once UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:578) TEST: TFM_S_ITS_TEST_1010 - FAILED! > Executing 'TFM_S_ITS_TEST_1011' Description: 'Get info interface with valid UID' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:612) TEST: TFM_S_ITS_TEST_1011 - FAILED! > Executing 'TFM_S_ITS_TEST_1012' Description: 'Get info interface with invalid UIDs' TEST: TFM_S_ITS_TEST_1012 - PASSED! > Executing 'TFM_S_ITS_TEST_1013' Description: 'Remove interface with valid UID' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:708) TEST: TFM_S_ITS_TEST_1013 - FAILED! > Executing 'TFM_S_ITS_TEST_1014' Description: 'Remove interface with write once UID' Remove should not succeed with write once UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:751) TEST: TFM_S_ITS_TEST_1014 - FAILED! > Executing 'TFM_S_ITS_TEST_1015' Description: 'Remove interface with invalid UID' TEST: TFM_S_ITS_TEST_1015 - PASSED! > Executing 'TFM_S_ITS_TEST_1016' Description: 'Block compaction after remove' Set should not fail for UID 1 (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:790) TEST: TFM_S_ITS_TEST_1016 - FAILED! > Executing 'TFM_S_ITS_TEST_1017' Description: 'Multiple partial gets' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:860) TEST: TFM_S_ITS_TEST_1017 - FAILED! > Executing 'TFM_S_ITS_TEST_1018' Description: 'Multiple sets to same UID from same thread' First set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:911) TEST: TFM_S_ITS_TEST_1018 - FAILED! > Executing 'TFM_S_ITS_TEST_1019' Description: 'Set, get and remove interface with different asset sizes' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:995) TEST: TFM_S_ITS_TEST_1019 - FAILED! > Executing 'TFM_S_ITS_TEST_1020' Description: 'Set interface with invalid data length' TEST: TFM_S_ITS_TEST_1020 - PASSED! > Executing 'TFM_S_ITS_TEST_1021' Description: 'Get interface with invalid data lengths and offsets' TEST: TFM_S_ITS_TEST_1021 - PASSED! > Executing 'TFM_S_ITS_TEST_1022' Description: 'Get info interface with NULL info pointer' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/secure/psa_its_s_interface_testsuite.c:210) TEST: TFM_S_ITS_TEST_1022 - FAILED! > Executing 'TFM_S_ITS_TEST_1023' Description: 'Attempt to get a UID set by a different partition' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/secure/psa_its_s_interface_testsuite.c:253) TEST: TFM_S_ITS_TEST_1023 - FAILED! TESTSUITE FAILED! Number of failed tests: 18 of 23 Running Test Suite ITS reliability tests (TFM_ITS_TEST_2XXX)... > Executing 'TFM_S_ITS_TEST_2001' Description: 'repetitive sets and gets in/from an asset' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/secure/psa_its_s_reliability_testsuite.c:75) TEST: TFM_S_ITS_TEST_2001 - FAILED! > Executing 'TFM_S_ITS_TEST_2002' Description: 'repetitive sets, gets and removes' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/secure/psa_its_s_reliability_testsuite.c:133) TEST: TFM_S_ITS_TEST_2002 - FAILED! TESTSUITE FAILED! Number of failed tests: 2 of 2 Running Test Suite Crypto secure interface tests (TFM_S_CRYPTO_TEST_1XXX)... > Executing 'TFM_S_CRYPTO_TEST_1001' Description: 'Secure Key management interface' TEST: TFM_S_CRYPTO_TEST_1001 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1002' Description: 'Secure Symmetric encryption (AES-128-CBC) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_S_CRYPTO_TEST_1002 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1005' Description: 'Secure Symmetric encryption (AES-128-CTR) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_S_CRYPTO_TEST_1005 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1007' Description: 'Secure Symmetric encryption invalid cipher' TEST: TFM_S_CRYPTO_TEST_1007 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1008' Description: 'Secure Symmetric encryption invalid cipher (AES-152)' TEST: TFM_S_CRYPTO_TEST_1008 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1010' Description: 'Secure Unsupported Hash (SHA-1) interface' TEST: TFM_S_CRYPTO_TEST_1010 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1011' Description: 'Secure Hash (SHA-224) interface' TEST: TFM_S_CRYPTO_TEST_1011 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1012' Description: 'Secure Hash (SHA-256) interface' TEST: TFM_S_CRYPTO_TEST_1012 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1013' Description: 'Secure Hash (SHA-384) interface' TEST: TFM_S_CRYPTO_TEST_1013 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1014' Description: 'Secure Hash (SHA-512) interface' TEST: TFM_S_CRYPTO_TEST_1014 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1019' Description: 'Secure Unsupported HMAC (SHA-1) interface' TEST: TFM_S_CRYPTO_TEST_1019 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1020' Description: 'Secure HMAC (SHA-256) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_S_CRYPTO_TEST_1020 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1021' Description: 'Secure HMAC (SHA-384) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_S_CRYPTO_TEST_1021 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1022' Description: 'Secure HMAC (SHA-512) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_S_CRYPTO_TEST_1022 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1024' Description: 'Secure HMAC with long key (SHA-224) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_S_CRYPTO_TEST_1024 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1030' Description: 'Secure AEAD (AES-128-CCM) interface' Algorithm NOT SUPPORTED by the implementation - skip multipart API flow TEST: TFM_S_CRYPTO_TEST_1030 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1031' Description: 'Secure AEAD (AES-128-GCM) interface' Algorithm NOT SUPPORTED by the implementation - skip multipart API flow TEST: TFM_S_CRYPTO_TEST_1031 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1032' Description: 'Secure key policy interface' TEST: TFM_S_CRYPTO_TEST_1032 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1033' Description: 'Secure key policy check permissions' TEST: TFM_S_CRYPTO_TEST_1033 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1034' Description: 'Secure persistent key interface' Failed to import a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:1292) TEST: TFM_S_CRYPTO_TEST_1034 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1035' Description: 'Key access control' TEST: TFM_S_CRYPTO_TEST_1035 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1036' Description: 'Secure AEAD interface with truncated auth tag (AES-128-CCM-8)' Algorithm NOT SUPPORTED by the implementation - skip multipart API flow TEST: TFM_S_CRYPTO_TEST_1036 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1037' Description: 'Secure TLS 1.2 PRF key derivation' TEST: TFM_S_CRYPTO_TEST_1037 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1038' Description: 'Secure TLS-1.2 PSK-to-MasterSecret key derivation' TEST: TFM_S_CRYPTO_TEST_1038 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1039' Description: 'Secure HKDF key derivation' TEST: TFM_S_CRYPTO_TEST_1039 - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1040' Description: 'Secure ECDH key agreement' Error importing the private key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:1390) TEST: TFM_S_CRYPTO_TEST_1040 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1041' Description: 'Secure Symmetric encryption (AES-128-OFB) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_S_CRYPTO_TEST_1041 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1042' Description: 'Secure Symmetric encryption (AES-128-ECB) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_S_CRYPTO_TEST_1042 - FAILED! > Executing 'TFM_S_CRYPTO_TEST_1043)' Description: 'Secure Asymmetric encryption interface (RSA_OAEP)' CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 TEST: TFM_S_CRYPTO_TEST_1043) - PASSED! > Executing 'TFM_S_CRYPTO_TEST_1044' Description: 'Secure Asymmetric encryption interface (RSA_PKCS1V15)' CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 TEST: TFM_S_CRYPTO_TEST_1044 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1045' Description: 'Secure Sign and verify message interface (ECDSA-SECP256R1-SHA256)' Error importing the private key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:1726) TEST: TFM_NS_CRYPTO_TEST_1045 - FAILED! TESTSUITE FAILED! Number of failed tests: 11 of 31 Running Test Suite Initial Attestation Service secure interface tests(TFM_S_ATTEST_TEST_1XXX)... > Executing 'TFM_S_ATTEST_TEST_1004' Description: 'ECDSA signature test of attest token' TEST: TFM_S_ATTEST_TEST_1004 - PASSED! > Executing 'TFM_S_ATTEST_TEST_1005' Description: 'Negative test cases for initial attestation service' TEST: TFM_S_ATTEST_TEST_1005 - PASSED! TESTSUITE PASSED! Running Test Suite Platform Service Secure interface tests(TFM_S_PLATFORM_TEST_1XXX)... > Executing 'TFM_S_PLATFORM_TEST_1001' Description: 'Minimal platform service test' TEST: TFM_S_PLATFORM_TEST_1001 - PASSED! TESTSUITE PASSED! Running Test Suite IPC secure interface test (TFM_S_IPC_TEST_1XXX)... > Executing 'TFM_S_IPC_TEST_1001' Description: 'Accessing stateless service from secure partition' [IPC_SERVICE_TEST_STATELESS_ROT] Service called! arg=ffffabcd TEST: TFM_S_IPC_TEST_1001 - PASSED! TESTSUITE PASSED! *** Secure test suites summary *** Test suite 'PSA protected storage S interface tests (TFM_S_PS_TEST_1XXX)' has PASSED Test suite 'PS reliability tests (TFM_PS_TEST_3XXX)' has PASSED Test suite 'PS rollback protection tests (TFM_S_PS_TEST_3XXX)' has PASSED Test suite 'PSA internal trusted storage S interface tests (TFM_S_ITS_TEST_1XXX)' has FAILED Test suite 'ITS reliability tests (TFM_ITS_TEST_2XXX)' has FAILED Test suite 'Crypto secure interface tests (TFM_S_CRYPTO_TEST_1XXX)' has FAILED Test suite 'Initial Attestation Service secure interface tests(TFM_S_ATTEST_TEST_1XXX)' has PASSED Test suite 'Platform Service Secure interface tests(TFM_S_PLATFORM_TEST_1XXX)' has PASSED Test suite 'IPC secure interface test (TFM_S_IPC_TEST_1XXX)' has PASSED *** End of Secure test suites *** Non-Secure system starting... #### Execute test suites for the Non-secure area #### Running Test Suite PSA protected storage NS interface tests (TFM_NS_PS_TEST_1XXX)... > Executing 'TFM_NS_PS_TEST_1001' Description: 'Set interface' TEST: TFM_NS_PS_TEST_1001 - PASSED! > Executing 'TFM_NS_PS_TEST_1002' Description: 'Set interface with create flags' TEST: TFM_NS_PS_TEST_1002 - PASSED! > Executing 'TFM_NS_PS_TEST_1003' Description: 'Set interface with NULL data pointer' TEST: TFM_NS_PS_TEST_1003 - PASSED! > Executing 'TFM_NS_PS_TEST_1004' Description: 'Set interface with write once UID' TEST: TFM_NS_PS_TEST_1004 - PASSED! > Executing 'TFM_NS_PS_TEST_1005' Description: 'Get interface with valid data' TEST: TFM_NS_PS_TEST_1005 - PASSED! > Executing 'TFM_NS_PS_TEST_1006' Description: 'Get interface with zero data length' TEST: TFM_NS_PS_TEST_1006 - PASSED! > Executing 'TFM_NS_PS_TEST_1007' Description: 'Get interface with invalid UIDs' TEST: TFM_NS_PS_TEST_1007 - PASSED! > Executing 'TFM_NS_PS_TEST_1008' Description: 'Get interface with invalid data lengths and offsets' TEST: TFM_NS_PS_TEST_1008 - PASSED! > Executing 'TFM_NS_PS_TEST_1009' Description: 'Get interface with NULL data pointer' TEST: TFM_NS_PS_TEST_1009 - PASSED! > Executing 'TFM_NS_PS_TEST_1010' Description: 'Get info interface with write once UID' TEST: TFM_NS_PS_TEST_1010 - PASSED! > Executing 'TFM_NS_PS_TEST_1011' Description: 'Get info interface with valid UID' TEST: TFM_NS_PS_TEST_1011 - PASSED! > Executing 'TFM_NS_PS_TEST_1012' Description: 'Get info interface with invalid UIDs' TEST: TFM_NS_PS_TEST_1012 - PASSED! > Executing 'TFM_NS_PS_TEST_1013' Description: 'Remove interface with valid UID' TEST: TFM_NS_PS_TEST_1013 - PASSED! > Executing 'TFM_NS_PS_TEST_1014' Description: 'Remove interface with write once UID' TEST: TFM_NS_PS_TEST_1014 - PASSED! > Executing 'TFM_NS_PS_TEST_1015' Description: 'Remove interface with invalid UID' TEST: TFM_NS_PS_TEST_1015 - PASSED! > Executing 'TFM_NS_PS_TEST_1021' Description: 'Block compaction after remove' TEST: TFM_NS_PS_TEST_1021 - PASSED! > Executing 'TFM_NS_PS_TEST_1022' Description: 'Multiple partial gets' TEST: TFM_NS_PS_TEST_1022 - PASSED! > Executing 'TFM_NS_PS_TEST_1023' Description: 'Multiple sets to same UID from same thread' TEST: TFM_NS_PS_TEST_1023 - PASSED! > Executing 'TFM_NS_PS_TEST_1024' Description: 'Get support interface' TEST: TFM_NS_PS_TEST_1024 - PASSED! > Executing 'TFM_NS_PS_TEST_1025' Description: 'Set, get and remove interface with different asset sizes' TEST: TFM_NS_PS_TEST_1025 - PASSED! TESTSUITE PASSED! Running Test Suite PSA internal trusted storage NS interface tests (TFM_NS_ITS_TEST_1XXX)... > Executing 'TFM_NS_ITS_TEST_1001' Description: 'Set interface' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:32) TEST: TFM_NS_ITS_TEST_1001 - FAILED! > Executing 'TFM_NS_ITS_TEST_1002' Description: 'Set interface with create flags' Note: The UID in this test has already been created with the PSA_STORAGE_FLAG_WRITE_ONCE flag in a previous test run. Wipe the storage area to run the full test. TEST: TFM_NS_ITS_TEST_1002 - PASSED! > Executing 'TFM_NS_ITS_TEST_1003' Description: 'Set interface with NULL data pointer' Set should succeed with NULL data pointer and zero length (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:115) TEST: TFM_NS_ITS_TEST_1003 - FAILED! > Executing 'TFM_NS_ITS_TEST_1004' Description: 'Set interface with write once UID' Get should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:146) TEST: TFM_NS_ITS_TEST_1004 - FAILED! > Executing 'TFM_NS_ITS_TEST_1005' Description: 'Get interface with valid data' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:186) TEST: TFM_NS_ITS_TEST_1005 - FAILED! > Executing 'TFM_NS_ITS_TEST_1006' Description: 'Get interface with zero data length' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:293) TEST: TFM_NS_ITS_TEST_1006 - FAILED! > Executing 'TFM_NS_ITS_TEST_1007' Description: 'Get interface with invalid UIDs' TEST: TFM_NS_ITS_TEST_1007 - PASSED! > Executing 'TFM_NS_ITS_TEST_1008' Description: 'Get interface with invalid data lengths and offsets' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:426) TEST: TFM_NS_ITS_TEST_1008 - FAILED! > Executing 'TFM_NS_ITS_TEST_1009' Description: 'Get interface with NULL data pointer' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:541) TEST: TFM_NS_ITS_TEST_1009 - FAILED! > Executing 'TFM_NS_ITS_TEST_1010' Description: 'Get info interface with write once UID' TEST: TFM_NS_ITS_TEST_1010 - PASSED! > Executing 'TFM_NS_ITS_TEST_1011' Description: 'Get info interface with valid UID' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:612) TEST: TFM_NS_ITS_TEST_1011 - FAILED! > Executing 'TFM_NS_ITS_TEST_1012' Description: 'Get info interface with invalid UIDs' TEST: TFM_NS_ITS_TEST_1012 - PASSED! > Executing 'TFM_NS_ITS_TEST_1013' Description: 'Remove interface with valid UID' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:708) TEST: TFM_NS_ITS_TEST_1013 - FAILED! > Executing 'TFM_NS_ITS_TEST_1014' Description: 'Remove interface with write once UID' TEST: TFM_NS_ITS_TEST_1014 - PASSED! > Executing 'TFM_NS_ITS_TEST_1015' Description: 'Remove interface with invalid UID' TEST: TFM_NS_ITS_TEST_1015 - PASSED! > Executing 'TFM_NS_ITS_TEST_1016' Description: 'Block compaction after remove' Set should not fail for UID 1 (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:790) TEST: TFM_NS_ITS_TEST_1016 - FAILED! > Executing 'TFM_NS_ITS_TEST_1017' Description: 'Multiple partial gets' Set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:860) TEST: TFM_NS_ITS_TEST_1017 - FAILED! > Executing 'TFM_NS_ITS_TEST_1018' Description: 'Multiple sets to same UID from same thread' First set should not fail (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:911) TEST: TFM_NS_ITS_TEST_1018 - FAILED! > Executing 'TFM_NS_ITS_TEST_1019' Description: 'Set, get and remove interface with different asset sizes' Set should not fail with valid UID (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/its/its_tests_common.c:995) TEST: TFM_NS_ITS_TEST_1019 - FAILED! TESTSUITE FAILED! Number of failed tests: 13 of 19 Running Test Suite Crypto non-secure interface test (TFM_NS_CRYPTO_TEST_1XXX)... > Executing 'TFM_NS_CRYPTO_TEST_1001' Description: 'Non Secure Key management interface' TEST: TFM_NS_CRYPTO_TEST_1001 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1002' Description: 'Non Secure Symmetric encryption (AES-128-CBC) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_NS_CRYPTO_TEST_1002 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1005' Description: 'Non Secure Symmetric encryption (AES-128-CTR) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_NS_CRYPTO_TEST_1005 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1007' Description: 'Non Secure Symmetric encryption invalid cipher' TEST: TFM_NS_CRYPTO_TEST_1007 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1008' Description: 'Non Secure Symmetric encryption invalid cipher (AES-152)' TEST: TFM_NS_CRYPTO_TEST_1008 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1010' Description: 'Non Secure Unsupported Hash (SHA-1) interface' TEST: TFM_NS_CRYPTO_TEST_1010 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1011' Description: 'Non Secure Hash (SHA-224) interface' TEST: TFM_NS_CRYPTO_TEST_1011 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1012' Description: 'Non Secure Hash (SHA-256) interface' TEST: TFM_NS_CRYPTO_TEST_1012 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1013' Description: 'Non Secure Hash (SHA-384) interface' TEST: TFM_NS_CRYPTO_TEST_1013 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1014' Description: 'Non Secure Hash (SHA-512) interface' TEST: TFM_NS_CRYPTO_TEST_1014 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1019' Description: 'Non Secure Unsupported HMAC (SHA-1) interface' TEST: TFM_NS_CRYPTO_TEST_1019 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1020' Description: 'Non Secure HMAC (SHA-256) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_NS_CRYPTO_TEST_1020 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1021' Description: 'Non Secure HMAC (SHA-384) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_NS_CRYPTO_TEST_1021 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1022' Description: 'Non Secure HMAC (SHA-512) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_NS_CRYPTO_TEST_1022 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1024' Description: 'Non Secure HMAC with long key (SHA-224) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:634) TEST: TFM_NS_CRYPTO_TEST_1024 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1030' Description: 'Non Secure AEAD (AES-128-CCM) interface' Algorithm NOT SUPPORTED by the implementation - skip multipart API flow TEST: TFM_NS_CRYPTO_TEST_1030 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1031' Description: 'Non Secure AEAD (AES-128-GCM) interface' Algorithm NOT SUPPORTED by the implementation - skip multipart API flow TEST: TFM_NS_CRYPTO_TEST_1031 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1032' Description: 'Non Secure key policy interface' TEST: TFM_NS_CRYPTO_TEST_1032 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1033' Description: 'Non Secure key policy check permissions' TEST: TFM_NS_CRYPTO_TEST_1033 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1034' Description: 'Non Secure persistent key interface' Failed to import a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:1292) TEST: TFM_NS_CRYPTO_TEST_1034 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1035' Description: 'Non Secure AEAD interface with truncated auth tag (AES-128-CCM-8)' Algorithm NOT SUPPORTED by the implementation - skip multipart API flow TEST: TFM_NS_CRYPTO_TEST_1035 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1036' Description: 'Non Secure TLS 1.2 PRF key derivation' TEST: TFM_NS_CRYPTO_TEST_1036 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1037' Description: 'Non Secure TLS-1.2 PSK-to-MasterSecret key derivation' TEST: TFM_NS_CRYPTO_TEST_1037 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1038' Description: 'Non Secure HKDF key derivation' TEST: TFM_NS_CRYPTO_TEST_1038 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1039' Description: 'Non Secure ECDH key agreement' Error importing the private key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:1390) TEST: TFM_NS_CRYPTO_TEST_1039 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1040' Description: 'Non Secure Symmetric encryption (AES-128-OFB) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_NS_CRYPTO_TEST_1040 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1041' Description: 'Non Secure Symmetric encryption (AES-128-ECB) interface' Error importing a key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:140) TEST: TFM_NS_CRYPTO_TEST_1041 - FAILED! > Executing 'TFM_NS_CRYPTO_TEST_1042' Description: 'Non Secure Asymmetric encryption interface (RSA_OAEP)' CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 TEST: TFM_NS_CRYPTO_TEST_1042 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1043' Description: 'Non Secure Asymmetric encryption interface (RSA_PKCS1V15)' CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 CC:error_mapping_cc_to_mbedtls_rsa: Converted CC_ERROR 0 (0x00000000) to MBEDTLS_ERR 0 TEST: TFM_NS_CRYPTO_TEST_1043 - PASSED! > Executing 'TFM_NS_CRYPTO_TEST_1044' Description: 'Non Secure Sign and verify message interface (ECDSA-SECP256R1-SHA256)' Error importing the private key (Failed at D:/Projects/tf-m6/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/suites/crypto/crypto_tests_common.c:1726) TEST: TFM_NS_CRYPTO_TEST_1044 - FAILED! TESTSUITE FAILED! Number of failed tests: 11 of 30 Running Test Suite Platform Service Non-Secure interface tests(TFM_NS_PLATFORM_TEST_1XXX)... > Executing 'TFM_NS_PLATFORM_TEST_1001' Description: 'Minimal platform service test' TEST: TFM_NS_PLATFORM_TEST_1001 - PASSED! TESTSUITE PASSED! Running Test Suite Initial Attestation Service non-secure interface tests(TFM_NS_ATTEST_TEST_1XXX)... > Executing 'TFM_NS_ATTEST_TEST_1004' Description: 'ECDSA signature test of attest token' TEST: TFM_NS_ATTEST_TEST_1004 - PASSED! > Executing 'TFM_NS_ATTEST_TEST_1005' Description: 'Negative test cases for initial attestation service' TEST: TFM_NS_ATTEST_TEST_1005 - PASSED! TESTSUITE PASSED! Running Test Suite QCBOR regression test(TFM_NS_QCBOR_TEST_1XXX)... > Executing 'TFM_NS_QCBOR_TEST_1001' Description: 'Regression test of QCBOR library' TEST: TFM_NS_QCBOR_TEST_1001 - PASSED! TESTSUITE PASSED! Running Test Suite T_COSE regression test(TFM_NS_T_COSE_TEST_1XXX)... > Executing 'TFM_NS_T_COSE_TEST_1001' Description: 'Regression test of t_cose library' TEST: TFM_NS_T_COSE_TEST_1001 - PASSED! TESTSUITE PASSED! Running Test Suite PSA firmware update NS interface tests (TFM_NS_FWU_TEST_1xxx)... > Executing 'TFM_NS_FWU_TEST_1001' Description: 'Write, install and abort interface' TEST: TFM_NS_FWU_TEST_1001 - PASSED! > Executing 'TFM_NS_FWU_TEST_1003' Description: 'Write interface with image_offset + block_size overflow' TFM FWU: write flash failed. TEST: TFM_NS_FWU_TEST_1003 - PASSED! > Executing 'TFM_NS_FWU_TEST_1004' Description: 'Install interface with NULL dependency uuid' TEST: TFM_NS_FWU_TEST_1004 - PASSED! > Executing 'TFM_NS_FWU_TEST_1005' Description: 'Install interface with NULL dependency version' TEST: TFM_NS_FWU_TEST_1005 - PASSED! > Executing 'TFM_NS_FWU_TEST_1006' Description: 'Install before write' TEST: TFM_NS_FWU_TEST_1006 - PASSED! > Executing 'TFM_NS_FWU_TEST_1007' Description: 'Install after abort' TEST: TFM_NS_FWU_TEST_1007 - PASSED! > Executing 'TFM_NS_FWU_TEST_1008' Description: 'Abort interface with no image is being installing' TEST: TFM_NS_FWU_TEST_1008 - PASSED! > Executing 'TFM_NS_FWU_TEST_1009' Description: 'Query interface with the active image' TEST: TFM_NS_FWU_TEST_1009 - PASSED! > Executing 'TFM_NS_FWU_TEST_1011' Description: 'Query interface invald image id' TFM FWU: invalid slot_id: 3 TEST: TFM_NS_FWU_TEST_1011 - PASSED! > Executing 'TFM_NS_FWU_TEST_1012' Description: 'Accept interface' TEST: TFM_NS_FWU_TEST_1012 - PASSED! > Executing 'TFM_NS_FWU_TEST_1014' Description: 'Image update with dependency, no new image is required' TEST: TFM_NS_FWU_TEST_1014 - PASSED! > Executing 'TFM_NS_FWU_TEST_1015' Description: 'Image update with dependency, new image is required' TEST: TFM_NS_FWU_TEST_1015 - PASSED! > Executing 'TFM_NS_FWU_TEST_1016' Description: 'psa_fwu_write boundary test' TEST: TFM_NS_FWU_TEST_1016 - PASSED! TESTSUITE PASSED! Running Test Suite Core non-secure positive tests (TFM_NS_CORE_TEST_1XXX)... > Executing 'TFM_NS_CORE_TEST_1001' Description: 'Test service request from NS thread mode' TEST: TFM_NS_CORE_TEST_1001 - PASSED! > Executing 'TFM_NS_CORE_TEST_1003' Description: 'Test the success of service init' TEST: TFM_NS_CORE_TEST_1003 - PASSED! > Executing 'TFM_NS_CORE_TEST_1007' Description: 'Test secure service buffer accesses' TEST: TFM_NS_CORE_TEST_1007 - PASSED! > Executing 'TFM_NS_CORE_TEST_1008' Description: 'Test secure service to service call' TEST: TFM_NS_CORE_TEST_1008 - PASSED! > Executing 'TFM_NS_CORE_TEST_1010' Description: 'Test secure service to service call with buffer handling' TEST: TFM_NS_CORE_TEST_1010 - PASSED! > Executing 'TFM_NS_CORE_TEST_1014' Description: 'Test service parameter sanitization' TEST: TFM_NS_CORE_TEST_1014 - PASSED! > Executing 'TFM_NS_CORE_TEST_1015' Description: 'Test outvec write' TEST: TFM_NS_CORE_TEST_1015 - PASSED! TESTSUITE PASSED! Running Test Suite IPC non-secure interface test (TFM_NS_IPC_TEST_1XXX)... > Executing 'TFM_NS_IPC_TEST_1001' Description: 'Get PSA framework version' The version of the PSA Framework API is 257. TEST: TFM_NS_IPC_TEST_1001 - PASSED! > Executing 'TFM_NS_IPC_TEST_1002' Description: 'Get version of an RoT Service' The service version is 1. TEST: TFM_NS_IPC_TEST_1002 - PASSED! > Executing 'TFM_NS_IPC_TEST_1003' Description: 'Connect to an RoT Service' Connect success! TEST: TFM_NS_IPC_TEST_1003 - PASSED! > Executing 'TFM_NS_IPC_TEST_1004' Description: 'Call an RoT Service' TFM service support version is 1. psa_call is successful! outvec1 is: It is just for IPC call test. outvec2 is: It is just for IPC call test. TEST: TFM_NS_IPC_TEST_1004 - PASSED! > Executing 'TFM_NS_IPC_TEST_1005' Description: 'Call IPC_INIT_BASIC_TEST service' Connect success! Call success! TEST: TFM_NS_IPC_TEST_1005 - PASSED! > Executing 'TFM_NS_IPC_TEST_1006' Description: 'Call PSA RoT access APP RoT memory test service' Connect success! Call success! TEST: TFM_NS_IPC_TEST_1006 - PASSED! > Executing 'TFM_NS_IPC_TEST_1010' Description: 'Test psa_call with the status of PSA_ERROR_PROGRAMMER_ERROR' Connect success! The first time call success! The second time call success! TEST: TFM_NS_IPC_TEST_1010 - PASSED! > Executing 'TFM_NS_IPC_TEST_1012' Description: 'Accessing stateless service from non-secure client' [IPC_SERVICE_TEST_STATELESS_ROT] Service called! arg=ffffabcd TEST: TFM_NS_IPC_TEST_1012 - PASSED! TESTSUITE PASSED! Running Test Suite TFM IRQ Test (TFM_IRQ_TEST_1xxx)... > Executing 'TFM_NS_IRQ_TEST_SLIH_1001' Description: 'SLIH HANDLING Case 1' TEST: TFM_NS_IRQ_TEST_SLIH_1001 - PASSED! TESTSUITE PASSED! *** Non-secure test suites summary *** Test suite 'PSA protected storage NS interface tests (TFM_NS_PS_TEST_1XXX)' has PASSED Test suite 'PSA internal trusted storage NS interface tests (TFM_NS_ITS_TEST_1XXX)' has FAILED Test suite 'Crypto non-secure interface test (TFM_NS_CRYPTO_TEST_1XXX)' has FAILED Test suite 'Platform Service Non-Secure interface tests(TFM_NS_PLATFORM_TEST_1XXX)' has PASSED Test suite 'Initial Attestation Service non-secure interface tests(TFM_NS_ATTEST_TEST_1XXX)' has PASSED Test suite 'QCBOR regression test(TFM_NS_QCBOR_TEST_1XXX)' has PASSED Test suite 'T_COSE regression test(TFM_NS_T_COSE_TEST_1XXX)' has PASSED Test suite 'PSA firmware update NS interface tests (TFM_NS_FWU_TEST_1xxx)' has PASSED Test suite 'Core non-secure positive tests (TFM_NS_CORE_TEST_1XXX)' has PASSED Test suite 'IPC non-secure interface test (TFM_NS_IPC_TEST_1XXX)' has PASSED Test suite 'TFM IRQ Test (TFM_IRQ_TEST_1xxx)' has PASSED *** End of Non-secure test suites *** -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 11 months

1
0
0 0

nucleo_l552ze_q platform does not build since TF-M 1.5

by Michel JAOUEN

Hello, This platform is tested for profile medium and low (-DTFM_PROFILE=profile_small or -DTFM_PROFILE=profile_medium). I just checked on master with medium profile and GNUARM. The default config takes a crypto config with its associated crypto tests that leads to overlap in flash area. (This device has 512Kbytes Flash) Best Regards ST Restricted From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Bøe, Sebastian via TF-M Sent: mercredi 22 décembre 2021 13:40 To: tf-m(a)lists.trustedfirmware.org Subject: [TF-M] nucleo_l552ze_q platform does not build since TF-M 1.5 Hi, I am observing that the nucleo_l552ze_q platform is producing hex files that overlap since the 1.5 release. Tested on master and 1.5. Is there an STM maintainer that could look into this? Steps to reproduce: rm -rf cmake_build && cmake -S . -B cmake_build -DTFM_PLATFORM=stm/nucleo_l552ze_q -DTFM_TOOLCHAIN_FILE=toolchain_GNUARM.cmake -DCMAKE_BUILD_TYPE=MinSizeRel -DTEST_S=ON -DTEST_NS=ON && make -C cmake_build install && /usr/bin/python3.8 /home/sebo/ncs/zephyr/scripts/mergehex.py -o merged.hex $(find cmake_build -name "*.hex") "/usr/bin/python3.8 /home/sebo/ncs/zephyr/scripts/mergehex.py" must be replaced with the preferred hex file merging tool. output: Traceback (most recent call last): File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 28, in merge_hex_files ih.merge(to_merge, overlap=overlap) File "/home/sebo/.local/lib/python3.8/site-packages/intelhex/__init__.py", line 875, in merge raise AddressOverlapError( intelhex.AddressOverlapError: Data overlapped at address 0xC014400 During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 56, in <module> main() File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 52, in main merge_hex_files(args.output, args.input_files, args.overlap) File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 30, in merge_hex_files raise AddressOverlapError("{} has merge issues".format(hex_file_path)) intelhex.AddressOverlapError: cmake_build/install/outputs/STM/NUCLEO_L552ZE_Q/tfm_s.hex has merge issues PS: Depending on the revision tested, it might be necessary to also apply this patch: modified platform/ext/target/stm/common/stm32l5xx/CMakeLists.txt @@ -90,7 +90,7 @@ target_sources(platform_s ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32l5xx_hal_gtzc.c ${CMAKE_SOURCE_DIR}/platform/ext/common/tfm_hal_isolation_mpu_v8m.c ${CMAKE_SOURCE_DIR}/platform/ext/common/tfm_hal_nvic.c - $<$<BOOL:${TFM_PARTITION_PLATFORM}>:${CMAKE_CURRENT_SOURCE_DIR}/secure/tfm_platform_system> + $<$<BOOL:${TFM_PARTITION_PLATFORM}>:${CMAKE_CURRENT_SOURCE_DIR}/secure/tfm_platform_system.c> ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32l5xx_hal_rng.c ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32l5xx_hal_rng_ex.c PUBLIC

3 years, 12 months

2
1
0 0

nucleo_l552ze_q platform does not build since TF-M 1.5

by Bøe, Sebastian

Hi, I am observing that the nucleo_l552ze_q platform is producing hex files that overlap since the 1.5 release. Tested on master and 1.5. Is there an STM maintainer that could look into this? Steps to reproduce: rm -rf cmake_build && cmake -S . -B cmake_build -DTFM_PLATFORM=stm/nucleo_l552ze_q -DTFM_TOOLCHAIN_FILE=toolchain_GNUARM.cmake -DCMAKE_BUILD_TYPE=MinSizeRel -DTEST_S=ON -DTEST_NS=ON && make -C cmake_build install && /usr/bin/python3.8 /home/sebo/ncs/zephyr/scripts/mergehex.py -o merged.hex $(find cmake_build -name "*.hex") "/usr/bin/python3.8 /home/sebo/ncs/zephyr/scripts/mergehex.py" must be replaced with the preferred hex file merging tool. output: Traceback (most recent call last): File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 28, in merge_hex_files ih.merge(to_merge, overlap=overlap) File "/home/sebo/.local/lib/python3.8/site-packages/intelhex/__init__.py", line 875, in merge raise AddressOverlapError( intelhex.AddressOverlapError: Data overlapped at address 0xC014400 During handling of the above exception, another exception occurred: Traceback (most recent call last): File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 56, in <module> main() File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 52, in main merge_hex_files(args.output, args.input_files, args.overlap) File "/home/sebo/ncs/zephyr/scripts/mergehex.py", line 30, in merge_hex_files raise AddressOverlapError("{} has merge issues".format(hex_file_path)) intelhex.AddressOverlapError: cmake_build/install/outputs/STM/NUCLEO_L552ZE_Q/tfm_s.hex has merge issues PS: Depending on the revision tested, it might be necessary to also apply this patch: modified platform/ext/target/stm/common/stm32l5xx/CMakeLists.txt @@ -90,7 +90,7 @@ target_sources(platform_s ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32l5xx_hal_gtzc.c ${CMAKE_SOURCE_DIR}/platform/ext/common/tfm_hal_isolation_mpu_v8m.c ${CMAKE_SOURCE_DIR}/platform/ext/common/tfm_hal_nvic.c - $<$<BOOL:${TFM_PARTITION_PLATFORM}>:${CMAKE_CURRENT_SOURCE_DIR}/secure/tfm_platform_system> + $<$<BOOL:${TFM_PARTITION_PLATFORM}>:${CMAKE_CURRENT_SOURCE_DIR}/secure/tfm_platform_system.c> ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32l5xx_hal_rng.c ${CMAKE_CURRENT_SOURCE_DIR}/hal/Src/stm32l5xx_hal_rng_ex.c PUBLIC

3 years, 12 months

1
0
0 0

Eliminate unnecessary space in tfm_s.bin

by Sherry Zhang

Hi, Currently, in the compiler link script, the CMSE VENEER section is placed at a fixed address which is at the end of tfm code. See code for armclang<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…> and gnu arm<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/e…>. Placing the veneers at the fixed address has the benefit that the when the secure image updates, the veneer symbols remain unchanged. So, the nonsecure image does not have to be updated together. The problem is that the size of tfm_s.bin is always the same in different TF-M build configurations(debug mode, release mode, profile small, profile large and so on). So, there can be large empty space between the end of tfm code and the veneer section. As we discussed on today's tech forum meeting, I propose to move the LR_VENEER from the end of tfm code to right after the secure vector table. In this way, the space between the tfm code and the veneers section is eliminated. Also, the supported number of interrupts for each platform is fixed. So, the size of the vector table is fixed for each platform. So, the start address of veneer section is still fixed for each platform. The size of tfm_s.bin is reduced significantly after this change. Take the AN521 platform for example, the size of tfm_s.bin has a 70 percent reduction. The link script change for armclang<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12620/6/plat…> and gnu arm<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12620/6/plat…> in this patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12620/> can help me demonstrating my proposal. I am not hurry asking for review and merge this patch. As it impacts all the platforms, I want to get confirmed that all platforms which are using the common link script are happy with this proposal. Any comments or especially concerns on this proposal? Thanks, Regards, Sherry Zhang

3 years, 12 months

3
5
0 0

Power management and TFM

by Suresh.Marisetty＠infineon.com

Hi, Wondering if anybody can throw some light on any ongoing efforts on power management on a system with TFM (deep sleep, etc). thanks Suresh Marisetty Infineon Semiconductor Corporation CYSC CSS ICW SW SSE Mobile: +5103863997 Suresh.Marisetty(a)infineon.com<mailto:Suresh.Marisetty@infineon.com>

3 years, 12 months

3
2
0 0

Re: [TF-M] Change in ...trusted-firmware-m[master]: Platform: Refine image flash layout

by Thomas Törnblom

I'm working on the IAR part of this and I'm having a problem with the following test in isolation level 3: --- Running Test Suite TFM IRQ Test (TFM_IRQ_TEST_1xxx)... > Executing 'TFM_NS_IRQ_TEST_SLIH_1001' Description: 'SLIH HANDLING Case 1' --- If I run the test at full speed, it will run into a MemManage fault while if I single step through the entire test it will pass. Is there a race condition somewhere in there? If I disable the SLIH tests it succeeds. The exception happens when dereferencing "dev" in this function: bool timer_cmsdk_is_initialized(const struct timer_cmsdk_dev_t* dev) { return dev->data->is_initialized; } dev is 0x30002440 at the time. I've been trying to figure out what part of the memory protection system it is that is causing the exception. DACCVIOL is set and MMFAR shows the faulting address. Ideas? The build line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_b1/sse_200 "-DTFM_TOOLCHAIN_FILE=..\toolchain_IARARM.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTFM_ISOLATION_LEVEL=3 -DTEST_NS_SLIH_IRQ=ON -DTEST_NS_QCBOR=OFF Notice that this build runs into a linker bug in the IAR toolchain and I have a non-released fixed version I'm using, in case anyone is attempting to replicate the issue. Cheers, Thomas Den 2021-12-17 kl. 11:30, skrev TrustedFirmware Code Review (Code Review): > > Attention is currently required from: Kevin Peng, Ken Liu, David Hu, > Chris Brand, Anton Komlev, Thomas Törnblom. > > "Build Successful > > http://ci.trustedfirmware.org/job/tf-m-static/3226/display/redirect : > SUCCESS" > > Patch set 16:Verified +1 > > View Change > <https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12620> > > To view, visit change 12620 > <https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12620>. > To unsubscribe, or for help writing mail filters, visit settings > <https://review.trustedfirmware.org/settings>. > > Gerrit-Project: TF-M/trusted-firmware-m > Gerrit-Branch: master > Gerrit-Change-Id: I0084aef576d90af45513c7eaae58ba6c6dbbddab > Gerrit-Change-Number: 12620 > Gerrit-PatchSet: 16 > Gerrit-Owner: sherryzhang <sherry.zhang2(a)arm.com> > Gerrit-Reviewer: Anton Komlev <Anton.Komlev(a)arm.com> > Gerrit-Reviewer: David Hu <david.hu(a)arm.com> > Gerrit-Reviewer: Ken Liu <ken.liu(a)arm.com> > Gerrit-Reviewer: Sebastian Bøe <Sebastian.boe(a)nordicsemi.no> > Gerrit-Reviewer: Thomas Törnblom <thomas.tornblom(a)iar.com> > Gerrit-Reviewer: TrustedFirmware Code Review > Gerrit-Reviewer: sherryzhang <sherry.zhang2(a)arm.com> > Gerrit-CC: Andrej Butok <andrey.butok(a)nxp.com> > Gerrit-CC: Chris Brand <chris.brand(a)cypress.com> > Gerrit-CC: Gabor Abonyi <gabor.abonyi(a)arm.com> > Gerrit-CC: Kevin Peng <kevin.peng(a)arm.com> > Gerrit-CC: Michel Jaouen > Gerrit-CC: Márk Horváth <mark.horvath(a)arm.com> > Gerrit-CC: Satish Kumar <satish.kumar01(a)arm.com> > Gerrit-CC: jamie.mccrae(a)lairdconnect.com > Gerrit-Attention: Kevin Peng <kevin.peng(a)arm.com> > Gerrit-Attention: Ken Liu <ken.liu(a)arm.com> > Gerrit-Attention: David Hu <david.hu(a)arm.com> > Gerrit-Attention: Chris Brand <chris.brand(a)cypress.com> > Gerrit-Attention: Anton Komlev <Anton.Komlev(a)arm.com> > Gerrit-Attention: Thomas Törnblom <thomas.tornblom(a)iar.com> > Gerrit-Comment-Date: Fri, 17 Dec 2021 10:30:20 +0000 > Gerrit-HasComments: No > Gerrit-Has-Labels: Yes > Gerrit-MessageType: comment -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

3 years, 12 months

2
2
0 0

Any existing efforts on enabling X.509 certificate support inside TF-M

by Li, Jun R

Hi everyone, I’m wondering if there is any existing effort on enabling X.509 CSR generation and certificate verification inside TF-M? Our project has some custom secure partitions which need to generate the CSR and verify the issued certificates by themselves. The current TF-M implementation hasn’t added X.509’s support. So, I’m wondering if any open source project already does that which we can leverage? Regards, Jun Li Intel Corporation, CA

4 years

3
3
0 0

Technical Forum call - Dec 23 CANCELLED

by Anton Komlev

Hello, In the light of the end of the year celebrations expecting not many joiners on Dec 23, specially for US time zone, hence let's cancel the forum at the next week. Thanks and wish you the great holidays, Anton

4 years

1
0
0 0

Tip on cloning TF-M on OS X Monterey

by Kevin Townsend

I recently switched to a new MBP that ships with OS X Monterey, and on both 12.0 and 12.1 (released this week) git clone seems to be broken when you're using HTTP rather than SSH: digital envelope routines:CRYPTO_internal:bad key length In order to clone TF-M, I had to make the following changes. 1. Add these details to $HOME/.ssh/config (microbuilder being my github username, associated with my TF-M account): Host trustedfirmware.org User microbuilder Hostname review.trustedfirmware.org Port 29418 IdentityFile ~/.ssh/id_rsa IdentitiesOnly yes 2. Then try to clone with: $ git clone trustedfirmware.org:/TF-M/trusted-firmware-m.git This fails, however, since it tries to clone tf-m-tests.git, so: 3. Edit lib/ext/tf-m-tests/fetch_repo.cmake, changing: FetchContent_Declare(tfm_test_repo GIT_REPOSITORY trustedfirmware.org:TF-M/tf-m-tests.git # GIT_REPOSITORY https://git.trustedfirmware.org/TF-M/tf-m-tests.git GIT_TAG ${TFM_TEST_REPO_VERSION} GIT_PROGRESS TRUE ) This let me at least clone TF-M until the issues with HTTP-based cloning are fixed. Hope this is useful to someone else working on OS X natively. Kevin

4 years

2
1
0 0

Technical Forum call - Dec 9

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Dec 9, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years

2
3
0 0

Commit 65064c56 causes cmake errors for AN547 for all toolchains

by Thomas Törnblom

While working on IAR support for AN547 (M55) I notice that this commit causes cmake errors for all toolchains. cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/mps3/an547 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON ... CMake Error at tools/CMakeLists.txt:65 (file): file STRINGS file "D:/Projects/tf-m1/trusted-firmware-m/tools" cannot be read. Call Stack (most recent call first): tools/CMakeLists.txt:84 (parse_field_from_yaml) CMake Error at tools/CMakeLists.txt:65 (file): file STRINGS file "D:/Projects/tf-m1/trusted-firmware-m/armclang/lib/ext/tfm_test_repo-src/test/test_services" cannot be read. Call Stack (most recent call first): tools/CMakeLists.txt:84 (parse_field_from_yaml) Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years

5
7
0 0

IPC mode support for Audit log service

by Bøe, Sebastian

Hi, for PSA Certification level 2 a log of significant security events is required. Which I assume should be done with the Audit log service. But the Audit log service does not support IPC mode. Should PSA Certification level 2 be done with IPC mode or with library mode?

4 years

2
2
0 0

TF-M v1.5.0 release

by Anton Komlev

Hello, TF-M project released v1.5.0 in release/v1.5.x<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/log/?h=release/…> branch and tagged as TF-Mv1.5.0. In the following days the changes from the release branch will be integrated with the main branch. Please take a look into the release notes for the new features and changes: https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/docs/relea… The HTML version will be available after the main branch update. New major features are: * MCUboot updated to v1.8.0. * Thread mode SPM. * Add Non-secure Client Extension (NSCE) for non-secure client ID management support. * Secure Function model support in framework. * Support Memory-mapped IOVECs. * Decouple documentation and binary builds. * Manifest tool skips disabled Secure Partitions. * Provisioning and OTP are supported. * PSA Protected Storage, Internal Trusted Storage, Initial Attestation services are converted to Stateless services. * Support out-of-tree build of Secure Partitions. * Support out-of-tree build of platform specific test suites. * Introduce platform binding HAL. * ITS enhancement for harden ITS module against invalid data in Flash. * Support to select/deselect single or multiple TF-M regression test cases. * Decouple regression test flag configuration from TF-M. * New platforms added. Thank you, everyone who contributed to this milestone. Anton Komlev

4 years

1
0
0 0

Re: [TF-M] Technical Forum call - Nov-25 CANCELLED

by Anton Komlev

Hello, Having no items to discuss - let's cancel the forum today. Have a happy Thanksgiving day and enjoy your turkey if you celebrate it. Thanks, Anton From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Monday, November 22, 2021 12:04 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] Technical Forum call - Nov-25 Hi, The next Technical Forum is planned on Thursday, Nov 25, 15:00-16:00 UTC (US time zone). This is Thanksgiving day and public holiday in US so we might want to cancel the forum expecting fewer participants unless we have a good topic to discuss. Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years

1
0
0 0

TF-M v1.5.0 release started

by Anton Komlev

Hello, Let me inform you that release branch "release/1.5.0" is created and tagged with TF-Mv1.5.0-RC1 in these repositories: 1. tf-m-tests<https://git.trustedfirmware.org/TF-M/tf-m-tests.git/> 2. trusted-firmware-m<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/> 3. tf-m-ci-scripts<https://git.trustedfirmware.org/ci/tf-m-ci-scripts.git/> 4. tf-m-job-configs<https://git.trustedfirmware.org/ci/tf-m-job-configs.git/> Normal development can be continued in the main branch as described in the updated release process https://tf-m-user-guide.trustedfirmware.org/docs/releases/release_process.h… Thanks and good luck, Anton

4 years

1
2
0 0

Security vulnerability notice - Profile Small Key ID encoding vulnerability

by David Hu

Hi all, This email is a notification of a new security vulnerability reported to TF-M. In TF-M v1.4.0, NSPE may access secure keys stored in TF-M Crypto service in Profile Small with Crypto key ID encoding disabled. This vulnerability impacts Profile Small in TF-M v1.4.0. Please check the details in the security advisory<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12608/1/docs…>. The advisory has been merged in v1.5.0 release and will be port back to master branch. The fix has been merged on the master branch<https://review.trustedfirmware.org/plugins/gitiles/TF-M/trusted-firmware-m/…> and patch release v1.4.1<https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/commit/?h=TF-Mv…>. Thanks. Best regards, Hu Ziji

4 years

1
0
0 0

Technical Forum call - Nov-25

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Nov 25, 15:00-16:00 UTC (US time zone). This is Thanksgiving day and public holiday in US so we might want to cancel the forum expecting fewer participants unless we have a good topic to discuss. Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years

1
0
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Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors

by David Hu

Hi Thomas, The tf-m-tests fix is under review and has not been merged yet. Therefore that commit ID is not available in tf-m-tests. I'd suggest to do following to test the fix: * Cherry pick https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/12563 to your local tf-m-tests repo * Cherry pick https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12564 to your local trusted-firmware-m repo * Add `-DTFM_TEST_REPO_PATH=<local tf-m-tests folder>` in the build command. After the fix is merged, the commit will be available when fetching the tf-m-tests repo. Best regards, Hu Ziji ________________________________ From: Thomas Törnblom <thomas.tornblom(a)iar.com> Sent: Thursday, November 18, 2021 8:10 PM To: David Hu <David.Hu(a)arm.com>; David Wang <David.Wang(a)arm.com>; Feder Liang <Feder.Liang(a)arm.com> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors I'm getting another error after cherry picking these: PS D:\Projects\trusted-firmware-m\iar> cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_IARARM.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF -- Populating tfm_test_repo -- Configuring done -- Generating done -- Build files have been written to: D:/Projects/trusted-firmware-m/iar/lib/ext/tfm_test_repo-subbuild [1/9] Creating directories for 'tfm_test_repo-populate' [1/9] Performing download step (git clone) for 'tfm_test_repo-populate' Cloning into 'tfm_test_repo-src'... remote: Enumerating objects: 1094, done. remote: Counting objects: 100% (1094/1094), done. remote: Compressing objects: 100% (613/613), done. remote: Total 2057 (delta 913), reused 511 (delta 481), pack-reused 963 Receiving objects: 100% (2057/2057), 2.05 MiB | 8.43 MiB/s, done. Resolving deltas: 100% (1371/1371), done. fatal: invalid reference: 14ca288 CMake Error at tfm_test_repo-subbuild/tfm_test_repo-populate-prefix/tmp/tfm_test_repo-populate-gitclone.cmake:40 (message): Failed to checkout tag: '14ca288' FAILED: tfm_test_repo-populate-prefix/src/tfm_test_repo-populate-stamp/tfm_test_repo-populate-download cmd.exe /C "cd /D D:\Projects\trusted-firmware-m\iar\lib\ext && "C:\Program Files\CMake\bin\cmake.exe" -P D:/Projects/trusted-firmware-m/iar/lib/ext/tfm_test_repo-subbuild/tfm_test_repo-populate-prefix/tmp/tfm_test_repo-populate-gitclone.cmake && "C:\Program Files\CMake\bin\cmake.exe" -E touch D:/Projects/trusted-firmware-m/iar/lib/ext/tfm_test_repo-subbuild/tfm_test_repo-populate-prefix/src/tfm_test_repo-populate-stamp/tfm_test_repo-populate-download" ninja: build stopped: subcommand failed. CMake Error at C:/Program Files/CMake/share/cmake-3.20/Modules/FetchContent.cmake:1012 (message): Build step for tfm_test_repo failed: 1 Call Stack (most recent call first): C:/Program Files/CMake/share/cmake-3.20/Modules/FetchContent.cmake:1141:EVAL:2 (__FetchContent_directPopulate) C:/Program Files/CMake/share/cmake-3.20/Modules/FetchContent.cmake:1141 (cmake_language) lib/ext/tf-m-tests/fetch_repo.cmake:27 (FetchContent_Populate) lib/ext/tf-m-tests/tf-m-tests.cmake:56 (include) config/set_config.cmake:68 (include) CMakeLists.txt:42 (include) Den 2021-11-18 kl. 13:00, skrev David Hu: Hi Thomas, Sorry for the failure and the trouble. The build logic of QCBOR NS test was adjusted to fit FP feature but the logic has defect when QCBOR NS test = OFF. Please cherry pick the following 2 patches and have a try: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/12563 https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12564 The fix will be port back to master branch when release completes. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:57 PM To: David Wang <David.Wang(a)arm.com><mailto:David.Wang@arm.com>; Feder Liang <Feder.Liang(a)arm.com><mailto:Feder.Liang@arm.com> Cc: nd <nd(a)arm.com><mailto:nd@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Oh, and it fails the same on Windows and linux, as well as ARMCLANG and IARARM. /Thomas Den 2021-11-18 kl. 11:56, skrev Thomas Törnblom: commit fd88f7fbde4d23720c3c9be7350e628df51ef964 (HEAD -> master, tag: TF-Mv1.5.0-RC1, origin/master, origin/HEAD, list) Den 2021-11-18 kl. 11:27, skrev David Wang: Hi Thomas, Could you share the SHA of your branch HEAD? Or you can try to fetch the latest tag and code. Regards, David Wang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:10 PM To: Feder Liang <Feder.Liang(a)arm.com><mailto:Feder.Liang@arm.com> Cc: nd <nd(a)arm.com><mailto:nd@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Nope, I was using "master", which was 1.5.0 RC1, both fails. /Thomas Den 2021-11-18 kl. 10:56, skrev Feder Liang: Hi, Thomas It seems TF-M and Test repo is not synced. Could you help a try on latest TF-M master branch or tag: TF-Mv1.5.0-RC1? Best Regards Feder From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 5:42 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Looks like this patch is causing build errors, at least for Musca S1. cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF [1233/1238] Linking C executable bin\tfm_ns.axf FAILED: bin/tfm_ns.axf cmd.exe /C "cd . && D:\apps\Keil_v5\ARM\ARMCLANG\bin\armlink.exe --cpu=cortex-m33 --info=summarysizes,sizes,totals,unused,veneers --strict --symbols --xref --diag_suppress=6312 --diag_suppress=6314 --diag_suppress=6304 --diag_suppress=6329 --fpu=softvfp --map --scatter=D:/Projects/trusted-firmware-m/armclang/platform/target/CMakeFiles/tfm_ns_scatter.dir/./Device/Source/armclang/musca_ns.o platform\libplatform_ns.a app\libtfm_ns_integration_test.a app\libtfm_api_ns.a ns_log\libtfm_ns_log.a test\suites\core\libtfm_test_suite_core_ns.a app\libtfm_ns_integration_test.a test\suites\core\libtfm_test_suite_core_ns.a test\suites\attestation\libtfm_test_suite_attestation_ns.a test\suites\crypto\libtfm_test_suite_crypto_ns.a test\suites\qcbor\libtfm_test_suite_qcbor_ns.a -ltfm_qcbor_test test\suites\ps\libtfm_test_suite_ps_ns.a test\suites\its\libtfm_test_suite_its_ns.a test\suites\t_cose\libtfm_test_suite_t_cose_ns.a test\suites\t_cose\libtfm_t_cose_test.a test\suites\t_cose\libtfm_t_cose_ns.a test\suites\qcbor\libtfm_qcbor_ns.a test\suites\platform\libtfm_test_suite_platform_ns.a test\suites\ipc\libtfm_test_suite_ipc_ns.a lib\ext\tfm_test_repo-src\CMSIS\RTOS2\RTX\Library\ARM\RTX_V8MMN.lib app\libtfm_api_ns.a secure_fw\libtfm_s_veneers.a ns_log\libtfm_ns_log.a platform\libplatform_ns.a app\CMakeFiles\tfm_ns.dir\main_ns.o app\CMakeFiles\tfm_ns.dir\__\__\platform\ext\target\arm\musca_s1\Device\Source\armclang\startup_cmsdk_musca_ns.o app\CMakeFiles\tfm_ns.dir\__\ns_interface\ns_client_ext\tz_shim_layer.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Config\RTX_Config.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Source\rtx_lib.o app\CMakeFiles\tfm_ns.dir\os_wrapper_cmsis_rtos_v2.o -o bin\tfm_ns.axf --list=bin\tfm_ns.axf.map && cd ." Fatal error: L3900U: Unrecognized option '-ltfm_qcbor_test'. Finished: 0 information, 0 warning, 0 error and 1 fatal error messages. ninja: build stopped: subcommand failed. -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems>

4 years, 1 month

1
0
0 0

Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors

by David Hu

The mailing list was lost. From: David Hu Sent: Thursday, November 18, 2021 8:00 PM To: Thomas Törnblom <thomas.tornblom(a)iar.com>; David Wang <David.Wang(a)arm.com>; Feder Liang <Feder.Liang(a)arm.com> Cc: nd <nd(a)arm.com> Subject: RE: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Hi Thomas, Sorry for the failure and the trouble. The build logic of QCBOR NS test was adjusted to fit FP feature but the logic has defect when QCBOR NS test = OFF. Please cherry pick the following 2 patches and have a try: https://review.trustedfirmware.org/c/TF-M/tf-m-tests/+/12563 https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12564 The fix will be port back to master branch when release completes. Best regards, Hu Ziji From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:57 PM To: David Wang <David.Wang(a)arm.com<mailto:David.Wang@arm.com>>; Feder Liang <Feder.Liang(a)arm.com<mailto:Feder.Liang@arm.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Oh, and it fails the same on Windows and linux, as well as ARMCLANG and IARARM. /Thomas Den 2021-11-18 kl. 11:56, skrev Thomas Törnblom: commit fd88f7fbde4d23720c3c9be7350e628df51ef964 (HEAD -> master, tag: TF-Mv1.5.0-RC1, origin/master, origin/HEAD, list) Den 2021-11-18 kl. 11:27, skrev David Wang: Hi Thomas, Could you share the SHA of your branch HEAD? Or you can try to fetch the latest tag and code. Regards, David Wang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 6:10 PM To: Feder Liang <Feder.Liang(a)arm.com><mailto:Feder.Liang@arm.com> Cc: nd <nd(a)arm.com><mailto:nd@arm.com>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Nope, I was using "master", which was 1.5.0 RC1, both fails. /Thomas Den 2021-11-18 kl. 10:56, skrev Feder Liang: Hi, Thomas It seems TF-M and Test repo is not synced. Could you help a try on latest TF-M master branch or tag: TF-Mv1.5.0-RC1? Best Regards Feder From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org><mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Thomas Törnblom via TF-M Sent: Thursday, November 18, 2021 5:42 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [TF-M] d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors Looks like this patch is causing build errors, at least for Musca S1. cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF [1233/1238] Linking C executable bin\tfm_ns.axf FAILED: bin/tfm_ns.axf cmd.exe /C "cd . && D:\apps\Keil_v5\ARM\ARMCLANG\bin\armlink.exe --cpu=cortex-m33 --info=summarysizes,sizes,totals,unused,veneers --strict --symbols --xref --diag_suppress=6312 --diag_suppress=6314 --diag_suppress=6304 --diag_suppress=6329 --fpu=softvfp --map --scatter=D:/Projects/trusted-firmware-m/armclang/platform/target/CMakeFiles/tfm_ns_scatter.dir/./Device/Source/armclang/musca_ns.o platform\libplatform_ns.a app\libtfm_ns_integration_test.a app\libtfm_api_ns.a ns_log\libtfm_ns_log.a test\suites\core\libtfm_test_suite_core_ns.a app\libtfm_ns_integration_test.a test\suites\core\libtfm_test_suite_core_ns.a test\suites\attestation\libtfm_test_suite_attestation_ns.a test\suites\crypto\libtfm_test_suite_crypto_ns.a test\suites\qcbor\libtfm_test_suite_qcbor_ns.a -ltfm_qcbor_test test\suites\ps\libtfm_test_suite_ps_ns.a test\suites\its\libtfm_test_suite_its_ns.a test\suites\t_cose\libtfm_test_suite_t_cose_ns.a test\suites\t_cose\libtfm_t_cose_test.a test\suites\t_cose\libtfm_t_cose_ns.a test\suites\qcbor\libtfm_qcbor_ns.a test\suites\platform\libtfm_test_suite_platform_ns.a test\suites\ipc\libtfm_test_suite_ipc_ns.a lib\ext\tfm_test_repo-src\CMSIS\RTOS2\RTX\Library\ARM\RTX_V8MMN.lib app\libtfm_api_ns.a secure_fw\libtfm_s_veneers.a ns_log\libtfm_ns_log.a platform\libplatform_ns.a app\CMakeFiles\tfm_ns.dir\main_ns.o app\CMakeFiles\tfm_ns.dir\__\__\platform\ext\target\arm\musca_s1\Device\Source\armclang\startup_cmsdk_musca_ns.o app\CMakeFiles\tfm_ns.dir\__\ns_interface\ns_client_ext\tz_shim_layer.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Config\RTX_Config.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Source\rtx_lib.o app\CMakeFiles\tfm_ns.dir\os_wrapper_cmsis_rtos_v2.o -o bin\tfm_ns.axf --list=bin\tfm_ns.axf.map && cd ." Fatal error: L3900U: Unrecognized option '-ltfm_qcbor_test'. Finished: 0 information, 0 warning, 0 error and 1 fatal error messages. ninja: build stopped: subcommand failed. -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems> -- Thomas Törnblom, Product Engineer IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com<mailto:thomas.tornblom@iar.com> Website: www.iar.com<http://www.iar.com> Twitter: www.twitter.com/iarsystems<http://www.twitter.com/iarsystems>

4 years, 1 month

1
0
0 0

d4dbaa93, "Add FPU support for gnu arm embedded toolchain" causing build errors

by Thomas Törnblom

Looks like this patch is causing build errors, at least for Musca S1. cmake line: cmake -GNinja -S .. -B . -DTFM_PLATFORM=arm/musca_s1 "-DTFM_TOOLCHAIN_FILE=..\toolchain_ARMCLANG.cmake" -DTEST_NS=ON -DTEST_S=ON -DCMAKE_BUILD_TYPE=Debug -DBL2=ON -DTEST_NS_QCBOR=OFF [1233/1238] Linking C executable bin\tfm_ns.axf FAILED: bin/tfm_ns.axf cmd.exe /C "cd . && D:\apps\Keil_v5\ARM\ARMCLANG\bin\armlink.exe --cpu=cortex-m33 --info=summarysizes,sizes,totals,unused,veneers --strict --symbols --xref --diag_suppress=6312 --diag_suppress=6314 --diag_suppress=6304 --diag_suppress=6329 --fpu=softvfp --map --scatter=D:/Projects/trusted-firmware-m/armclang/platform/target/CMakeFiles/tfm_ns_scatter.dir/./Device/Source/armclang/musca_ns.o platform\libplatform_ns.a app\libtfm_ns_integration_test.a app\libtfm_api_ns.a ns_log\libtfm_ns_log.a test\suites\core\libtfm_test_suite_core_ns.a app\libtfm_ns_integration_test.a test\suites\core\libtfm_test_suite_core_ns.a test\suites\attestation\libtfm_test_suite_attestation_ns.a test\suites\crypto\libtfm_test_suite_crypto_ns.a test\suites\qcbor\libtfm_test_suite_qcbor_ns.a -ltfm_qcbor_test test\suites\ps\libtfm_test_suite_ps_ns.a test\suites\its\libtfm_test_suite_its_ns.a test\suites\t_cose\libtfm_test_suite_t_cose_ns.a test\suites\t_cose\libtfm_t_cose_test.a test\suites\t_cose\libtfm_t_cose_ns.a test\suites\qcbor\libtfm_qcbor_ns.a test\suites\platform\libtfm_test_suite_platform_ns.a test\suites\ipc\libtfm_test_suite_ipc_ns.a lib\ext\tfm_test_repo-src\CMSIS\RTOS2\RTX\Library\ARM\RTX_V8MMN.lib app\libtfm_api_ns.a secure_fw\libtfm_s_veneers.a ns_log\libtfm_ns_log.a platform\libplatform_ns.a app\CMakeFiles\tfm_ns.dir\main_ns.o app\CMakeFiles\tfm_ns.dir\__\__\platform\ext\target\arm\musca_s1\Device\Source\armclang\startup_cmsdk_musca_ns.o app\CMakeFiles\tfm_ns.dir\__\ns_interface\ns_client_ext\tz_shim_layer.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Config\RTX_Config.o app\CMakeFiles\tfm_ns.dir\__\CMSIS\RTOS2\RTX\Source\rtx_lib.o app\CMakeFiles\tfm_ns.dir\os_wrapper_cmsis_rtos_v2.o -o bin\tfm_ns.axf --list=bin\tfm_ns.axf.map && cd ." Fatal error: L3900U: Unrecognized option '-ltfm_qcbor_test'. Finished: 0 information, 0 warning, 0 error and 1 fatal error messages. ninja: build stopped: subcommand failed. -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 1 month

3
5
0 0

Open CI Does Not Cover ITS/PS Access Flash Tests on MUSCA_B1

by Xinyu Zhang

Hi, I'm sorry to inform you that ITS/PS access flash on MUSCA_B1 could not be covered on Open CI for the time being. Because the flash on MUSCA_B1 board in Open CI is broken, we temporarily use RAM_FS as workaround. This issue will be fixed ASAP. We'll keep following and inform you with further updates. Sorry for any inconvenience! BR, Xinyu

4 years, 1 month

2
2
0 0

Re: [TF-M] TF-M release v1.5.0 will start after Nov 15

by Anton Komlev

Hello, To include all planned changes we need more time to review the patches so the feature freeze is postponed to the beginning of the next week when release branch will be created. This gives all a few more days for reviews and last moment changes. The intention is to keep the final date unchanged. Best regards, Anton From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Anton Komlev via TF-M Sent: Thursday, November 11, 2021 8:33 AM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] TF-M release v1.5.0 will start on Nov 15 Hello, Following the updated release strategy, presented on the tech forum today I plan to create the release branch on Nov 13, and freeze project features at that moment. Please review and merge all patches intended for v1.5.0 by the end of this week. Normal development can continue on the main branch without any restriction. Thanks, Anton

4 years, 1 month

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Another PSoC problem

by Chris.Brand＠infineon.com

Build command is: cmake -S . -B output -G"Unix Makefiles" -DTFM_PLATFORM=cypress/psoc64 -DTFM_TOOLCHAIN_FILE=toolchain_GNUARM.cmake -DTEST_NS_MULTI_CORE=ON -DTFM_ISOLATION_LEVEL=1 The result is a hang at this point: > Executing 'MULTI_CLIENT_CALL_HEAVY_TEST' Description: 'Multiple outstanding NS PSA client calls heavyweight test' Totally 5 threads for test start Each thread run 0x20 rounds tests Some experimentation shows that: It happens with both gcc and armclang (unable to test IAR). It doesn't always happen, but does seem to hang more often than it succeeds. It doesn't happen with TFM_ISOLATION_LEVEL=2. It looks like this test was passing consistently before 5e68b11764673ee32bae0de8ecf3cde45cc55ea1, so I guess this is another scheduling issue. There's not a lot of code that differs with TFM_LVL, so I wonder if there's a race condition that is always present but just doesn't happen to get hit at TFM_LVL=2...? BTW, being able to build just the one test is extremely useful! Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

4 years, 1 month

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race condition in IPC

by Sebastian Bøe

Hi, are there any known race conditions in IPC/PS that affect TF-M 1.4-ish? More specifically TF-M revision a199c3047f320a2f82b9a0c27af5b50991184e0f, which is 38 commits prior to TF-Mv1.4.0-RC1. I am observing that adding printfs, or otherwise changing the flash alignment and therefore runtime of my code will affect whether the PS reliability test suite passes or not. More specifically, if it triggers a secure fault after x iterations of 2001, or y iterations of 2002, etc. depending on where I put my printfs or otherwise affect the alignment of the code. This is run on the nrf platform as a part of the nrf SDK. Test Suite PS reliability tests (TFM_PS_TEST_2XXX)... 'repetitive sets and gets in/from an asset' 'repetitive sets, gets and removes' It does not reproduce under GDB and I am unable to unwind the backtrace from the secure fault handler. Any tips about recovering a backtrace from a secure fault handler would also be appreciated. #0 SecureFault_Handler () at /home/sebo/ncs/modules/tee/tfm/trusted-firmware-m/secure_fw/spm/cmsis_psa/arch/tfm_arch_v8m_main.c:96 #1 0xffffffb4 in ?? () I have not been able to reproduce it in the latest upstream TF-M release/revision, but that could just be because I haven't been able to hit the race condition. Sebastian Bøe

4 years, 1 month

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[ATTENTION REQUIRED] Manifest Tool being aware of Secure Partition enabled status when building

by Kevin Peng

Hi, I worked out a patch<https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/12025> to make the Manifest Tool (tfm_parse_manifest_list.py) aware of the Secure Partition status when building. Currently, the tool generates everything and then the Build System picks up the files needed. With the development of FF-M 1.1 feature, we need the tool to be aware of the Secure Partition enabled status to generate SPM configurations. The patch make use of the feature of CMake command configure_file which substitutes variable values referenced as @VAR@ or ${VAR}. It requires the "conditional" attributes in manifest lists to be surrounded by "@" for "${}". Then when you disable some Partition for building, the tool will not generate anything for that Partition such as PID/SID and TF-M Partition load info. So please out of tree Secure Partition manifest lists do the corresponding change to make the tool aware of that any Partitions are DISABLED. The tool currently only takes conditional value "OFF" or "FALSE" as Partitions being disabled, all other values are treated as enabled. This means if you do not make the change in the manifest list, the tool treats all the partitions as enabled always. Best Regards, Kevin

4 years, 1 month

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TF-M release v1.5.0 will start on Nov 15

by Anton Komlev

Hello, Following the updated release strategy, presented on the tech forum today I plan to create the release branch on Nov 13, and freeze project features at that moment. Please review and merge all patches intended for v1.5.0 by the end of this week. Normal development can continue on the main branch without any restriction. Thanks, Anton

4 years, 1 month

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Musca B1 SE build broken?

by Chris.Brand＠infineon.com

Hi, I'm trying to build Musca B1 SE (as part of my work to create a new ns_agent_mailbox partition), and it seems that it has been missed in some HAL API changes: spm/libtfm_spm.a(backend_ipc.o): In function `ipc_system_run': .../secure_fw/spm/ffm/backend_ipc.c:132: undefined reference to `tfm_hal_update_boundaries' spm/libtfm_spm.a(spm_ipc.o): In function `tfm_spm_init': .../secure_fw/spm/cmsis_psa/spm_ipc.c:643: undefined reference to `tfm_hal_bind_boundaries' spm/libtfm_spm.a(spm_ipc.o): In function `do_schedule': .../secure_fw/spm/cmsis_psa/spm_ipc.c:694: undefined reference to `tfm_hal_update_boundaries' spm/libtfm_spm.a(static_load.o): In function `load_irqs_assuredly': .../secure_fw/spm/cmsis_psa/static_load.c:195: undefined reference to `tfm_hal_irq_enable' .../secure_fw/spm/cmsis_psa/static_load.c:198: undefined reference to `tfm_hal_irq_disable' spm/libtfm_spm.a(psa_api.o): In function `tfm_spm_partition_psa_eoi': .../secure_fw/spm/ffm/psa_api.c:830: undefined reference to `tfm_hal_irq_clear_pending' .../secure_fw/spm/ffm/psa_api.c:831: undefined reference to `tfm_hal_irq_enable' spm/libtfm_spm.a(psa_api.o): In function `tfm_spm_partition_irq_enable': .../secure_fw/spm/ffm/psa_api.c:858: undefined reference to `tfm_hal_irq_enable' spm/libtfm_spm.a(psa_api.o): In function `tfm_spm_partition_irq_disable': .../secure_fw/spm/ffm/psa_api.c:876: undefined reference to `tfm_hal_irq_disable' spm/libtfm_spm.a(tfm_core_svcalls_ipc.o): In function `tfm_flih_prepare_depriv_flih': .../secure_fw/spm/cmsis_psa/tfm_core_svcalls_ipc.c:137: undefined reference to `tfm_hal_update_boundaries' spm/libtfm_spm.a(tfm_core_svcalls_ipc.o): In function `tfm_flih_return_to_isr': .../secure_fw/spm/cmsis_psa/tfm_core_svcalls_ipc.c:170: undefined reference to `tfm_hal_update_boundaries' Chris Brand Cypress Semiconductor (Canada), Inc. An Infineon Technologies Company Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com> International Place 13700 V6V 2X8 Richmond Canada www.infineon.com<www.cypress.com> www.cypress.com<http://www.cypress.com> Discoveries<http://www.infineon.com/discoveries> Facebook<http://www.facebook.com/infineon> Twitter<http://www.twitter.com/Infineon> LinkedIn<http://www.linkedin.com/company/infineon-technologies> Part of your life. Part of tomorrow. NOTICE: The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material of Infineon Technologies AG and its affiliated entities which is for the exclusive use of the individual designated above as the recipient. Any review, retransmission, dissemination or other use of, or taking of any action in reliance upon, this information by persons or entities other than the intended recipient is prohibited. If you received this in error, please contact immediately the sender by returning e-mail and delete the material from any computer. If you are not the specified recipient, you are hereby notified that all disclosure, reproduction, distribution or action taken on the basis of this message is prohibited.

4 years, 1 month

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Technical Forum call - Nov 11

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, Nov 11, 7:00-8:00 UTC (Asia time zone). Please reply on this email with your proposals for agenda topics. Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years, 1 month

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lpcxpresso55s69 builds broken

by Thomas Törnblom

More breakage: In file included from ../secure_fw/spm/include/tfm_arch.h:19, from ../secure_fw/spm/cmsis_psa/spm_ipc.h:13, from ../secure_fw/partitions/idle_partition/load_info_idle_sp.c:10: ../secure_fw/spm/include/tfm_arch_v8m.h:58:2: error: #error "VTOR not present, check configurations." 58 | #error "VTOR not present, check configurations." | ^~~~~ ninja: build stopped: subcommand failed. Same issue with IAR. /Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 1 month

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PSoC64 TF-M - Port to CYB06447BZI-D54

by Cristiano Rodrigues

Hi guys, I am trying to put tf-m running in the PSoC64 board. However, I have a board that is slightly different from the one used by default in the tf-m. (I have *CYB06447BZI-D54* and the default tf-m is prepared to *CYS0644xxZI-S2D44). *For what I saw, the main difference among them is in memory, *CYB06447BZI-D54 *has 1MB of flash and 256kB of RAM and *CYS0644xxZI-S2D44 *has 2MB of Flash and 1MB of RAM. So now I'm trying to make a small port from tf-m to *CYB06447BZI-D54. * I changed the flash size in the flash_layout.h file to meet the *CYB06447BZI-D54 *flash size, however, I am having some difficulties in changing the RAM size. I am trying to change the RAM partitions size in region_defs.h and the smpu definitions of that partitions in smpu_config.h, but without much success. My question are: - Is possible to do the porting? Or does *CYB06447BZI-D54* not have enough memory to run tf-m? - If possible, what is I missing? Are more changes needed than I'm making? Best regards, Cristiano Rodrigues

4 years, 1 month

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Key derivation from HUK in NS application

by Kevin Townsend

Hi, I need to derive a new key from the HUK using HKDF, but are we able to request key derivation with the HUK from the NS side, or would we need to create a custom ARoT partittion for that? The requirements are identical to what PS does here with HKDF -- no salt and a fixed 'info' value, resulting in a key that is device-bound and can be regenerated at startup with no storage requirements: https://tf-m-user-guide.trustedfirmware.org/docs/technical_references/desig… (that API usage looks to be out of date, BTW, since "psa_open_key" now takes two params). I tried to do something similar from the NS side, modifying this code https://github.com/zephyrproject-rtos/zephyr/blob/main/samples/tfm_integrat… ..., but get an error when trying to open the HUK with "TFM_CRYPTO_KEY_ID_HUK". That isn't surprising, but is there any alternative to generate keys from the HUK without a custom ARoT service? The fact that no storage is required when deriving from the HUK is significant. Best regards, Kevin

4 years, 1 month

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Using software random generator for FIH library

by Roman.Mazurak＠infineon.com

Hi all, Does anyone know if using software random generator seeded with TRNG to provide random delays for Fault Injection Hardening library is correct from PSA Level 3 certification point of view? The basic idea is to : 1. Use TRNG to provide seed for software random generator on fih_delay_init. 2. Use software random generator to implement fih_delay_random. 3. Periodically reseed software random generator with data from TRNG (optional). Thanks, Roman.

4 years, 1 month

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Commit b8bc0d2a breaks Musca_S1

by Thomas Törnblom

Appears there are more recent breakage. b8bc0d2a "HAL: Expand the scope of tfm_hal_platform_init API" breaks Musca_S1 /Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 1 month

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fce78aef breaks psoc64 console output with IARARM and ARMCLANG toolchain

by Thomas Törnblom

The current version breaks console output for the secure partition on psoc64 with IAR or ARMCLANG. Appears to work with GNUARM. It appears that this commit is the culprit: fce78aef Platform: Duplicate the tfm_hal_platform_init The console starts out good, then during tests only garbage is seen. Linker script issues? /Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 1 month

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BL2 builds, no "PYTHON_EXECUTABLE" defined

by Thomas Törnblom

While attempting to build for the musca_s1, with mcuboot, on Windows, the build failed very late and brought up a Code Writer window on my screen. I nailed it down to no "PYTHON_EXECUTABLE" being defined while processing bl2/ext/mcuboot/CMakeLists.txt, which caused the build line to just attempt to run wrapper.py, with no interpreter, and windows brought up the appropriate tools to write python code. Adding "-DPYTHON_EXECUTABLE=python" to the cmake line fixed that, but it seems that this shouldn't be needed. The build tools should handle this, or? There is a line: #! /usr/bin/env python3 in wrapper.py, and I assume linux will handle this appropriately, but it doesn't seem windows does. Cheers, Thomas -- *Thomas Törnblom*, /Product Engineer/ IAR Systems AB Box 23051, Strandbodgatan 1 SE-750 23 Uppsala, SWEDEN Mobile: +46 76 180 17 80 Fax: +46 18 16 78 01 E-mail: thomas.tornblom(a)iar.com Website: www.iar.com <http://www.iar.com> Twitter: www.twitter.com/iarsystems <http://www.twitter.com/iarsystems>

4 years, 1 month

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Flash definitions usage

by Bohdan.Hunko＠infineon.com

Hi everyone, I was trying to understand usage of TOTAL_ROM_SIZE and FLASH_TOTAL_SIZE from musca_b1/sse_200/partitions/flash_layout.h file. I haven't found any usage of these definitions. Does anyone know what is the reason to have them defined? Regards, Bohdan Hunko Cypress Semiconductor Ukraine Engineer CSUKR CSS ICW SW FW Mobile: +38099 50 19 714 Bohdan.Hunko(a)infineon.com<mailto:Bohdan.Hunko@infineon.com>

4 years, 1 month

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Inline asm syntax unified and symbol reference in IAR toolchain

by Ken Liu

Hi Thomas and all, I noticed there are some #if !defined(__ICCARM__) ".syntax unified \n" #endif In source code, looks like ".syntax unified" is not support in IAR, is that true? If it could not be supported in a short term, we can define some wrapper such as: #ifdef __ICCARM__ #define CLAIM_SYNTAX_UNIFIED "\n" #else #define CLAIM_SYNTAX_UNIFIED ".syntax unified \n" #endif Another question is about the: #if defined(__ICCARM__) #pragma required = do_schedule #endif If we claim do_schedule in the constraints, is the above "#pragma required" still needed? __asm (".... :: "i"(do_schedule)); We can create a patch to test this - using a constraint looks more proper. Thanks. /Ken

4 years, 1 month

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Re: [TF-M] System reset

by Andrew Thoelke

Hi Sebastian, The section in the Platform Security Model is describing the behavior of a system reset – the recommendation is that any preceding runtime state (in volatile memory, or in CPU or peripheral registers) does not influence the execution of the reboot. This is except for an optional suspend or hibernate state, which explicitly maintains runtime state while powering off most or all of the system and will resume via a CPU reset. System security requirements might require explicit clearing of volatile memory on reset to prevent cold-boot style attacks that could allow an attacker to read any residual RAM contents – although software-based attacks of this kind are partly mitigated by trusted boot, which prevents an attacker from running arbitrary code at reset (unlike devices that boot from untrusted flash memory). The specific bullet list in the PSA Firmware Framework for M (in §3.5.1 on Panics) is describing the challenges for an implementation that does NOT do the recommended action of resetting the system when a Secure Partition panics, which justifies the recommendation to reset the system. If the SPM does reset the system, then the challenges in that bullet list are avoided. The issues listed are: > * An individual Secure Partition cannot be reset and restarted in isolation. > * A Secure Partition may have state maintained on behalf of clients that will be destroyed when restarting the service. There is no mechanism to re-synchronize the clients. > * It is not possible to determine at the point of panic how much corruption has occurred within the Secure Partition and elsewhere in the SPE. If the SPM only restarted the Secure Partition that panicked, then any previous runtime state within that Secure Partition is lost, including any ongoing connections with clients of services within that partition, or any resources that those services were managing for their clients. FF-M does not provide a specified mechanism for such clients to be informed that the connections are broken, and there is no way to provide a general strategy that allows a client to recover from a service failure. This is what is meant by “There is no mechanism to re-synchronize the clients.”. I have just realized that in FF-M 1.1, there may be scenarios in which restarting a Secure Partition could be justified and technically feasible. If a Secure Partition with only Stateless services maintains no client state or resources, and also maintains no connections to other RoT Services (so there are no RoT Services maintaining state for this Secure Partition) – then restarting this Secure Partition might not suffer from the first two complications listed in §3.5.1. The third issue is harder to control: the risks from the data corruption that lead up to the panic depends partly on the SPE isolation policies, and on what this Secure Partition was responsible for. Reset remains the recommended response to a Secure Partition panic in v1.1.0. Regards, Andrew Thoelke Arm Ltd. From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: 26 October 2021 10:51 To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] System reset Hi Sebastian, The specification writer looks not here these two days, let me try to explain it based on my understanding. I think two specs both recommend clearing general runtime data while resetting. If the booting runtime clearing code can clear the RAM data for a specific platform, the memory clearing in the 'tfm_spm_hal_system_reset ' can be skipped. Basically, simple hardware reset triggering is just fine. The special-purpose memory to be retained during resetting is not a generic runtime memory, hence they need to be treated specially, such as putting them in a special bank or region and skipping clearing them during booting. This special region can be treated as a private asset of one service, which could NOT be shared between components for direct access. The owner service provides the functionality around this asset. Please put more comments or corrections, thanks. /Ken From: TF-M <mailto:tf-m-bounces@lists.trustedfirmware.org> On Behalf Of Sebastian Bøe via TF-M Sent: Monday, October 25, 2021 3:16 PM To: mailto:tf-m@lists.trustedfirmware.org Subject: [TF-M] System reset Hi, I would like some clarification about system reset. There are these two statements about it in the PSM and PSA-FF: "No run-time state from before the reset should be retained or used, except where necessary if suspend or hibernate are supported, see section 4.6." -- PSM page 22. "A Secure Partition may have state maintained on behalf of clients that will be destroyed when restarting the service." -- PSA-FF page 47. Is it the responsibility of tfm_spm_hal_system_reset to destroy this state or is it OK to destroy it after reset as a part of the C runtime startup procedure? I assume for instance that PRoT .bss is cleared as a part of the C runtime startup procedure, but should it also have been destroyed as a part of tfm_spm_hal_system_reset ? PSM - Platform Security Model. https://developer.arm.com/documentation/den0128/0100/ PSA-FF PSA Firmware Framework https://armkeil.blob.core.windows.net/developer/Files/pdf/PlatformSecurityA… Sebastian Bøe Nordic Semiconductor

4 years, 1 month

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[PLATFORM ATTENTION REQUIRED] Unify the HAL APIs for IPC Model

by Kevin Peng

Hi all, I'm been working to unify the HAL APIs for IPC Model. The IPC Model currently uses two different sets of HAL APIs: * tfm_spm_hal_* - This is mainly used by the Library Model and IPC Model re-uses some of them * tfm_hal_* - This is introduced for IPC Model and some are shared to Library Model This might be confusing for platform vendors. So I'm trying to make it clear for IPC Model by: * Duplicating the shared APIs and rename the IPC copy to tfm_hal_* * Combining several platform init APIs to a single tfm_platform_init for IPC Model * tfm_spm_hal_enable_fault_handlers * tfm_spm_hal_system_reset_cfg * tfm_spm_hal_init_debug * tfm_spm_hal_nvic_interrupt_target_state_cfg * tfm_spm_hal_nvic_interrupt_enable With these changes, IPC Model will use tfm_hal_* APIs only. Please platform owners review these patches<https://review.trustedfirmware.org/q/topic:%22decouple_legacy_hal_for_ipc%2…> to see if any mistakes (the patches mainly move codes around) or any platforms missed in the patches. Plan to have them merged before the end of October. Thanks. Best Regards, Kevin

4 years, 1 month

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System reset

by Sebastian Bøe

Hi, I would like some clarification about system reset. There are these two statements about it in the PSM and PSA-FF: "No run-time state from before the reset should be retained or used, except where necessary if suspend or hibernate are supported, see section 4.6." -- PSM page 22. "A Secure Partition may have state maintained on behalf of clients that will be destroyed when restarting the service." -- PSA-FF page 47. Is it the responsibility of tfm_spm_hal_system_reset to destroy this state or is it OK to destroy it after reset as a part of the C runtime startup procedure? I assume for instance that PRoT .bss is cleared as a part of the C runtime startup procedure, but should it also have been destroyed as a part of tfm_spm_hal_system_reset ? PSM - Platform Security Model. https://developer.arm.com/documentation/den0128/0100/ PSA-FF PSA Firmware Framework https://armkeil.blob.core.windows.net/developer/Files/pdf/PlatformSecurityA… Sebastian Bøe Nordic Semiconductor

4 years, 1 month

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ITS File System Enhancement

by Sherry Zhang

Hi, I created patches to add the XOR checksum of the whole metadata into the ITS metadata_block header. This is to check the possible error in the flash. It can happen that the ITS file system is upgraded to the new one while the ITS assets are maintained with the current ITS file system. To support compatibility with the current ITS filesystem version, at the initialization of the file system, the file metadata and the block metadata, together with the metadata_block_header are updated to the new ITS file system. The patches are: https://review.trustedfirmware.org/q/topic:%22ITS_FILESYSTEM%22+(status:ope… Would you like to review the patches? Any comments are welcomed! Regards, Sherry Z

4 years, 1 month

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PSoC scheduling broken

by Chris.Brand＠infineon.com

Running regression tests with the current HEAD, the secure tests all pass but the non-secure tests get stuck early on (I suspect that responses don't get back to the NS core). Reverting 5e68b11764673ee32bae0de8ecf3cde45cc55ea1 "SPM: Trigger scheduler at the end of SPM API" fixes the issue. Was that patch tested with multi-core? I created a patch to revert that patch for now - https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11998 Chris Brand Cypress Semiconductor (Canada), Inc. Sr Prin Software Engr CSCA CSS ICW SW PSW 1 Office: +1 778 234 0515 Chris.Brand(a)infineon.com<mailto:Chris.Brand@infineon.com>

4 years, 1 month

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Enable GPIO IRQ in TFM 1.3 with zephry v2.7.0 on nrf5340DK

by Singh, Yaduvir

Hi All, I want to enable GPIO IRQ in Trusted firmware-m 1.3 on nrf5340DK. I have TFM 1.3 which comes with zephyr v2.7.0 image flashed to board. followed the steps of https://www.trustedfirmware.org/docs/tech_forum_20210819BriefUpdatesInterru… and tfm_slih_test_service which has TIMER0 interrupt handler. Steps1: Assigning the interrupt GPIOTE0 and TIMER0 in secure partition manifest file. Steps2: Assigning the MMIO region of GPIOTE0 and TIMER0 in secure partition manifest file. Step3: Enable(psa_irq_enable) for both GPIOTE0,TIMER0 and Start (tfm_plat_test_secure_timer_start) the TIMER0. Step4: waiting for interrupt SIGNAL defined in secure partition manifest file for GPIOTE0 and TIMER0) using psa_wait(PSA_WAIT_ANY, PSA_BLOCK) in the secure partition source code. But do not receive any signal for TIMER0 and GPIOTE0. Q1) at least TIMER0 signal should be received after the timer start? Q2)Are there any steps i missed to enable IRQ in TFM secure partition? Q3)Also, for GPIOTE i need to enable IRQ on the particular pin of port0 ex P0.8, How can i know the signal generated for the interrupt is for P0.8? Q4)In tfm_secure_irq_handling.rst it mentions "it is important the macro name matches the platform's handler function for that IRQ source." - In case ``source`` is defined IRQ macro, the name of the handler becomes ``void <macro>_Handler(void)``. I do not understand why we need to have a handler function name matching with IRQ source when we have to wait on psa_wait(PSA_WAIT_ANY, PSA_BLOCK) for IRQ signal? Step1,Step2 /*#####################################################################*/ modules\tee\tfm\trusted-firmware-m\platform\ext\target\nordic_nrf\common\nrf5340\tfm_peripherals_def.h #ifndef __TFM_PERIPHERALS_DEF_H__ #define __TFM_PERIPHERALS_DEF_H__ #include <nrf.h> #ifdef __cplusplus extern "C" { #endif #define TFM_TIMER0_IRQ (TIMER0_IRQn) #define TFM_TIMER1_IRQ (TIMER1_IRQn) #define TFM_GPIOTE0_IRQ (GPIOTE0_IRQn) #define TFM_SPIM4_IRQ (SPIM4_IRQn) struct platform_data_t; extern struct platform_data_t tfm_peripheral_std_uart; extern struct platform_data_t tfm_peripheral_timer0; extern struct platform_data_t tfm_peripheral_std_gpiote0; extern struct platform_data_t tfm_peripheral_std_spim4; #define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart) #define TFM_PERIPHERAL_TIMER0 (&tfm_peripheral_timer0) #define TFM_PERIPHERAL_GPIOTE0 (&tfm_peripheral_std_gpiote0) #define TFM_PERIPHERAL_SPIM4 (&tfm_peripheral_std_spim4) #define TFM_PERIPHERAL_FPGA_IO (0) #ifdef __cplusplus } #endif #endif /* __TFM_PERIPHERALS_DEF_H__ */ modules\tee\tfm\trusted-firmware-m\platform\ext\target\nordic_nrf\common\nrf5340\target_cfg.c struct platform_data_t tfm_peripheral_timer0 = { NRF_TIMER0_S_BASE, NRF_TIMER0_S_BASE + (sizeof(NRF_TIMER_Type) - 1), }; struct platform_data_t tfm_peripheral_std_uart = { NRF_UARTE1_S_BASE, NRF_UARTE1_S_BASE + (sizeof(NRF_UARTE_Type) - 1), }; struct platform_data_t tfm_peripheral_std_gpiote0 = { NRF_GPIOTE0_S_BASE, NRF_GPIOTE0_S_BASE + (sizeof(NRF_GPIOTE_Type) - 1), }; struct platform_data_t tfm_peripheral_std_spim4 = { NRF_SPIM4_S_BASE, NRF_SPIM4_S_BASE + (sizeof(NRF_SPIM_Type) - 1), }; /*Secure partition manifest file change*/ samplepartition.yaml { "psa_framework_version": 1.1, "name": "TFM_SP_sample", # Possible options: "PSA-ROT | APPLICATION-ROT" "type": "APPLICATION-ROT", "priority": "NORMAL", "model": "IPC", "entry_point": "sample_partition_main", "stack_size": "0x200", "services": [ # Define the secure service here. { "name": "TFM_EXAMPLE_SERVICE", # SIDs must be unique, ones that are currently in use are documented in # tfm_secure_partition_addition.rst on line 184 "sid": "0x00001001", "non_secure_clients": true, "version": 1, "version_policy": "STRICT" }, ], # Define all the IRQs that the service wants to handle. "mmio_regions": [ { "name": "TFM_PERIPHERAL_GPIOTE0", "permission": "READ-WRITE" }, { "name": "TFM_PERIPHERAL_SPIM4", "permission": "READ-WRITE" }, { "name": "TFM_PERIPHERAL_TIMER0", "permission": "READ-WRITE" }, ], "irqs": [ { "source": "TFM_GPIOTE0_IRQ", "name": "TFM_GPIOTE0_IRQ", "handling": "SLIH", "tfm_irq_priority": 64, }, { "source": "TFM_SPIM4_IRQ", "name": "TFM_SPIM4_IRQ", "handling": "SLIH", "tfm_irq_priority": 64, }, { "source": "TFM_TIMER0_IRQ", "name": "TFM_TIMER0_IRQ", "handling": "SLIH", "tfm_irq_priority": 64, } ], "dependencies": [ "TFM_CRYPTO" ] } Step3, Step4 /*#####################################################################*/ /*Secure partition Code*/ sample_partition.c #define TIMER_RELOAD_VALUE (1*1000*1000) static void gpiote0_handler(void) { LOG_INFFMT("gpiote0_handler called!!\n"); psa_irq_disable(TFM_GPIOTE0_IRQ_SIGNAL); psa_eoi(TFM_GPIOTE0_IRQ_SIGNAL); } static void spim4_handler(void) { LOG_INFFMT("spim4_handler called !\n"); psa_irq_disable(TFM_SPIM4_IRQ_SIGNAL); psa_eoi(TFM_SPIM4_IRQ_SIGNAL); } static void timer0_handler(void) { LOG_INFFMT("timer0_handler called!\n"); psa_irq_disable(TFM_TIMER0_IRQ_SIGNAL); psa_eoi(TFM_TIMER0_IRQ_SIGNAL); } static void timer_init(NRF_TIMER_Type * TIMER, uint32_t ticks) { nrf_timer_mode_set(TIMER, NRF_TIMER_MODE_TIMER); nrf_timer_bit_width_set(TIMER, NRF_TIMER_BIT_WIDTH_32); nrf_timer_frequency_set(TIMER, NRF_TIMER_FREQ_1MHz); nrf_timer_cc_set(TIMER, NRF_TIMER_CC_CHANNEL0, ticks); nrf_timer_one_shot_enable(TIMER, NRF_TIMER_CC_CHANNEL0); } static void timer_stop(NRF_TIMER_Type * TIMER) { nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_STOP); nrf_timer_int_disable(TIMER, NRF_TIMER_INT_COMPARE0_MASK); nrf_timer_event_clear(TIMER, NRF_TIMER_EVENT_COMPARE0); } static void timer_start(NRF_TIMER_Type * TIMER) { timer_stop(TIMER); nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_CLEAR); nrf_timer_int_enable(TIMER, NRF_TIMER_INT_COMPARE0_MASK); nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_START); } void tfm_plat_test_secure_timer_start(void) { timer_init(NRF_TIMER0, TIMER_RELOAD_VALUE); timer_start(NRF_TIMER0); } void tfm_plat_test_secure_timer_stop(void) { timer_stop(NRF_TIMER0); } void sample_partition_main(void) { psa_signal_t signals; psa_irq_enable(TFM_SPIM4_IRQ_SIGNAL); psa_irq_enable(TFM_GPIOTE0_IRQ_SIGNAL); /*Start timer interrupt*/ psa_irq_enable(TFM_TIMER0_IRQ_SIGNAL); tfm_plat_test_secure_timer_start(); /* Continually wait for one or more of the partition's RoT Service or * interrupt signals to be asserted and then handle the asserted signal(s). */ while (1) { signals = psa_wait(PSA_WAIT_ANY, PSA_BLOCK); if (signals & TFM_GPIOTE0_IRQ_SIGNAL) { gpiote0_handler(); }else if (signals & TFM_SPIM4_IRQ_SIGNAL) { spim4_handler(); }else if (signals & TFM_TIMER0_IRQ_SIGNAL) { timer0_handler(); } else { psa_panic(); } } } /*#####################################################################*/ Thanks Yaduvir

4 years, 1 month

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Re: [TF-M] [ATTENTION] SPM Update: Secure Partition build flag 'CONFIG_TFM_BUILDING_SPE' required.

by Ken Liu

Hi everyone, If you are creating out-of-tree partitions, please assign c-flag 'CONFIG_TFM_BUILDING_SPE' to the partitions sources. The reason is that FFM client header is used by both SPE and NSPE clients, and SPE would support multiple ABI methods and these methods can co-exist in the system, this flag can help the partition to choose correct ABI for FFM API. Check here for an example: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/11897/11/sec… Or do you think choosing one ABI as the default ABI (default ABI owns the spec originally defined symbols) should work? Any comments please feel free to raise. BR. /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Ken Liu via TF-M Sent: Wednesday, October 20, 2021 3:12 PM To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: [TF-M] [ATTENTION] SPM logic is under significant updating before End of Oct Hi, To support FFM 1.1 features (SFN mainly), the SPM logic is under significant updating till End of Oct, please: - If you are doing release-targeted development, please based on the released tags. - If you are developing with the latest master branch, please report bugs met. Our plan is to collect all bugs and fix them after this update, before the next release. - Keen to receive your fixes and contributions. It would be very nice if you can do these. All patches would go as a usual process, hence it should work for most of the configurations, except those not covered by the automation test. The platform related interfaces are not changing, hence no worry for platform owners. Thanks! /Ken

4 years, 1 month

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Re: [TF-M] Sending events from TF-M to non-secure world?

by Li, Jun R

Hi Ken, Thanks for the suggestions! Actually on the chip we are using (Nordic SoC), there is an event generator unit we can use directly without the needs to do hardware changes. I would like to try that approach. The reason we can't do polling is that the events are generated during the enrollment process. I don't think that our biometric secure partition is reentrant while a process is onging, right? It is using just the single thread model. Regards, Jun Message: 1 Date: Wed, 20 Oct 2021 05:43:23 +0000 From: Ken Liu <Ken.Liu(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Message-ID: <DB9PR08MB676161D704B2D3D861283E6CF5BE9(a)DB9PR08MB6761.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" Hi Jun, To trigger an interrupt by software, Register 'STIR' may help you. The scenario you are describing is a practical use case hence it makes sense to think more about it. The scenarios you are describing is more related to the programming model - As the SPE is working more like a library, the NS caller polling the status of secure services by service interfaces and updating local presenting are more straight (and simple). And if you have involved a callback/event-based programming model into your secure service already (3rd party provided such a library, e.g.), you'll have to invent some mechanism to interactive with NS. From the Firmware Framework - M perspective, the peripheral is private to a partition, you can treat shared peripheral/memory as private resources to this partition, claim it in the manifest, and use it to communicate with NS. This shared peripheral (Aka MMIO in the specification) is private, it cannot be shared with other partitions. More comments? BR. /Ken -----Original Message----- From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Li, Jun R via TF-M Sent: Tuesday, October 19, 2021 10:42 PM To: tf-m(a)lists.trustedfirmware.org Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Hi Ken, Thanks for the nice suggestions! I was thinking of using an interrupt from TF-M to NS world as well but that needs some hardware support, which should be fine since I'm still designing the device. Maybe there is a software interrupt solution? Our application needs to put a biometric service inside TF-M and its enrollment process needs to send out some intermediate events to give the user some feedbacks. This is why I'm asking this question. I think TF-M can use an input buffer from NS world to store the new events and notify the NS world with the interrupt to fetch the new events. Sounds good? Regards, Jun On 10/19/21, 00:23, "TF-M on behalf of tf-m-request(a)lists.trustedfirmware.org" <tf-m-bounces(a)lists.trustedfirmware.org on behalf of tf-m-request(a)lists.trustedfirmware.org> wrote: Send TF-M mailing list submissions to tf-m(a)lists.trustedfirmware.org To subscribe or unsubscribe via the World Wide Web, visit https://lists.trustedfirmware.org/mailman/listinfo/tf-m or, via email, send a message with subject or body 'help' to tf-m-request(a)lists.trustedfirmware.org You can reach the person managing the list at tf-m-owner(a)lists.trustedfirmware.org When replying, please edit your Subject line so it is more specific than "Re: Contents of TF-M digest..." Today's Topics: 1. Re: Sending events from TF-M to non-secure world? (Ken Liu) 2. Inline asm syntax unified and symbol reference in IAR toolchain (Ken Liu) ---------------------------------------------------------------------- Message: 1 Date: Tue, 19 Oct 2021 02:06:35 +0000 From: Ken Liu <Ken.Liu(a)arm.com> To: "tf-m(a)lists.trustedfirmware.org" <tf-m(a)lists.trustedfirmware.org> Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Sending events from TF-M to non-secure world? Message-ID: <DB9PR08MB67613655A2ACA207C751C791F5BD9(a)DB9PR08MB6761.eurprd08.prod.outlook.com> Content-Type: text/plain; charset="utf-8" Hi Jun, Basically, the service accessing model is a client-service model, hence the service won't call back to the client which makes the client a 'service'. Service can get client info by passed-in parameters and other SPM controlled channels. Assuming you are using a Trustzone based hardware, the hardware provides the capability that calling back to NSPE, but it is not encouraged inside TF-M because it breaks the simplified model proposed by FF-M and difficulties the secure threat analysis - a simple case is that the secure context is blocked because it is waiting for NS returns. If you do need to perform such operations, implement an interrupt based asynchronous mechanism is safer than software callbacks. The most queried requirement we have met is someone querying if the execution can be delivered back to NSPE when secure IDLE is going to happen. Not sure if you are facing the similar, is it okay to share more details? BR /Ken From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Li, Jun R via TF-M Sent: Tuesday, October 19, 2021 12:20 AM To: tf-m(a)lists.trustedfirmware.org Subject: [TF-M] Sending events from TF-M to non-secure world? Hi, Anyone has idea how a service inside a secure partition can send out some events to the non-secure world? Does callback still work over IPC? It seems non-secure world can connect to a SP but not easy to do the other way. Appreciate any comments or suggestions! Jun Intel Corporation @ SC, CA -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.trustedfirmware.org/pipermail/tf-m/attachments/20211019/1ff875…> -- TF-M mailing list TF-M(a)lists.trustedfirmware.org https://lists.trustedfirmware.org/mailman/listinfo/tf-m

4 years, 2 months

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Re: [TF-M] Supporting encryption with ITS

by Vasilakis, Georgios

Hey Andrew, These are very valuable points! For us I think that we aim mainly for per key integrity and confidentiality on the key material and integrity only for the key metadata. Providing confidentiality for the whole keystore will need major changes in the PSA APIs and will be out of scope for us. Providing per key confidentiality for the key material is a very straightforward change as you described. ITS will not need to change at all in this case, we will only modify the PSA crypto APIs. Providing per key integrity for key metadata will need a bit more thinking since apart from the fields included in the psa_persistent_key_storage_format we will also need the fields from the psa_storage_info_t struct but this should not be a serious issue as well. To conclude I think that we need to design the changes so that it is possible for platforms to implement these two requirments but we don't need to enforce them. I think that we need to have the flexibility to allow platforms to make their decisions on what they want to support depending on their needs. If, for example, a platform wants to support only confidentiality on the key material, they should be able to do that in my opinion. Since we are discussing platform specific implementations, the IV or any additional data needed could be probably stored (hidden to the PSA APIs) inside a platform specific struct inside the psa_persistent_key_storage_format struct. This will minimize the storage requirements for each platform. Regards, George ________________________________ From: Kvamtrø, Frank Audun <frank.kvamtro(a)nordicsemi.no> Sent: Wednesday, October 20, 2021 3:13 PM To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no> Subject: Vs: [TF-M] Supporting encryption with ITS ________________________________ Fra: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> på vegne av Andrew Thoelke via TF-M <tf-m(a)lists.trustedfirmware.org> Sendt: onsdag 20. oktober 2021 10:31 Til: tf-m(a)lists.trustedfirmware.org <tf-m(a)lists.trustedfirmware.org> Kopi: nd <nd(a)arm.com> Emne: Re: [TF-M] Supporting encryption with ITS Hi, Note that, by specification, ITS must provide confidentiality, integrity and replay protection for the data stored within it. However, if the platform already provides that protection via isolation/logical/physical mechanisms, then adding cryptographic protection provides some defence in depth, or may mitigate some forms of physical attack. In this case, it is not obvious what forms of cryptographic protection are needed, as cryptography is not providing the primary security properties for the ITS data. As a result, I think the best design for this requirement will depend on the details of the protection that is required. In this use case, which of the following types of cryptographic protection are needed: 1. Confidentiality of key material (the actual bits of the key data) 2. Confidentiality of key material and key metadata 3. Confidentiality of the full keystore 4. Per-key Integrity of key material 5. Per-key Integrity of key material and key metadata 6. Per-key Confidentiality and Integrity of key material and key metadata 7. Confidentiality and integrity of the full keystore 8. Rollback protection? Per-key confidentiality, or confidentiality+integrity would be reasonably straight-forward to implement in a layer over the simple ITS storage – but would probably add IV or nonce+tag data to each key stored (assuming a HUK-derived encryption key is used). For just encryption, given the pseudo-random nature of secret keys – it might be possible to drop the need for random IV (and just use the client id + key id as an IV/nonce). Full key store confidentiality or confidentiality+integrity requires much more complex design, as this aims to conceal and protect the identity of the keys that are stored, not just the key material and/or key metadata. Regards, Andrew From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org> On Behalf Of Vasilakis, Georgios via TF-M Sent: 19 October 2021 14:31 To: tf-m(a)lists.trustedfirmware.org Cc: nd <nd(a)arm.com> Subject: Re: [TF-M] Supporting encryption with ITS Hello again, sorry for the second email by my formatting got lost in the first one unfortunately. Let me include the formatted context below: Following the discussion regarding the encryption with ITS let's discuss a bit further the ideas discussed in the meeting. 1)Allow the protected storage to be used as a storage backend for persistent key storage in PSA crypto: This introduces the problem of reentrance that we discussed before. We cannot call crypto from the inside the PSA storage partition (either ITS of PS if we wanted to switch) 2)Do the encryption in the crypto partition instead of the ITS: This will require to create some platform specific encryption abstraction since we cannot have reentrance in PSA crypto as well. Meaning that we cannot call PSA crypto from PSA crypto. The main thing that needs to be solved in this solution is where can we store the metadata. The key itself can be derived from the HUK and does not need to be stored but the metadata need to be stored. These metadata can be stored by expanding the psa_storage_info_t struct or by introducing a new struct. The crypto storage apis will need to be modified to be aware of the extra information and handle them. 3)Put a frontend to ITS so that we select specific keys that need to be derived by the HUK. This is like the idea 2 I think in a concept level. The previous two designs described in the mailing list was to refactor the ITS and the PS partitions to have a common "encryption" library and the idea of refactoring the ITS itself to have an encryption layer. I personally prefer the solution 2 more than the other solutions. Moving the encryption in a higher level and using the ITS as a simple storage solution seems a cleaner approach. This will introduce a crypto abstraction layer (different than PS) but I don't consider it as a major disadvantage since all the crypto implementations in this scope will be very platform specific. Let me know about your opinions on this, if there are no major objections, I am willing to design a solution and some header files to elaborate more on this design. ________________________________ From: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Sent: Tuesday, October 19, 2021 3:18 PM To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Supporting encryption with ITS Hello all, Following the discussion regarding the encryption with ITS let's discuss a bit further the ideas discussed in the meeting. Allow the protected storage to be used as a storage backend for persistent key storage in PSA crypto: This introduces the problem of reentrance that we discussed before. We cannot call crypto from the inside the PSA storage partition (either ITS of PS if we wanted to switch) Do the encryption in the crypto partition instead of the ITS: This will require to create some platform specific encryption abstraction since we cannot have reentrance in PSA crypto as well. Meaning that we cannot call PSA crypto from PSA crypto. The main thing that needs to be solved in this solution is where can we store the metadata. The key itself can be derived from the HUK and does not need to be stored but the metadata need to be stored. These metadata can be stored by expanding the psa_storage_info_t struct or by introducing a new struct. The crypto storage apis will need to be modified to be aware of the extra information and handle them. Put a frontend to ITS so that we select specific keys that need to be derived by the HUK. This is like the idea 2 I think in a concept level. The previous two designs described in the mailing list was to refactor the ITS and the PS partitions to have a common "encryption" library and the idea of refactoring the ITS itself to have an encryption layer. I personally prefer the solution 2 more than the other solutions. Moving the encryption in a higher level and using the ITS as a simple storage solution seems a cleaner approach. This will introduce a crypto abstraction layer (different than PS) but I don't consider it as a major disadvantage since all the crypto implementations in this scope will be very platform specific. Let me know about your opinions on this, if there are no major objections, I am willing to design a solution and some header files to elaborate more on this design. Regards, George ________________________________ From: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Sent: Wednesday, September 29, 2021 2:04 PM To: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Supporting encryption with ITS Hello Sherry, Thank you for the feedback! Does the storage area on your device meet this requirement? Yes, our devices can secure against read and write access through the dedicated peripherals (SPU + MPU). Is the memory physically isolated? If by that you mean if they are located outside of the chip then it is not. It is part of the package. If not, I wonder why not uses the Protected Storage service instead? The reason that we cannot use the protected storage service is that it is not supported as a storage backend by the PSA crypto APIs. Storing non-volatile keys right now using the PSA APIs uses ITS as a storage backend. Your comments regarding storing the IV and the TAG in Protected Storage are, of course, valid. If we decide to use a common code base we will have to do changes in the design of both services to overcome these issues. Overall, the motivation for encrypted ITS is based on the raising popularity of hardware-based attacks. The fact that right now we provide all the security measures needed does not mean that nothing will get compromised in the future. A security in depth approach seems more reasonable for such sensitive data. I am happy to join the TF-M Tech forum this Thursday and discuss it further, yes! Regards, George ________________________________ From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: Tuesday, September 28, 2021 12:20 PM To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [TF-M] Supporting encryption with ITS Hi George, The ITS without encryption is not a compromised RoT. In the PSA Secure Storage API spec, the PSA Internal Trust Storage aims at providing a place for devices to store their most intimate secrets. Also “””””””””””””””””””” 1. The storage underlying the PSA Internal Trusted Storage Service MUST be protected from read and modification by attackers with physical access to the device. 2. The storage underlying the PSA Internal Trusted Storage Service MUST be protected from direct read or write access from software partitions outside of the PSA Root of Trust (PRoT). “””””””””””””””””””” So, for internal trusted storage service, it requires the underlying storage itself should provide being read or write protection. The storage area should be a “trusted” area. Does the storage area on your device meet this requirement? Is the memory physically isolated? If not, I wonder why not uses the Protected Storage service instead? For the design of adding encryption in ITS, in the PS partition, the `iv` and the encrypted object data are stored with the object file while the tag of each object is stored with the object table file. So, if encrypt the PS object in the ITS file system, how the PS partition get the `tag` of each object? After a rough thought, I think probably a standalone encryption for ITS is more reasonable. As this is a relatively “big topic”, would you like to hold a discussion on the TF-M Tech forum if it is not limited by confidential information? The next Tech forum will be hold on this Thursday 3:00 PM UTC time. Regards, Sherry Zhang From: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Sent: Friday, September 24, 2021 8:52 PM To: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: Re: [TF-M] Supporting encryption with ITS Hello Sherry, Thank you for your input! 1. Our threat model is more concerned about attacks which can happen very early in the boot process, I think. A completely compromised RoT is not in our threat model. 2. I see that, ITS is supposed to store small objects. The storage overhead of adding encryption will be probably bigger than 20 bytes I think but the intention is to have this only as a configuration, not as the default option. 3. Agreed, a HAL API should be used for this. Do you have any opinion on the design of it? Do you think that it adds value to do try to use a common design for the object handling of both PS and ITS or is it better to have it as a standalone thing for the ITS. Regards, George ________________________________ From: Sherry Zhang <Sherry.Zhang2(a)arm.com<mailto:Sherry.Zhang2@arm.com>> Sent: Friday, September 24, 2021 11:58 AM To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [TF-M] Supporting encryption with ITS Hi George, Some comments from my side: 1. Internal trusted storage is part of the Root of Trust domain. If ITS storage device is attacked, then the code flash where the PSA Rot SP locates may also be attacked. Does the thread model of your system require the encryption in ITS? 2. The ITS service is intended to be used to interface to a small piece of storage. Encryption would increase the context for each ITS file. For example, similarly to PS object context, the `IV` which is used in encryption as well as the generated `tag` should be added into each file context. They total together can be about more than 20 bytes. 3. If the encryption is mandatory/ necessary required by the thread model of your system, as discussed, the PSA crypto service should not be called to avoid the circular. I think a HAL API for encryption may be created in ITS for platform implementation defined encryption/decryption. Regards, Sherry Zhang From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Vasilakis, Georgios via TF-M Sent: Thursday, September 23, 2021 10:47 PM To: Gyorgy Szing <Gyorgy.Szing(a)arm.com<mailto:Gyorgy.Szing@arm.com>>; Fabian Schmidt <fabian.schmidt(a)nxp.com<mailto:fabian.schmidt@nxp.com>> Cc: nd <nd(a)arm.com<mailto:nd@arm.com>>; tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] Supporting encryption with ITS Hey Gyorgy, These are very valuable comments! I am aware of the circular dependency issue because the PSA apis are using the ITS as a storage backend. This, as you said, can be circumvented by using a software crypto library or an implementation specific API. So, for the encryption a flexible API can be used which can allow externals to use their own function calls. Regarding the key storage, this is what I had in mind as well, using derived keys from the HUK. So that we don't need to store anything but the crypto metadata. Adding another layer of storage will raise more issues, I think. ________________________________ From: Gyorgy Szing <Gyorgy.Szing(a)arm.com<mailto:Gyorgy.Szing@arm.com>> Sent: Thursday, September 23, 2021 4:30 PM To: Fabian Schmidt <fabian.schmidt(a)nxp.com<mailto:fabian.schmidt@nxp.com>>; Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> <tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org>>; nd <nd(a)arm.com<mailto:nd@arm.com>> Subject: RE: [TF-M] Supporting encryption with ITS Hi, AFAIK the main reason for ITS not using encryption is the problem of circular dependency. ITS is used by crypto SP for key storage, so how will crypto fetch the key from ITS to decrypt ITS? You could use a software crypto implementation (another mbed-tls instance) in ITS, but where would you safely store the keys? If you have a two layer ITS, one for only storing the keys for the second instance, and a second, encrypted one, then you end up with something like ITS and PS. You may not need a full blown on-chip FLASH device for ITS. If you have a HUK available, you can derive the same SP specific keys from that at each boot, and store these in RAM backed ITS. You won’t be able to store other keys in ITS in a persistent way of course, but for that you can use PS. Well, something along these lines. Perhaps the TF-M team could help better if you could share some details on why your customer would need encrypted ITS. (A PSA for Cortex-A (TS) maintainer chiming in to a “not his business” discussion here 😉 ) /George From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Fabian Schmidt via TF-M Sent: September 23, 2021 15:51 To: Vasilakis, Georgios <georgios.vasilakis(a)nordicsemi.no<mailto:georgios.vasilakis@nordicsemi.no>> Cc: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: Re: [TF-M] Supporting encryption with ITS Hi George, I’m wondering if that would add value. To my understanding, ITS was never designed to be encrypted because of the way it’s supposed to be set up. (It’s Internal Trusted Storage.) I believe best practice is to place it in a “trusted” location, one that is ideally only accessible from Secure world, and also ideally on-die. If you then restrict outside access to the internal flash (JTAG, flash programmer ports,…), you’re pretty golden, in that no unauthorized party should be able to read from or write to the ITS.* Let me know if I misunderstand anything about ITS or TrustZone, but that’s my view. Maybe I’m painting an idealized picture. Greetings, Fabian Schmidt * at least short of a sophisticated physical attack or finding some loophole in TrustZone… From: TF-M <tf-m-bounces(a)lists.trustedfirmware.org<mailto:tf-m-bounces@lists.trustedfirmware.org>> On Behalf Of Vasilakis, Georgios via TF-M Sent: Donnerstag, 23. September 2021 15:28 To: tf-m(a)lists.trustedfirmware.org<mailto:tf-m@lists.trustedfirmware.org> Subject: [EXT] [TF-M] Supporting encryption with ITS Caution: EXT Email Hey all, Lately the requirement for an encrypted ITS solution is being asked from our customers and I would like to have a discussion here on how we can design this in a reasonable way. The first thought that came to my mind was to add the functionality to the ITS flash-fs layer. This layer contains file metadata in the its_file_meta_t structure and it should be possible to expand this to include additional crypto metadata (conditionally). This seems to be the less invasive change to me, even though it will introduce some increased memory usage since supporting encryption will mean that we cannot read the data in chunks anymore, we will have to use static buffers. At the same time, I looked at the PS partition since I knew that it has support for encryption. I believe that some core concepts of both solutions have similarities even though the code is quite different. For example, a file in ITS is similar to an object in PS and the (linear) list of file metadata in ITS is similar to the concept of the object table in PS. So, I think that it should be possible to design some generic-enough APIs that we can use for both the ITS and PS. Even though this will require some major refactoring in both partitions, it will decrease the code of these services which will probably decrease maintenance later. What are your thoughts on this? Regards, George

4 years, 2 months

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Technical Forum call - October 28

by Anton Komlev

Hi, The next Technical Forum is planned on Thursday, October 28, 15:00-16:00 UTC (US time zone). That session Chris Reed kindly agreed to present "Introduction to pyOCD" - the method to program and debug TF-M and Cortex-M MCUs, in general, using the open-source tool https://pyocd.io/ Recording and slides of previous meetings are here: https://www.trustedfirmware.org/meetings/tf-m-technical-forum/ Best regards, Anton

4 years, 2 months

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CMAKE library dependency trace tool for TF-M

by Jianliang Shen

Hi all, I'd like to introduce a CMAKE library dependency trace tool to you. This python script can * Search a specific library's dependent libraries and to-be-linked libraries in a list of repo paths. * Draw a diagram to show the link relationship. * Give some other information about: * Include paths * Source files * Compile definitions The main feature of diagram is similar with [CMakeGraphVizOptions]<https://cmake.org/cmake/help/latest/module/CMakeGraphVizOptions.html#cmakeg…>, the differences are: * The new tool can focus on certain library with specific trace depth like 1, 2 and n. * The new tool is not runtime, it is a static search and can search all libraries whose runtime build may be silenced. * The new tool makes the diagram more colourful to be more readable. With this tool, I hope you can get and check the structure of CMAKE library more quickly when developing the code and libraries. I have proposed a patch in tf-m-tools repo: [library dependency trace tool]<https://review.trustedfirmware.org/c/TF-M/tf-m-tools/+/12019>. This tool may not be convenient for everyone of you so here I beg for your feedbacks to make it better. Thanks. Best Regards Jianliang Shen

4 years, 2 months

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[ATTENTION] SPM logic is under significant updating before End of Oct

by Ken Liu

Hi, To support FFM 1.1 features (SFN mainly), the SPM logic is under significant updating till End of Oct, please: - If you are doing release-targeted development, please based on the released tags. - If you are developing with the latest master branch, please report bugs met. Our plan is to collect all bugs and fix them after this update, before the next release. - Keen to receive your fixes and contributions. It would be very nice if you can do these. All patches would go as a usual process, hence it should work for most of the configurations, except those not covered by the automation test. The platform related interfaces are not changing, hence no worry for platform owners. Thanks! /Ken

4 years, 2 months

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