Hi everyone,
I am developing an App RoT for STM32L552 and testing the recent integrated FLIH interrupt feature, but I am missing something in the step of "Initializing the Interrupts" and "Integrating the Interrupt Handling Function".
As is described in Secure Interrupt Integration Guide https://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/tfm_secure_irq_integration_guide.html#initializing-the-interrupts, to enable an interrupt it is needed:
1. Binding the interrupt to a Secure Partition. 2. Granting the Secure Partition access permissions to the device of the interrupt. 3. Initializing the interrupt. 4. Integrating the interrupt handling function
Step *1 *and *2, * think that is "checked":
- by adding this code to the partition manifest file.
"mmio_regions": [ { "name": "TFM_PERIPHERAL_TIMER7", "permission": "READ-WRITE" } ], "irqs": [ { "source": "TFM_TIMER7_IRQ", "name": "TFM_TIMER7_IRQ", "handling": "FLIH", }
- By defining the macro with platform peripheral structure in *patform/ext/target/stm/common/stm32l5xx/boards/tfm_peripherals_def.h*
extern struct platform_data_t timer7 #define TFM_PERIPHERAL_TIMER7 &timer7
- *By assign the peripheral address in platform\ext\target\stm\common\stm32l5xx\secure\target_cfg.c*
struct platform_data_t timer7 = { __TIMER7_BASE, __TIMER7_BASE + 0x3FF, -1, -1 };
- By adding the peripheral name to “partition_named_mmio_list[]” in the file *patform/ext/target/stm/common/stm32l5xx/boards/mmio_defs.h*
const uintptr_t partition_named_mmio_list[] = { (uintptr_t)TFM_PERIPHERAL_TIMER0, (uintptr_t)TFM_PERIPHERAL_STD_UART, (uintptr_t) TFM_PERIPHERAL_TIMER7, };
- And add to my partition code, the irq function, and the function to configure the timer
psa_flih_result_t tfm_timer7_irq_flih(void) { .... }
static void flih_test_case_1(psa_msg_t *msg) { psa_irq_enable(TFM_TIMER7_IRQ_SIGNAL); timer_start(); ....... timer_stop(); psa_irq_disable(TFM_TIMER7_IRQ_SIGNAL); psa_reply(msg->handle, PSA_SUCCESS); }
My problem, I think, is with the other two steps, *3 *and *4. *The TF-M documentation is not clear in these two steps.
In step *3, *as is said in the documentation it is needed: i) to configure the interrupt priority; ii) to ensure that the interrupt targets the Secure State. iii) and save the interrupt information. So I suppose it goes something like this:
struct irq_t { void *p_pt; struct irq_load_info_t *p_ildi; } save_tfm_timer7_irq_info;
enum tfm_hal_status_t tfm_timer7_irq_init(void *p_pt, struct irq_load_info_t *p_ildi) { //targetting the interrupt to S state NVIC_ClearTargetState(TIM7_IRQn); NVIC_SetPriority(TIM7_IRQn, 1); NVIC_EnableIRQ(TIM7_IRQn); //Saving the Interrupt Information save_tfm_timer7_irq_info.p_pt = p_pt; save_tfm_timer7_irq_info.p_ildi = p_ildi; return TFM_HAL_SUCCESS; }
*But in which file should I put this function? And where should I call this function??*
And in step *4, *I also do not understand how can I meet this requirement -> "Platforms should call this entry function in the interrupt handlers defined in Vector Table with the saved information for each interrupt."
Being the function in question -> *void spm_handle_interrupt(void *p_pt, struct irq_load_info_t *p_ildi).*
*Which file can I do this in? And how should I do this step?*
Cheers, Cristiano Rodrigues
Hi Cristiano,
Thanks for the valuable feedback on the integration guide. Looks like it needs some refinements. I’ll try to do that.
For you questions: But in which file should I put this function? And where should I call this function??
* You can put it in any file that belongs to the platform_s CMake target. But better to put it in a dedicate file for example tfm_interrupts.c * This is a callback function which is called by SPM during initialization. That’s why it has a specific pattern. Which file can I do this in? And how should I do this step? (void spm_handle_interrupt(void *p_pt, struct irq_load_info_t *p_ildi).
* You can put it in the same file as the above IRQ init function, for example tfm_interrupts.c because you’ll need the IRQ information saved by the init function * Then you need call the SPM provided entry in the handler in VTOR. * For example, in the STM32L5xxx platforms, the handler in VTOR for timer7 is TIM7_IRQHandler * It has a default “weak” implementation. You need to override it (in tfm_interrupts.c): void TIM7_IRQHandler(void) { spm_handle_interrupt(save_tfm_timer7_irq_info.p_pt, save_tfm_timer7_irq_info.p_ildi); }
As examples, some of the platforms have the “tfm_interrupts.c” for your references, like platform/ext/target/arm/mps2/an521/tfm_interrupts.c.
Best Regards, Kevin
From: TF-M tf-m-bounces@lists.trustedfirmware.org On Behalf Of Cristiano Rodrigues via TF-M Sent: Friday, October 8, 2021 11:29 PM To: tf-m@lists.trustedfirmware.org Subject: [TF-M] Enable a peripheral interrupt to an App RoT
Hi everyone,
I am developing an App RoT for STM32L552 and testing the recent integrated FLIH interrupt feature, but I am missing something in the step of "Initializing the Interrupts" and "Integrating the Interrupt Handling Function".
As is described in Secure Interrupt Integration Guidehttps://tf-m-user-guide.trustedfirmware.org/docs/integration_guide/tfm_secure_irq_integration_guide.html#initializing-the-interrupts, to enable an interrupt it is needed:
1. Binding the interrupt to a Secure Partition. 2. Granting the Secure Partition access permissions to the device of the interrupt. 3. Initializing the interrupt. 4. Integrating the interrupt handling function Step 1 and 2, think that is "checked":
* by adding this code to the partition manifest file. "mmio_regions": [ { "name": "TFM_PERIPHERAL_TIMER7", "permission": "READ-WRITE" } ], "irqs": [ { "source": "TFM_TIMER7_IRQ", "name": "TFM_TIMER7_IRQ", "handling": "FLIH", }
* By defining the macro with platform peripheral structure in patform/ext/target/stm/common/stm32l5xx/boards/tfm_peripherals_def.h extern struct platform_data_t timer7 #define TFM_PERIPHERAL_TIMER7 &timer7
* By assign the peripheral address in platform\ext\target\stm\common\stm32l5xx\secure\target_cfg.c struct platform_data_t timer7 = { __TIMER7_BASE, __TIMER7_BASE + 0x3FF, -1, -1 };
* By adding the peripheral name to “partition_named_mmio_list[]” in the file patform/ext/target/stm/common/stm32l5xx/boards/mmio_defs.h const uintptr_t partition_named_mmio_list[] = { (uintptr_t)TFM_PERIPHERAL_TIMER0, (uintptr_t)TFM_PERIPHERAL_STD_UART, (uintptr_t) TFM_PERIPHERAL_TIMER7, };
* And add to my partition code, the irq function, and the function to configure the timer psa_flih_result_t tfm_timer7_irq_flih(void) { .... }
static void flih_test_case_1(psa_msg_t *msg) { psa_irq_enable(TFM_TIMER7_IRQ_SIGNAL); timer_start(); ....... timer_stop(); psa_irq_disable(TFM_TIMER7_IRQ_SIGNAL); psa_reply(msg->handle, PSA_SUCCESS); }
My problem, I think, is with the other two steps, 3 and 4. The TF-M documentation is not clear in these two steps.
In step 3, as is said in the documentation it is needed: i) to configure the interrupt priority; ii) to ensure that the interrupt targets the Secure State. iii) and save the interrupt information. So I suppose it goes something like this:
struct irq_t { void *p_pt; struct irq_load_info_t *p_ildi; } save_tfm_timer7_irq_info;
enum tfm_hal_status_t tfm_timer7_irq_init(void *p_pt, struct irq_load_info_t *p_ildi) { //targetting the interrupt to S state NVIC_ClearTargetState(TIM7_IRQn); NVIC_SetPriority(TIM7_IRQn, 1); NVIC_EnableIRQ(TIM7_IRQn); //Saving the Interrupt Information save_tfm_timer7_irq_info.p_pt = p_pt; save_tfm_timer7_irq_info.p_ildi = p_ildi; return TFM_HAL_SUCCESS; }
But in which file should I put this function? And where should I call this function??
And in step 4, I also do not understand how can I meet this requirement -> "Platforms should call this entry function in the interrupt handlers defined in Vector Table with the saved information for each interrupt." Being the function in question -> void spm_handle_interrupt(void *p_pt, struct irq_load_info_t *p_ildi). Which file can I do this in? And how should I do this step?
Cheers, Cristiano Rodrigues
tf-m@lists.trustedfirmware.org
-
Cristiano Rodrigues -
Kevin Peng