Hi Biju, Andre,
sctlr_el3 = 0x0000000030c5183a
The MMU is still disabled since we're so early in BL31, so nothing preventing us from making an actual access to physical address 0x0.
As Andre already noted:
x30 = 0x0000000000000000 elr_el3 = 0x0000000000000000 far_el3 = 0x0000000000000000
It looks like we do have an errant null pointer dereference here.
If I had to guess, the I-side successfully fetches a 32-bit word from physical address 0x0, but then fails to decode that bit pattern as a valid opcode. This is reported as "unknown reason", like you're seeing:
<quote Arm ARM DDI 0487E.a pp D13-2963> This EC code is used for all exceptions that are not covered by any other EC value. This includes exceptions that are generated in the following situations: - ... - Instruction encodings that are unallocated. - ... </quote>
Hope that helps, Ash.
Hi Ash,
Thanks. It is a new info for me, will help debugging this kind of issues in future.
Regards, Biju
Subject: Re: [TF-A] commit 75fab6496e5fce9a11 ("libc: memset: improve performance by avoiding single byte writes") causing BL31 boot failure on Renesas RZ/G2 platforms.
Hi Biju, Andre,
sctlr_el3 = 0x0000000030c5183a
The MMU is still disabled since we're so early in BL31, so nothing preventing us from making an actual access to physical address 0x0.
As Andre already noted:
x30 = 0x0000000000000000 elr_el3 = 0x0000000000000000 far_el3 = 0x0000000000000000
It looks like we do have an errant null pointer dereference here.
If I had to guess, the I-side successfully fetches a 32-bit word from physical address 0x0, but then fails to decode that bit pattern as a valid opcode. This is reported as "unknown reason", like you're seeing:
<quote Arm ARM DDI 0487E.a pp D13-2963> This EC code is used for all exceptions that are not covered by any other EC value. This includes exceptions that are generated in the following situations:
- ...
- Instruction encodings that are unallocated.
- ...
</quote>
Hope that helps, Ash.
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