[+tf-a list] Hi Pali, There are 2 philosophies for handing SError in the system, kernel first and firmware first. Assuming you want to stick with firmware first handling (i.e scr_el3.ea is set to 1), then as you mentioned, there are 2 ways to notify the kernel for delegating the error handling: SDEI and SError injection back to kernel. Upstream TF-A only supports SDEI at the moment.
For SError injection back to lower EL, you have to setup the hardware state via software at higher EL in such a way that it appears that the fault was taken to the exception vector at the lower exception level. The pseudocode function AArch64.TakeException() in ARM ARM shows the behavior when the PE takes an exception to an Exception level using AArch64 in Non-debug state. This behaviour has to replicated and it involves the higher EL setting up the PSTATE registers correctly and values in other registers for the lower EL (spsr, elr and fault syndrome registers) and jumping to the right offset point to by the vbar_elx of the lower EL. To the lower EL is appears as a SError has triggered at its exception vector and it can proceed with the fault handling.
Best Regards Soby Mathew
-----Original Message----- From: Pali Rohár email@example.com Sent: Monday, May 24, 2021 6:07 PM To: Soby Mathew Soby.Mathew@arm.com Subject: Rethrow SError from EL3 to kernel on arm64
I have found following discussion in Armada 3720 PCIe SError issue: https://review.trustedfirmware.org/c/TF-A/trusted-firmware- a/+/1541/comment/ca882427_d142bde2/
TF-A on Armada 3720 redirects all SErrors to EL3 and panic in TF-A handler. You wrote in that discussion:
Ideally you need to signal the SError back to kernel from EL3 using SDEI or inject the SError to the lower EL and the kernel can decide to die or not.
And I would like to ask you, could you help me with implementation of this SError rethrow functionality? Because I have absolutely no idea how to do it and catching all SErrors in EL3 is causing issues because some of them can be handled and recovered by kernel.