Hi Varun,

Xilinx is also managing it by special firmware. There is a concept of protected-clocks documented via DT binding which is used by Qualcomm.

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Doc...

Are you also using this feature or simply don't let Linux know about these clocks at all or simulate it via fixed-clock or so? Or any registration is in place that firmware keep refcount of users and don't let it change unless there is only one user of that clock?

Thanks, Michal

On 6/21/21 6:41 PM, Varun Wadekar wrote:

Hi Michal,

AFAIK, TF-A does not publish guidelines for clocks/resets for shared IP. It is left to the platforms.

For Tegra platforms, the clocks/reset are managed by a central entity. TF-A is expected to co-ordinate with this entity. Unfortunately, PL011 does not fall in this category and is expected to be kept on by the previous bootloader.

-Varun

-----Original Message----- From: TF-A tf-a-bounces@lists.trustedfirmware.org On Behalf Of Michal Simek via TF-A Sent: Monday, June 21, 2021 2:24 PM To: tf-a@lists.trustedfirmware.org Subject: [TF-A] PL011 clock handling between TF-A and Linux

External email: Use caution opening links or attachments

Hi,

recently we have hit the case where Linux has pl011 driver and using it as a console. The same console is also used by TF-A. If you look at implementation details Linux pl011 driver has in pl011_console_write() clk_enable/clk_disable calls. I can't see any clock handling for PL011 in TF-A that's why I guess that TF-A expectation is that clocks are enabled and must be enabled all the time because pl011 is also used as crashed console. That's why I would like to check with you what's the clock expectation in these shared IP cases. Do you have a requirement that firmware should keep refcount of IP users and never disable clock when only one requires it?

Thanks, Michal -- TF-A mailing list TF-A@lists.trustedfirmware.org https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.trus...

Hi Varun,

do you have any links to that calls in Linux clk API? I expect the same hooks should be added also to reset.

And is TF-A informs your special firmware that for example serial driver is used by TF-A to increate refcount?

Thanks, Michal

On 6/22/21 2:03 PM, Varun Wadekar wrote:

Hi Michal,

Tegra platforms manage clocks/resets by special firmware. The firmware internally manages refcount of users as you described.

AFAIR, we placed calls to the firmware in the linux clk APIs to achieve this. There was an effort to leverage runtime_pm for this too.

I think we wont be able to add guidance to TF-A for clock management as most of it is platform dependent. We can add a generic guideline saying that a certain driver expects the platform to manage the clock/reset for the IP.

-Varun

-----Original Message----- From: Michal Simek michal.simek@xilinx.com Sent: Tuesday, June 22, 2021 7:24 AM To: Varun Wadekar vwadekar@nvidia.com; Michal Simek michal.simek@xilinx.com Cc: tf-a@lists.trustedfirmware.org Subject: Re: [TF-A] PL011 clock handling between TF-A and Linux

External email: Use caution opening links or attachments

Hi Varun,

Xilinx is also managing it by special firmware. There is a concept of protected-clocks documented via DT binding which is used by Qualcomm.

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Doc...

Are you also using this feature or simply don't let Linux know about these clocks at all or simulate it via fixed-clock or so? Or any registration is in place that firmware keep refcount of users and don't let it change unless there is only one user of that clock?

Thanks, Michal

On 6/21/21 6:41 PM, Varun Wadekar wrote:

...

Hi Michal,

AFAIK, TF-A does not publish guidelines for clocks/resets for shared IP. It is left to the platforms.

For Tegra platforms, the clocks/reset are managed by a central entity. TF-A is expected to co-ordinate with this entity. Unfortunately, PL011 does not fall in this category and is expected to be kept on by the previous bootloader.

-Varun

-----Original Message----- From: TF-A tf-a-bounces@lists.trustedfirmware.org On Behalf Of Michal Simek via TF-A Sent: Monday, June 21, 2021 2:24 PM To: tf-a@lists.trustedfirmware.org Subject: [TF-A] PL011 clock handling between TF-A and Linux

External email: Use caution opening links or attachments

Hi,

recently we have hit the case where Linux has pl011 driver and using it as a console. The same console is also used by TF-A. If you look at implementation details Linux pl011 driver has in pl011_console_write() clk_enable/clk_disable calls. I can't see any clock handling for PL011 in TF-A that's why I guess that TF-A expectation is that clocks are enabled and must be enabled all the time because pl011 is also used as crashed console. That's why I would like to check with you what's the clock expectation in these shared IP cases. Do you have a requirement that firmware should keep refcount of IP users and never disable clock when only one requires it?

Thanks, Michal -- TF-A mailing list TF-A@lists.trustedfirmware.org https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist s.trustedfirmware.org%2Fmailman%2Flistinfo%2Ftf-a&data=04%7C01%7Cvwadekar%40nvidia.com%7C9d5af04d3aba49b18cc808d935465267%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637599398425726681%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=%2BXFRPZTttom4rvT%2FmEcQnbgSa276PYuKbvoH4VujRk8%3D&reserved=0