Hi Amit,

I feel there is no contradiction because the statements are being taken out of context. The section in the first URL emphasizes interrupt routing models within the Interrupt management framework where whereas the section in the second URL emphasizes the software contract of Platform Interrupt controller interfaces, including GICv2 IP. In the first section, it is somewhat implicit that we are operating in GICV2_G0_FOR_EL3 = 0 mode as evident from the following excerpt at the bottom of the paragraph from which you took the original statement.

"** In the remainder of this document, for the sake of simplicity a Arm GICv2 system is considered and it is assumed that the FIQ signal is used to generate Secure-EL1 interrupts and the IRQ signal is used to generate non-secure interrupts in either security state. EL3 interrupts are not considered.**"

In the second section, it was important to distinguish the capabilities of the GICv2 IP, hence it emphasizes the build time support(GICV2_G0_FOR_EL3) in supervisory software to configure a Group0 secure interrupt as either SEL1-interrupt or EL3-interrupt.

If you disagree, please feel free to push a patch to make relevant changes to the documentation and I will be happy to review it.

Thanks, Madhukar

-----Original Message----- From: Nagal, Amit via TF-A tf-a@lists.trustedfirmware.org Sent: Wednesday, May 8, 2024 3:59 AM To: tf-a@lists.trustedfirmware.org Subject: [TF-A] documentation - secure interrupt handling in EL3 for arm gic v2

Hi ,

There is a contradiction present in TF-A documentation whether secure interrupts can be handled in EL3 for arm gic v2 case .

1. Referring https://trustedfirmware-a.readthedocs.io/en/latest/design/interrupt-framewor... It says secure interrupts can't be handled in EL3 . Refer statement : "In Arm GICv2, all secure interrupts are assumed to be handled in Secure-EL1. They can be delivered to Secure-EL1 via EL3 but they cannot be handled in EL3."

2. Referring https://trustedfirmware-a.readthedocs.io/en/latest/components/platform-inter... It says secure interrupts can be handled in EL3 , When GICV2_G0_FOR_EL3 is 1 . Refer below statements : For interrupt type INTR_TYPE_EL3: When GICV2_G0_FOR_EL3 is 0, it returns false, indicating no support for EL3 interrupts. When GICV2_G0_FOR_EL3 is 1, it returns true, indicating support for EL3 interrupts.

can this be clarified ?

Regards Amit -- TF-A mailing list -- tf-a@lists.trustedfirmware.org To unsubscribe send an email to tf-a-leave@lists.trustedfirmware.org