Hi Jun,
Just to clarify a bit. You mention a CA53 based platform (hence Armv8.0 and no secure EL2 extension). The only possibility to deploy an FF-A compliant SPM is by using OP-TEE at S-EL1.
It means the questions (1.,2.,3.,4.) are not really relevant in this context as they apply to an SEL2 based SPM configuration, which is what Manish explained. Similarly, the doc link you pointed (https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/compon...) relates to using Hafnium as a SPM on Armv8.4+ platforms.
For your specific case, you should refer to OP-TEE and Trusted Services documentation (and Gyorgy's comments)
Regards, Olivier.
________________________________________ From: Manish Pandey2 Manish.Pandey2@arm.com Sent: 20 April 2021 00:49 To: Gyorgy Szing; Jun Nie; tf-a@lists.trustedfirmware.org Cc: Olivier Deprez; Achin Gupta; Shebu Varghese Kuriakose; nd Subject: Re: Question on how enable TF-A SPM on iMX8M
Hi Jun,
On top of what Gyorgy suggested, please find specific answers to your queries
I am trying to enable SPM on iMX8MP platform, which is cortex-A53. The BL2 is already enabled and the dts file is needed. But I am not sure how to write below dts information when I referencing fvp_spmc_manifest.dts. Could you help to give some suggestion or where should I find the anwsers?
1. Is fvp_spmc_manifest.dts enough to enable SPM? I see there are dts files, such as fvp_fw_config.dts. What's necessary dts nodes to enable SPM?
Arm's FVP platform use fconf mechanism to load different dts files, the first dts file which keeps information about all the dt files is "fw_config.dts", these dt files are consumed by different SW components. They are loaded(by BL2) at base address provided in their fw_config.dts entry and x0 register is used to pass dt address to SW component. HW_CONFIG dt consumed by Linux, TOS_FW_CONFIG consumed by trusted OS(BL32), NT_FW_CONFIG consumed by non-secure FW(BL33) I will explain you through example of one of the configurations which is present in CI https://review.trustedfirmware.org/plugins/gitiles/ci/tf-a-ci-scripts/+/refs... In this configuration, BL33 : NS Hypervisor, BL32: Secure hypervisor (SPM) TOS_FW_CONFIG in this case is fvp_spmc_manifest.dts (plat/arm/board/fvp/platform.mk +271), which is loaded 0x04001500 by BL2 and when BL31 fills x0 register with this address when jumping to BL32. To avoid going through fconf for now, you can quickly test it by loading and passing base address of fvp_spmc_manifest.dts.
2. Does vcpu_count means CPU number? Yes
3. I see load_address of attribute is optee-os load address. But I do not know how should I decide the load addresses of hypervisors. Is this address decided by virtual machine, or it is decided in runtime? I cannot find the 0x7100000 in trusted-services project. If i take spmc example again then, BL2 loads BL32 image at BL32_BASE which is Trusted DRAM base (0x6000000, include/plat/arm/common/arm_def.h +500), So when BL31 prepare to run BL32 it jumps to BL32_BASE with x0 populated with TOS_FW_CONFIG base(mentioned earlier).
4. I am confused on "Secure Partitions are bundled as independent package files" in below link. Does this bundle package means fip image, or into another file by jason file? Could you help point to the files and image generation command? https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/compon... Secure partitions are packaged as SP package which in turn are embedded into FIP as blobs. The json file is a human readable form to provide SP packages by platform (max 8 supported now). TF-A build expects a json file SP_LAYOUT_FILE (docs/getting_started/build-options.rst +608). In our current setup we have 3 Secure partitions (named cactus) are exported from TF-A test repository script to generate json file https://git.trustedfirmware.org/TF-A/tf-a-tests.git/tre%E2%80%8Be/tools/gene...https://git.trustedfirmware.org/TF-A/tf-a-tests.git/tree/tools/generate_json/generate_json.sh (can be manually created as well) And the fvp json file looks like below { "cactus-primary" : { "image": "cactus.bin", "pm": "cactus.dts", "owner": "SiP" },
"cactus-secondary" : { "image": "cactus.bin", "pm": "cactus-secondary.dts", "owner": "Plat" },
"cactus-tertiary" : { "image": "cactus.bin", "pm": "cactus-tertiary.dts" } }
For a quick test, what you can do is preload SPMC binary and is manifests and Secure partitions(can reuse cactus for now).
@Gyorgy Szingmailto:Gyorgy.Szing@arm.com: For now, IMO its OK to keep discussions on TF-A mailing list (as it mostly related with loading of the images).
________________________________ From: Gyorgy Szing Gyorgy.Szing@arm.com Sent: 19 April 2021 16:48 To: Jun Nie jun.nie@linaro.org; Manish Pandey2 Manish.Pandey2@arm.com; tf-a@lists.trustedfirmware.org tf-a@lists.trustedfirmware.org Cc: Olivier Deprez Olivier.Deprez@arm.com; Achin Gupta Achin.Gupta@arm.com; Shebu Varghese Kuriakose Shebu.VargheseKuriakose@arm.com; nd nd@arm.com; nd nd@arm.com Subject: RE: Question on how enable TF-A SPM on iMX8M
Hi Jun,
First a bit of background. The FF-A Secure Partition Manager (SPM) is split to two components: 1. The SPM Dispatcher or SPMD. This component runs at EL3 and the reference implementation is part of TF-A. 2. The SPM Core or SPMC. This component can run at different exception levels in the secure world. Currently two implementations exist at tf.org, Hafnium which runs at S-EL2 (secure hypervisor) and is maintained by the TF-A team, and OP-TEE SPMC which runs at S-EL1 and is maintained by the TS team. (See the chapter 2.4 of the "PSA Firmware_Framework for A (PSA-FF-A)" document here https://developer.arm.com/docs/den0077/latest for more details)
And now let me address your questions.
1, 2, 3. fvp_spmc_manifest.dts The handling and content of the SPMC manifest is SPMC implementation specific. This file in the TF-A repo is irrelevant (not used) for the OP-TEE SPMC.
4. "Secure Partitions are bundled as independent package files" One of the differences between Hafnium and OP-TEE SPMC is how they boot the SPs. Hafnium expects the SPs being loaded by BL2 from the FIP package, and expect BL2 to tell the load-address of the SPs in the SPMC manifest. OP-TEE in turn has the SPs linked into the OP-TEE binary and uses symbols bound by the linker to find the SPs.
/George
PS: I suggest taking this discussion off the TF-A mailing list as for the TF-A community this is out of scope.
-----Original Message----- From: Jun Nie jun.nie@linaro.org Sent: 19 April 2021 16:21 To: Manish Pandey2 Manish.Pandey2@arm.com; tf-a@lists.trustedfirmware.org Cc: Olivier Deprez Olivier.Deprez@arm.com; Achin Gupta Achin.Gupta@arm.com; Shebu Varghese Kuriakose Shebu.VargheseKuriakose@arm.com; Gyorgy Szing Gyorgy.Szing@arm.com Subject: Question on how enable TF-A SPM on iMX8M
Hi,
I am trying to enable SPM on iMX8MP platform, which is cortex-A53. The BL2 is already enabled and the dts file is needed. But I am not sure how to write below dts information when I referencing fvp_spmc_manifest.dts. Could you help to give some suggestion or where should I find the anwsers?
1. Is fvp_spmc_manifest.dts enough to enable SPM? I see there are dts files, such as fvp_fw_config.dts. What's necessary dts nodes to enable SPM?
2. Does vcpu_count means CPU number?
3. I see load_address of attribute is optee-os load address. But I do not know how should I decide the load addresses of hypervisors. Is this address decided by virtual machine, or it is decided in runtime? I cannot find the 0x7100000 in trusted-services project.
4. I am confused on "Secure Partitions are bundled as independent package files" in below link. Does this bundle package means fip image, or into another file by jason file? Could you help point to the files and image generation command? https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/compon...
Regards, Jun