Hello TF-A partners!
As you may know, Arm recently announced the v8-R64 Architecture (AArch64 R-class cores), notably the Cortex R-82. v8-R64 has generated a lot of interest in the R-cores community, in part because of its vastly-increased address space and performance, and also because of its ability to run rich operating systems like Linux alongside more traditional RTOSes.
Of course, great hardware requires great firmware to succeed! So, we are upstreaming a new platform into TF-A to support v8-R64, called "fvp_r." It's certainly reasonable to ask, "why support v8-R64 as a platform under the A-cores' trusted firmware?" The answer is simply that v8-R64 cores are far more similar with v8-A cores than different. Therefore, most of the trusted firmware code for v8-R64 cores is in-common with v8-A cores. If a separate trusted-firmware project were created for them, we would have a huge parallel-maintenance headache! Also, SystemReady IR certification for v8-R64 cores requires compliance with EBBR, and building from a TF-A framework puts us on the path toward that goal.
The immediate firmware requirement for v8-R64, however, is not the entirety of TF-A. The immediate requirement for the fvp_r platform is to let the partner/customer dictate the nature of the run-time environment, and for TF to "trusted-boot" their environment. Therefore, the patch that we're upstreaming boots up only through BL1, and BL1 is adapted to load the customer/partner custom-defined run-time system.
On 1 July, the Arm team who are upstreaming the fvp_r platform, will host a Tech Forum session wherein we'll provide an overview, and medium level of detail on:
* The differences between v8-A and v8-R64 (again, more similar than different!),
* The impacts of these differences upon BL1, and
* Changes to BL1 to boot a partner/customer run-time system.
* We'll then detail the nature of the patches involved - which patches provide what functionality.
* Provide some suggestions for making the review of these patches easier.
________________________________
You have been invited to the following event.
TF-A Tech Forum
When
Every 2 weeks from 16:00 to 17:00 on Thursday United Kingdom Time
Calendar
tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org>
Who
*
Bill Fletcher- creator
*
tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org>
more details ><https://www.google.com/calendar/event?action=VIEW&eid=NWlub3Ewdm1tMmk1cTJrM…>
We run an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC.
Feel free to forward this invite to colleagues. Invites are via the TF-A mailing list and also published on the Trusted Firmware website. Details are here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/<https://www.google.com/url?q=https%3A%2F%2Fwww.trustedfirmware.org%2Fmeetin…>
Trusted Firmware is inviting you to a scheduled Zoom meeting.
Join Zoom Meeting
https://zoom.us/j/9159704974<https://www.google.com/url?q=https%3A%2F%2Fzoom.us%2Fj%2F9159704974&sa=D&us…>
Meeting ID: 915 970 4974
Hello! If TF-A for Marvell Armada 3720 platform is compiled in debug
mode then at runtime it prints following warning messages:
WARNING: BL1: cortex_a53: CPU workaround for 855873 was missing!
WARNING: BL1: cortex_a53: CPU workaround for 1530924 was missing!
These lines are not printed in non-debug mode. It is an issue?
Hi Michal,
The general security rule of thumb is, any UART `owned` by Secure world ( including EL3) should not be accessible/or controlled by Non Secure and this includes control of the clocks as well. Hence sharing of UART / management of Secure world UART clocks by Linux seems problematic to me.
There are 3 types of consoles needed in TF-A. The first one is the cold boot console, the second one is runtime console and the 3rd is crash console. The cold boot console is initially owned by Secure world as part boot process and once execution is transferred to Non Secure, the ownership of the UART also is transferred.
Regarding clock expectations, the runtime UART is always expected to be ON but then this depends on the TF-A build config as it is very rare to have any runtime logs from Secure world and hence this config may be restricted to development builds of TF-A. For the crash console, the clocks don’t need to enabled all the time and any init needed can be performed as part of plat_crash_console_init().
HTH,
Best Regards
Soby Mathew
> -----Original Message-----
> From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> On Behalf Of Michal
> Simek via TF-A
> Sent: Tuesday, June 22, 2021 2:03 PM
> To: Varun Wadekar <vwadekar(a)nvidia.com>; Michal Simek
> <michal.simek(a)xilinx.com>
> Cc: tf-a(a)lists.trustedfirmware.org
> Subject: Re: [TF-A] PL011 clock handling between TF-A and Linux
>
> Hi Varun,
>
> do you have any links to that calls in Linux clk API? I expect the same hooks
> should be added also to reset.
>
> And is TF-A informs your special firmware that for example serial driver is
> used by TF-A to increate refcount?
>
> Thanks,
> Michal
>
> On 6/22/21 2:03 PM, Varun Wadekar wrote:
> > Hi Michal,
> >
> > Tegra platforms manage clocks/resets by special firmware. The firmware
> internally manages refcount of users as you described.
> >
> > AFAIR, we placed calls to the firmware in the linux clk APIs to achieve this.
> There was an effort to leverage runtime_pm for this too.
> >
> > I think we wont be able to add guidance to TF-A for clock management as
> most of it is platform dependent. We can add a generic guideline saying that
> a certain driver expects the platform to manage the clock/reset for the IP.
> >
> > -Varun
> >
> > -----Original Message-----
> > From: Michal Simek <michal.simek(a)xilinx.com>
> > Sent: Tuesday, June 22, 2021 7:24 AM
> > To: Varun Wadekar <vwadekar(a)nvidia.com>; Michal Simek
> > <michal.simek(a)xilinx.com>
> > Cc: tf-a(a)lists.trustedfirmware.org
> > Subject: Re: [TF-A] PL011 clock handling between TF-A and Linux
> >
> > External email: Use caution opening links or attachments
> >
> >
> > Hi Varun,
> >
> > Xilinx is also managing it by special firmware. There is a concept of
> protected-clocks documented via DT binding which is used by Qualcomm.
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tr
> > ee/Documentation/devicetree/bindings/clock/clock-bindings.txt?h=next-2
> > 0210621#n172
> >
> > Are you also using this feature or simply don't let Linux know about these
> clocks at all or simulate it via fixed-clock or so?
> > Or any registration is in place that firmware keep refcount of users and
> don't let it change unless there is only one user of that clock?
> >
> > Thanks,
> > Michal
> >
> > On 6/21/21 6:41 PM, Varun Wadekar wrote:
> >> Hi Michal,
> >>
> >> AFAIK, TF-A does not publish guidelines for clocks/resets for shared IP. It
> is left to the platforms.
> >>
> >> For Tegra platforms, the clocks/reset are managed by a central entity. TF-
> A is expected to co-ordinate with this entity. Unfortunately, PL011 does not
> fall in this category and is expected to be kept on by the previous bootloader.
> >>
> >> -Varun
> >>
> >> -----Original Message-----
> >> From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> On Behalf Of
> >> Michal Simek via TF-A
> >> Sent: Monday, June 21, 2021 2:24 PM
> >> To: tf-a(a)lists.trustedfirmware.org
> >> Subject: [TF-A] PL011 clock handling between TF-A and Linux
> >>
> >> External email: Use caution opening links or attachments
> >>
> >>
> >> Hi,
> >>
> >> recently we have hit the case where Linux has pl011 driver and using it as
> a console. The same console is also used by TF-A. If you look at
> implementation details Linux pl011 driver has in pl011_console_write()
> clk_enable/clk_disable calls.
> >> I can't see any clock handling for PL011 in TF-A that's why I guess that TF-A
> expectation is that clocks are enabled and must be enabled all the time
> because pl011 is also used as crashed console.
> >> That's why I would like to check with you what's the clock expectation in
> these shared IP cases.
> >> Do you have a requirement that firmware should keep refcount of IP
> users and never disable clock when only one requires it?
> >>
> >> Thanks,
> >> Michal
> >> --
> >> TF-A mailing list
> >> TF-A(a)lists.trustedfirmware.org
> >>
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flis
> >> t
> >> s.trustedfirmware.org%2Fmailman%2Flistinfo%2Ftf-
> a&data=04%7C01%7C
> >>
> vwadekar%40nvidia.com%7C9d5af04d3aba49b18cc808d935465267%7C43083
> d1572
> >>
> 7340c1b7db39efd9ccc17a%7C0%7C0%7C637599398425726681%7CUnknown%
> 7CTWFpb
> >>
> GZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI
> 6Mn
> >>
> 0%3D%7C1000&sdata=%2BXFRPZTttom4rvT%2FmEcQnbgSa276PYuKbvo
> H4VujRk8
> >> %3D&reserved=0
> >>
> --
> TF-A mailing list
> TF-A(a)lists.trustedfirmware.org
> https://lists.trustedfirmware.org/mailman/listinfo/tf-a
Hi,
See few comments inline [OD]
Regards,
Olivier.
________________________________________
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of Varun Wadekar via TF-A <tf-a(a)lists.trustedfirmware.org>
Sent: 16 June 2021 11:41
To: tf-a(a)lists.trustedfirmware.org
Cc: Raghupathy Krishnamurthy; Nicolas Benech
Subject: [TF-A] SP manifest: avoid manual updates to "entrypoint-offset"
Hello,
We (Nico/Raghu) have been implementing SEL0 partitions for Tegra platforms
[OD] Just to be clear, is this about SEL0 partitions using an SEL1 shim (as per https://review.trustedfirmware.org/q/topic:%22db%252Fsel0%22+(status:open%2… )?
and recently hit an issue, where the “entrypoint-offset” field of the SP manifest [1] cannot cope with increasing manifest blobs. The way the SP manifest is created today, the “entrypoint-offset” field is set to a value *statically* by the implementer. Down the line if the manifest grows past the value written in the “entrypoint-offset”, we must manually update it. This needs to be fixed.
We believe there is an opportunity to upgrade the sptool to handle this situation during SP package creation, where sptool calculates the manifest size and bumps the “entrypoint-offset” past the end of the manifest. There are other ways of patching the SP manifest at runtime, but they seem sub-optimal.
Please let me know if there are other ideas to solve this problem. I will post a patch to update the sptool shortly but wanted to get the ball rolling.
[OD] We had an attempt (https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/8536) to move the entry point farther in the image such that we can support 64KB granules in the Stage-1 translation regime. This does not relate exactly to your problem but the effect is the "same" (aka there is more room for the manifest dtb). Agree this still requires hard-coding the entry point. At this stage I had thought of pushing the entry point even farther at a reasonably large 64KB aligned offset such that it helps with both problems.
Cheers.
[1] 14. FF-A manifest binding to device tree — Trusted Firmware-A documentation<https://trustedfirmware-a.readthedocs.io/en/latest/components/ffa-manifest-…>
Hi Michal,
AFAIK, TF-A does not publish guidelines for clocks/resets for shared IP. It is left to the platforms.
For Tegra platforms, the clocks/reset are managed by a central entity. TF-A is expected to co-ordinate with this entity. Unfortunately, PL011 does not fall in this category and is expected to be kept on by the previous bootloader.
-Varun
-----Original Message-----
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> On Behalf Of Michal Simek via TF-A
Sent: Monday, June 21, 2021 2:24 PM
To: tf-a(a)lists.trustedfirmware.org
Subject: [TF-A] PL011 clock handling between TF-A and Linux
External email: Use caution opening links or attachments
Hi,
recently we have hit the case where Linux has pl011 driver and using it as a console. The same console is also used by TF-A. If you look at implementation details Linux pl011 driver has in pl011_console_write() clk_enable/clk_disable calls.
I can't see any clock handling for PL011 in TF-A that's why I guess that TF-A expectation is that clocks are enabled and must be enabled all the time because pl011 is also used as crashed console.
That's why I would like to check with you what's the clock expectation in these shared IP cases.
Do you have a requirement that firmware should keep refcount of IP users and never disable clock when only one requires it?
Thanks,
Michal
--
TF-A mailing list
TF-A(a)lists.trustedfirmware.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.tru…
Hi,
recently we have hit the case where Linux has pl011 driver and using it
as a console. The same console is also used by TF-A. If you look at
implementation details Linux pl011 driver has in pl011_console_write()
clk_enable/clk_disable calls.
I can't see any clock handling for PL011 in TF-A that's why I guess that
TF-A expectation is that clocks are enabled and must be enabled all the
time because pl011 is also used as crashed console.
That's why I would like to check with you what's the clock expectation
in these shared IP cases.
Do you have a requirement that firmware should keep refcount of IP users
and never disable clock when only one requires it?
Thanks,
Michal
Hello tf experts,
I've been studying the PIE support in TF-A recently, and there is one thing
I'm confused about.
One is GOT table entry, is there any difference between this and .rela.dyn?
I have done some homework, but I didn't find the answer. If someone can
tell me, thanks a lot.
It looks like the current got segment is only 8 byte, so why must I need
this section? Which kind of code will put into this section?
Apologies we don't have any topics to present this week so I am cancelling the TF-A Tech forum for 17th June 2021.
We do however we have an exciting topic coming up for Thursday 1st July 2021 which we will share more about nearer the time.
In addition I’ll also like to promote this separate Linaro and Arm CCA Tech Event - Deep dive into Arm Confidential Compute Architecture the details of which can be found here https://www.linaro.org/events/linaro-and-arm-cca-tech-day-deep-dive-into-ar… Registration is free for this event which will begin at 14:00 UTC on June 23rd .
Thanks all.
Joanna
This event has been canceled with this note:
"Apologies we don't have any topics to present this week so I am cancelling
the Tech forum for 17th June 2021 however we have an exciting topic coming
up for Thursday 1st July 2021 which we will share near the time."
Title: TF-A Tech Forum
We run an open technical forum call for anyone to participate and it is not
restricted to Trusted Firmware project members. It will operate under the
guidance of the TF TSC. Feel free to forward this invite to
colleagues. Invites are via the TF-A mailing list and also published on the
Trusted Firmware website. Details are
here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/Tr…
Firmware is inviting you to a scheduled Zoom meeting.Join Zoom
Meetinghttps://zoom.us/j/9159704974Meeting ID: 915 970 4974One tap
mobile+16465588656,,9159704974# US (New York)+16699009128,,9159704974# US
(San Jose)Dial by your location +1 646 558
8656 US (New York) +1 669 900
9128 US (San Jose) 877 853 5247 US
Toll-free 888 788 0099 US Toll-freeMeeting ID:
915 970 4974Find your local
number: https://zoom.us/u/ad27hc6t7h
When: Thu Jun 17, 2021 4pm – 5pm United Kingdom Time
Calendar: tf-a(a)lists.trustedfirmware.org
Who:
* Bill Fletcher - creator
* marek.bykowski(a)gmail.com
* okash.khawaja(a)gmail.com
* tf-a(a)lists.trustedfirmware.org
Invitation from Google Calendar: https://calendar.google.com/calendar/
You are receiving this courtesy email at the account
tf-a(a)lists.trustedfirmware.org because you are an attendee of this event.
To stop receiving future updates for this event, decline this event.
Alternatively you can sign up for a Google account at
https://calendar.google.com/calendar/ and control your notification
settings for your entire calendar.
Forwarding this invitation could allow any recipient to send a response to
the organizer and be added to the guest list, or invite others regardless
of their own invitation status, or to modify your RSVP. Learn more at
https://support.google.com/calendar/answer/37135#forwarding
Hello,
We (Nico/Raghu) have been implementing SEL0 partitions for Tegra platforms and recently hit an issue, where the "entrypoint-offset" field of the SP manifest [1] cannot cope with increasing manifest blobs. The way the SP manifest is created today, the "entrypoint-offset" field is set to a value *statically* by the implementer. Down the line if the manifest grows past the value written in the "entrypoint-offset", we must manually update it. This needs to be fixed.
We believe there is an opportunity to upgrade the sptool to handle this situation during SP package creation, where sptool calculates the manifest size and bumps the "entrypoint-offset" past the end of the manifest. There are other ways of patching the SP manifest at runtime, but they seem sub-optimal.
Please let me know if there are other ideas to solve this problem. I will post a patch to update the sptool shortly but wanted to get the ball rolling.
Cheers.
[1] 14. FF-A manifest binding to device tree - Trusted Firmware-A documentation<https://trustedfirmware-a.readthedocs.io/en/latest/components/ffa-manifest-…>