Hi All,
Following the TF-A release planned for April, platforms will be expected to maintain their own Change Log files to document relevant changes in platform specific code. The common TF-A Change Log will no longer document Platform specific updates after the 2.3 release.
As a general reminder, it is up to the developer to document changes in common TF-A code that is relevant in the "Upcoming Change Log" file. Reviewers please continue to help determine if documentation is required for a given patch. During each code freeze for a release the documentation in the upcoming change log will be moved to the change log corresponding to the release.
Thanks,
Lauren Wehrmeister
Hello team,
This is an email requesting reviews for the latest Tegra platform changes [1] from our downstream branch.
Please review these changes at the earliest and help us get them merged before the release candidate tag is generated. We hope to push one more batch for v2.3, after [1] gets merged.
Thanks in advance.
Varun
[1] https://review.trustedfirmware.org/q/topic:%22tegra-downstream-03122020%22+…
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Hi Sumit,
On 3/4/20 4:55 PM, Sumit Garg via TF-A wrote:
>> The last remaining item would be to address the MISRA violations
>> that Coverity found, which I've copied & pasted for you on Gerrit in the
>> top patch.
>
> I have tried to address most of MISRA violations and updated the
> patch-set. But since I don't have access to Coverity tool you are
> using, so can you please check if there is any relevant MISRA
> violation that I missed?
Sure, I will re-run the tool in our internal CI and let you know the
results.
>> Also, this feature is only used on QEMU right now and I am not aware of
>> anyone trying to enable it for their platforms just yet. Thus there is a
>> risk we might have overlooked some issues that we'll discover at that time.
>
> Socionext being a silicon vendor is actively looking for this feature
> and I think they will build upon this feature to enable firmware
> encryption on their platforms to meet DRM robustness rules.
Interesting, thanks for sharing this information.
>> Furthermore, I know that you've done some testing of this feature on
>> QEMU but this is not integrated into the CI loop right now. Thus, there
>> is a risk that we might break it in the future and this will go
>> unnoticed, unless you plan to test it regularly on your end.
>
> Yeah we should plan to enable testing for this feature in CI loop.
For now, I've added in our internal CI a simple build test based on the
build instructions you've provided in the patch set. This will at least
make sure we do not break the build inadvertently in the future.
But as you say, going forward, we should plan for proper testing on
QEMU. I am hoping we will soon be able to extend the OpenCI [1] and add
this support there.
[1]
https://lists.trustedfirmware.org/pipermail/tf-a/2020-February/000264.html
>> * Saying so in the (upcoming) change log.
>
> I hope you can take care of this.
Actually this is something you have access to, it's a matter of adding a
line in docs/change-log-upcoming.rst in the TF-A source tree.
Regards,
Sandrine
Hi Everyone,
I have tried to address most of the implementation concerns with updated
patch-set [1] as follows:
*Concern*: Firmware encryption bit needs to be signed
*Address*: Moved the firmware encryption bit from FIP ToC header to
"io_uuid_spec_t" struct which is part of "plat_io_policy" that is embedded
in the boot-loader (BL1 or BL2) and hence firmware encryption bit is signed.
Also, with this implementation fip_tool is no longer aware of encryption
and just encrypted binaries are piped to fip_tool.
*Concern*: Capability to encrypt with different keys for different images
*Address*: Passed "img_id" buffer reference as an argument of
"plat_get_enc_key_info()" API. So that platforms may choose to either
provide a unique key per firmware image or just derive a key from HUK per
firmware using "img_id" buffer as a salt.
*Concern*: Coupling of FIP and encryption layer
*Address*: Firstly I think we all can agree that encryption layer provides
confidentiality protection specific to IO storage. Secondly FIP is actually
a packaging layer that sits over actual IO layer and having the encryption
layer coupled with FIP provides an abstraction layer for any FIP payload
which in turn provides the following features:
1. Allows the firmware certificates to be encrypted as well to protect
against cloning satisfying R050_TBBR_PROTECTION requirement.
2. Allows the firmware configuration data to be encrypted as well.
3. Provides a capability to have a secure key store as FIP payload which is
protected using HUK.
*Concern*: Allow usage of alternative verify-then-decrypt method
*Address*: A platform could disable this encryption layer and implement
decryption as part of "bl2_plat_handle_post_image_load()".
Please let me know in case I missed any implementation concerns and feel
free to provide your feedback on updated patch-set [1].
[1]
https://review.trustedfirmware.org/q/topic:%22tbbr%252Ffw_enc%22+(status:op…
Regards,
Sumit
Hi Masahiro,
That warning is expected. GCC complains about this, since tf_base_xlat_table is not constant and we are asking it to be put in a read-only section (see the REGISTER_XLAT_CONTEXT_RO_BASE_TABLE macro). This is fine since:
* We only want the base table to be read-only after the tables have been initialized. The only time we change tf_base_xlat_table is when we initialize it, and at that point in the platform setup sequence the MMU is off, so permissions have no effect.
* We never write to this with the MMU on (it's the level 1 translation table), so there is no danger of generating MMU faults.
I hope this answers your question.
Thanks
Petre
________________________________
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of Masahiro Yamada via TF-A <tf-a(a)lists.trustedfirmware.org>
Sent: 06 March 2020 12:30
To: tf-a(a)lists.trustedfirmware.org <tf-a(a)lists.trustedfirmware.org>
Subject: [TF-A] Incorrect section attributes with ALLOW_RO_XLAT_TABLES=1
Hi.
If I build TF-A with ALLOW_RO_XLAT_TABLES=1,
the base xlat table goes into .rodata section
instead of .bss section.
Then, I see a warning like:
/tmp/ccswitLr.s: Assembler messages:
/tmp/ccswitLr.s:297: Warning: setting incorrect section attributes for .rodata
Is this a know issue?
[Reproduce Command]
make PLAT=fvp CROSS_COMPILE=aarch64-linux-gnu- ALLOW_RO_XLAT_TABLES=1
The full build log is below:
masahiro@pug:~/ref/trusted-firmware-a$ make PLAT=fvp
CROSS_COMPILE=aarch64-linux-gnu- ALLOW_RO_XLAT_TABLES=1
CC lib/libfdt/fdt.c
CC lib/libfdt/fdt_addresses.c
CC lib/libfdt/fdt_empty_tree.c
CC lib/libfdt/fdt_ro.c
CC lib/libfdt/fdt_rw.c
CC lib/libfdt/fdt_strerror.c
CC lib/libfdt/fdt_sw.c
CC lib/libfdt/fdt_wip.c
AR build/fvp/release/lib/libfdt.a
Building fvp
CC lib/libc/abort.c
CC lib/libc/assert.c
CC lib/libc/exit.c
CC lib/libc/memchr.c
CC lib/libc/memcmp.c
CC lib/libc/memcpy.c
CC lib/libc/memmove.c
CC lib/libc/memrchr.c
CC lib/libc/memset.c
CC lib/libc/printf.c
CC lib/libc/putchar.c
CC lib/libc/puts.c
CC lib/libc/snprintf.c
CC lib/libc/strchr.c
CC lib/libc/strcmp.c
CC lib/libc/strlcpy.c
CC lib/libc/strlen.c
CC lib/libc/strncmp.c
CC lib/libc/strnlen.c
CC lib/libc/strrchr.c
AS lib/libc/aarch64/setjmp.S
AR build/fvp/release/lib/libc.a
CC drivers/arm/smmu/smmu_v3.c
CC drivers/arm/sp805/sp805.c
CC drivers/delay_timer/delay_timer.c
CC drivers/io/io_semihosting.c
CC lib/semihosting/semihosting.c
CC plat/arm/board/fvp/fvp_bl1_setup.c
CC plat/arm/board/fvp/fvp_err.c
CC plat/arm/board/fvp/fvp_io_storage.c
CC drivers/arm/cci/cci.c
CC drivers/delay_timer/generic_delay_timer.c
CC drivers/cfi/v2m/v2m_flash.c
CC drivers/io/io_fip.c
CC drivers/io/io_memmap.c
CC drivers/io/io_storage.c
CC plat/arm/common/arm_bl1_setup.c
CC plat/arm/common/arm_err.c
CC plat/arm/common/arm_fconf_io_storage.c
CC plat/arm/common/fconf/arm_fconf_io.c
CC lib/fconf/fconf.c
CC lib/fconf/fconf_dyn_cfg_getter.c
CC plat/arm/common/arm_dyn_cfg.c
CC plat/arm/common/arm_dyn_cfg_helpers.c
CC common/fdt_wrappers.c
CC bl1/bl1_main.c
CC bl1/aarch64/bl1_arch_setup.c
CC bl1/aarch64/bl1_context_mgmt.c
CC lib/cpus/errata_report.c
CC lib/el3_runtime/aarch64/context_mgmt.c
CC plat/common/plat_bl1_common.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS lib/semihosting/aarch64/semihosting_call.S
AS plat/arm/board/fvp/aarch64/fvp_helpers.S
AS lib/cpus/aarch64/aem_generic.S
AS lib/cpus/aarch64/cortex_a35.S
AS lib/cpus/aarch64/cortex_a53.S
AS lib/cpus/aarch64/cortex_a57.S
AS lib/cpus/aarch64/cortex_a72.S
AS lib/cpus/aarch64/cortex_a73.S
AS bl1/aarch64/bl1_entrypoint.S
AS bl1/aarch64/bl1_exceptions.S
AS lib/cpus/aarch64/cpu_helpers.S
AS plat/common/aarch64/platform_up_stack.S
AS lib/cpus/aarch64/dsu_helpers.S
AS lib/el3_runtime/aarch64/context.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl1/bl1.ld.S
LD build/fvp/release/bl1/bl1.elf
BIN build/fvp/release/bl1.bin
Built build/fvp/release/bl1.bin successfully
OD build/fvp/release/bl1/bl1.dump
CC drivers/arm/sp805/sp805.c
CC drivers/io/io_semihosting.c
CC lib/utils/mem_region.c
CC lib/semihosting/semihosting.c
CC plat/arm/board/fvp/fvp_bl2_setup.c
CC plat/arm/board/fvp/fvp_err.c
CC plat/arm/board/fvp/fvp_io_storage.c
CC plat/arm/common/arm_nor_psci_mem_protect.c
CC drivers/arm/tzc/tzc400.c
CC plat/arm/board/fvp/fvp_security.c
CC plat/arm/common/arm_tzc400.c
CC drivers/cfi/v2m/v2m_flash.c
CC drivers/delay_timer/delay_timer.c
CC drivers/delay_timer/generic_delay_timer.c
CC drivers/io/io_fip.c
CC drivers/io/io_memmap.c
CC drivers/io/io_storage.c
CC plat/arm/common/arm_bl2_setup.c
CC plat/arm/common/arm_err.c
CC plat/arm/common/arm_fconf_io_storage.c
CC plat/arm/common/fconf/arm_fconf_io.c
CC lib/fconf/fconf.c
CC lib/fconf/fconf_dyn_cfg_getter.c
CC plat/arm/common/arm_dyn_cfg.c
CC plat/arm/common/arm_dyn_cfg_helpers.c
CC common/fdt_wrappers.c
CC plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
CC plat/arm/common/arm_image_load.c
CC common/desc_image_load.c
CC bl2/bl2_image_load_v2.c
CC bl2/bl2_main.c
CC bl2/aarch64/bl2_arch_setup.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS lib/semihosting/aarch64/semihosting_call.S
AS lib/locks/exclusive/aarch64/spinlock.S
AS plat/common/aarch64/platform_up_stack.S
AS common/aarch64/early_exceptions.S
AS bl2/aarch64/bl2_entrypoint.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl2/bl2.ld.S
LD build/fvp/release/bl2/bl2.elf
BIN build/fvp/release/bl2.bin
Built build/fvp/release/bl2.bin successfully
OD build/fvp/release/bl2/bl2.dump
CC drivers/arm/fvp/fvp_pwrc.c
CC drivers/arm/smmu/smmu_v3.c
CC drivers/delay_timer/delay_timer.c
CC drivers/cfi/v2m/v2m_flash.c
CC lib/utils/mem_region.c
CC plat/arm/board/fvp/fvp_bl31_setup.c
CC plat/arm/board/fvp/fvp_pm.c
CC plat/arm/board/fvp/fvp_topology.c
CC plat/arm/common/arm_nor_psci_mem_protect.c
CC drivers/arm/gic/common/gic_common.c
CC drivers/arm/gic/v3/gicv3_main.c
CC drivers/arm/gic/v3/gicv3_helpers.c
CC plat/common/plat_gicv3.c
CC plat/arm/common/arm_gicv3.c
CC drivers/arm/gic/v3/gic500.c
CC drivers/arm/cci/cci.c
CC drivers/arm/tzc/tzc400.c
CC plat/arm/board/fvp/fvp_security.c
CC plat/arm/common/arm_tzc400.c
CC drivers/delay_timer/generic_delay_timer.c
CC lib/cpus/aarch64/cpuamu.c
CC plat/arm/common/arm_bl31_setup.c
CC plat/arm/common/arm_pm.c
CC plat/arm/common/arm_topology.c
CC plat/common/plat_psci_common.c
CC plat/arm/common/aarch64/execution_state_switch.c
CC plat/arm/common/arm_sip_svc.c
CC lib/pmf/pmf_smc.c
CC bl31/bl31_main.c
CC bl31/interrupt_mgmt.c
CC bl31/bl31_context_mgmt.c
CC common/runtime_svc.c
CC services/arm_arch_svc/arm_arch_svc_setup.c
CC services/std_svc/std_svc_setup.c
CC lib/el3_runtime/cpu_data_array.c
CC lib/el3_runtime/aarch64/context_mgmt.c
CC lib/cpus/errata_report.c
CC lib/psci/psci_off.c
CC lib/psci/psci_on.c
CC lib/psci/psci_suspend.c
CC lib/psci/psci_common.c
CC lib/psci/psci_main.c
CC lib/psci/psci_setup.c
CC lib/psci/psci_system_off.c
CC lib/psci/psci_mem_protect.c
CC lib/locks/bakery/bakery_lock_coherent.c
CC lib/psci/psci_stat.c
CC lib/pmf/pmf_main.c
CC lib/extensions/spe/spe.c
CC lib/extensions/amu/aarch64/amu.c
CC lib/extensions/sve/sve.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
/tmp/ccswitLr.s: Assembler messages:
/tmp/ccswitLr.s:297: Warning: setting incorrect section attributes for .rodata
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS plat/arm/board/fvp/aarch64/fvp_helpers.S
AS lib/cpus/aarch64/aem_generic.S
AS lib/cpus/aarch64/cortex_a35.S
AS lib/cpus/aarch64/cortex_a53.S
AS lib/cpus/aarch64/cortex_a57.S
AS lib/cpus/aarch64/cortex_a72.S
AS lib/cpus/aarch64/cortex_a73.S
AS lib/cpus/aarch64/cpuamu_helpers.S
AS bl31/aarch64/bl31_entrypoint.S
AS bl31/aarch64/crash_reporting.S
AS bl31/aarch64/ea_delegate.S
AS bl31/aarch64/runtime_exceptions.S
AS lib/cpus/aarch64/dsu_helpers.S
AS plat/common/aarch64/platform_mp_stack.S
AS lib/el3_runtime/aarch64/cpu_data.S
AS lib/cpus/aarch64/cpu_helpers.S
AS lib/locks/exclusive/aarch64/spinlock.S
AS lib/psci/aarch64/psci_helpers.S
AS lib/el3_runtime/aarch64/context.S
AS lib/extensions/amu/aarch64/amu_helpers.S
AS lib/cpus/aarch64/wa_cve_2017_5715_bpiall.S
AS lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl31/bl31.ld.S
LD build/fvp/release/bl31/bl31.elf
BIN build/fvp/release/bl31.bin
Built build/fvp/release/bl31.bin successfully
OD build/fvp/release/bl31/bl31.dump
CC plat/arm/board/fvp/fvp_bl2u_setup.c
CC drivers/arm/tzc/tzc400.c
CC plat/arm/board/fvp/fvp_security.c
CC plat/arm/common/arm_tzc400.c
CC drivers/delay_timer/delay_timer.c
CC drivers/delay_timer/generic_delay_timer.c
CC plat/arm/common/arm_bl2u_setup.c
CC bl2u/bl2u_main.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS bl2u/aarch64/bl2u_entrypoint.S
AS plat/common/aarch64/platform_up_stack.S
AS common/aarch64/early_exceptions.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl2u/bl2u.ld.S
LD build/fvp/release/bl2u/bl2u.elf
BIN build/fvp/release/bl2u.bin
Built build/fvp/release/bl2u.bin successfully
OD build/fvp/release/bl2u/bl2u.dump
CPP plat/arm/board/fvp/fdts/fvp_fw_config.dts
DTC plat/arm/board/fvp/fdts/fvp_fw_config.dts
CPP plat/arm/board/fvp/fdts/fvp_soc_fw_config.dts
DTC plat/arm/board/fvp/fdts/fvp_soc_fw_config.dts
CPP plat/arm/board/fvp/fdts/fvp_nt_fw_config.dts
DTC plat/arm/board/fvp/fdts/fvp_nt_fw_config.dts
CPP fdts/fvp-base-gicv3-psci.dts
DTC fdts/fvp-base-gicv3-psci.dts
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:215.20-220.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/flash@0,00000000:
simple-bus unit address format error, expected "0"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:221.19-224.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/vram@2,00000000:
simple-bus unit address format error, expected "200000000"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:225.23-229.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/ethernet@2,02000000:
simple-bus unit address format error, expected "202000000"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:230.26-235.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/clk24mhz: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:236.30-241.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/refclk1mhz: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:242.32-247.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/refclk32khz: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:248.21-370.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/iofpga@3,00000000:
simple-bus unit address format error, expected "300000000"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:371.33-377.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/fixedregulator: missing
or empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:381.21-387.6:
Warning (simple_bus_reg): /smb@0,0/motherboard/mcc/osc: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:388.12-391.6:
Warning (simple_bus_reg): /smb@0,0/motherboard/mcc/muxfpga: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:392.12-395.6:
Warning (simple_bus_reg): /smb@0,0/motherboard/mcc/dvimode: missing or
empty reg/ranges property
--
Best Regards
Masahiro Yamada
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Hi.
If I build TF-A with ALLOW_RO_XLAT_TABLES=1,
the base xlat table goes into .rodata section
instead of .bss section.
Then, I see a warning like:
/tmp/ccswitLr.s: Assembler messages:
/tmp/ccswitLr.s:297: Warning: setting incorrect section attributes for .rodata
Is this a know issue?
[Reproduce Command]
make PLAT=fvp CROSS_COMPILE=aarch64-linux-gnu- ALLOW_RO_XLAT_TABLES=1
The full build log is below:
masahiro@pug:~/ref/trusted-firmware-a$ make PLAT=fvp
CROSS_COMPILE=aarch64-linux-gnu- ALLOW_RO_XLAT_TABLES=1
CC lib/libfdt/fdt.c
CC lib/libfdt/fdt_addresses.c
CC lib/libfdt/fdt_empty_tree.c
CC lib/libfdt/fdt_ro.c
CC lib/libfdt/fdt_rw.c
CC lib/libfdt/fdt_strerror.c
CC lib/libfdt/fdt_sw.c
CC lib/libfdt/fdt_wip.c
AR build/fvp/release/lib/libfdt.a
Building fvp
CC lib/libc/abort.c
CC lib/libc/assert.c
CC lib/libc/exit.c
CC lib/libc/memchr.c
CC lib/libc/memcmp.c
CC lib/libc/memcpy.c
CC lib/libc/memmove.c
CC lib/libc/memrchr.c
CC lib/libc/memset.c
CC lib/libc/printf.c
CC lib/libc/putchar.c
CC lib/libc/puts.c
CC lib/libc/snprintf.c
CC lib/libc/strchr.c
CC lib/libc/strcmp.c
CC lib/libc/strlcpy.c
CC lib/libc/strlen.c
CC lib/libc/strncmp.c
CC lib/libc/strnlen.c
CC lib/libc/strrchr.c
AS lib/libc/aarch64/setjmp.S
AR build/fvp/release/lib/libc.a
CC drivers/arm/smmu/smmu_v3.c
CC drivers/arm/sp805/sp805.c
CC drivers/delay_timer/delay_timer.c
CC drivers/io/io_semihosting.c
CC lib/semihosting/semihosting.c
CC plat/arm/board/fvp/fvp_bl1_setup.c
CC plat/arm/board/fvp/fvp_err.c
CC plat/arm/board/fvp/fvp_io_storage.c
CC drivers/arm/cci/cci.c
CC drivers/delay_timer/generic_delay_timer.c
CC drivers/cfi/v2m/v2m_flash.c
CC drivers/io/io_fip.c
CC drivers/io/io_memmap.c
CC drivers/io/io_storage.c
CC plat/arm/common/arm_bl1_setup.c
CC plat/arm/common/arm_err.c
CC plat/arm/common/arm_fconf_io_storage.c
CC plat/arm/common/fconf/arm_fconf_io.c
CC lib/fconf/fconf.c
CC lib/fconf/fconf_dyn_cfg_getter.c
CC plat/arm/common/arm_dyn_cfg.c
CC plat/arm/common/arm_dyn_cfg_helpers.c
CC common/fdt_wrappers.c
CC bl1/bl1_main.c
CC bl1/aarch64/bl1_arch_setup.c
CC bl1/aarch64/bl1_context_mgmt.c
CC lib/cpus/errata_report.c
CC lib/el3_runtime/aarch64/context_mgmt.c
CC plat/common/plat_bl1_common.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS lib/semihosting/aarch64/semihosting_call.S
AS plat/arm/board/fvp/aarch64/fvp_helpers.S
AS lib/cpus/aarch64/aem_generic.S
AS lib/cpus/aarch64/cortex_a35.S
AS lib/cpus/aarch64/cortex_a53.S
AS lib/cpus/aarch64/cortex_a57.S
AS lib/cpus/aarch64/cortex_a72.S
AS lib/cpus/aarch64/cortex_a73.S
AS bl1/aarch64/bl1_entrypoint.S
AS bl1/aarch64/bl1_exceptions.S
AS lib/cpus/aarch64/cpu_helpers.S
AS plat/common/aarch64/platform_up_stack.S
AS lib/cpus/aarch64/dsu_helpers.S
AS lib/el3_runtime/aarch64/context.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl1/bl1.ld.S
LD build/fvp/release/bl1/bl1.elf
BIN build/fvp/release/bl1.bin
Built build/fvp/release/bl1.bin successfully
OD build/fvp/release/bl1/bl1.dump
CC drivers/arm/sp805/sp805.c
CC drivers/io/io_semihosting.c
CC lib/utils/mem_region.c
CC lib/semihosting/semihosting.c
CC plat/arm/board/fvp/fvp_bl2_setup.c
CC plat/arm/board/fvp/fvp_err.c
CC plat/arm/board/fvp/fvp_io_storage.c
CC plat/arm/common/arm_nor_psci_mem_protect.c
CC drivers/arm/tzc/tzc400.c
CC plat/arm/board/fvp/fvp_security.c
CC plat/arm/common/arm_tzc400.c
CC drivers/cfi/v2m/v2m_flash.c
CC drivers/delay_timer/delay_timer.c
CC drivers/delay_timer/generic_delay_timer.c
CC drivers/io/io_fip.c
CC drivers/io/io_memmap.c
CC drivers/io/io_storage.c
CC plat/arm/common/arm_bl2_setup.c
CC plat/arm/common/arm_err.c
CC plat/arm/common/arm_fconf_io_storage.c
CC plat/arm/common/fconf/arm_fconf_io.c
CC lib/fconf/fconf.c
CC lib/fconf/fconf_dyn_cfg_getter.c
CC plat/arm/common/arm_dyn_cfg.c
CC plat/arm/common/arm_dyn_cfg_helpers.c
CC common/fdt_wrappers.c
CC plat/arm/common/aarch64/arm_bl2_mem_params_desc.c
CC plat/arm/common/arm_image_load.c
CC common/desc_image_load.c
CC bl2/bl2_image_load_v2.c
CC bl2/bl2_main.c
CC bl2/aarch64/bl2_arch_setup.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS lib/semihosting/aarch64/semihosting_call.S
AS lib/locks/exclusive/aarch64/spinlock.S
AS plat/common/aarch64/platform_up_stack.S
AS common/aarch64/early_exceptions.S
AS bl2/aarch64/bl2_entrypoint.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl2/bl2.ld.S
LD build/fvp/release/bl2/bl2.elf
BIN build/fvp/release/bl2.bin
Built build/fvp/release/bl2.bin successfully
OD build/fvp/release/bl2/bl2.dump
CC drivers/arm/fvp/fvp_pwrc.c
CC drivers/arm/smmu/smmu_v3.c
CC drivers/delay_timer/delay_timer.c
CC drivers/cfi/v2m/v2m_flash.c
CC lib/utils/mem_region.c
CC plat/arm/board/fvp/fvp_bl31_setup.c
CC plat/arm/board/fvp/fvp_pm.c
CC plat/arm/board/fvp/fvp_topology.c
CC plat/arm/common/arm_nor_psci_mem_protect.c
CC drivers/arm/gic/common/gic_common.c
CC drivers/arm/gic/v3/gicv3_main.c
CC drivers/arm/gic/v3/gicv3_helpers.c
CC plat/common/plat_gicv3.c
CC plat/arm/common/arm_gicv3.c
CC drivers/arm/gic/v3/gic500.c
CC drivers/arm/cci/cci.c
CC drivers/arm/tzc/tzc400.c
CC plat/arm/board/fvp/fvp_security.c
CC plat/arm/common/arm_tzc400.c
CC drivers/delay_timer/generic_delay_timer.c
CC lib/cpus/aarch64/cpuamu.c
CC plat/arm/common/arm_bl31_setup.c
CC plat/arm/common/arm_pm.c
CC plat/arm/common/arm_topology.c
CC plat/common/plat_psci_common.c
CC plat/arm/common/aarch64/execution_state_switch.c
CC plat/arm/common/arm_sip_svc.c
CC lib/pmf/pmf_smc.c
CC bl31/bl31_main.c
CC bl31/interrupt_mgmt.c
CC bl31/bl31_context_mgmt.c
CC common/runtime_svc.c
CC services/arm_arch_svc/arm_arch_svc_setup.c
CC services/std_svc/std_svc_setup.c
CC lib/el3_runtime/cpu_data_array.c
CC lib/el3_runtime/aarch64/context_mgmt.c
CC lib/cpus/errata_report.c
CC lib/psci/psci_off.c
CC lib/psci/psci_on.c
CC lib/psci/psci_suspend.c
CC lib/psci/psci_common.c
CC lib/psci/psci_main.c
CC lib/psci/psci_setup.c
CC lib/psci/psci_system_off.c
CC lib/psci/psci_mem_protect.c
CC lib/locks/bakery/bakery_lock_coherent.c
CC lib/psci/psci_stat.c
CC lib/pmf/pmf_main.c
CC lib/extensions/spe/spe.c
CC lib/extensions/amu/aarch64/amu.c
CC lib/extensions/sve/sve.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
/tmp/ccswitLr.s: Assembler messages:
/tmp/ccswitLr.s:297: Warning: setting incorrect section attributes for .rodata
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS plat/arm/board/fvp/aarch64/fvp_helpers.S
AS lib/cpus/aarch64/aem_generic.S
AS lib/cpus/aarch64/cortex_a35.S
AS lib/cpus/aarch64/cortex_a53.S
AS lib/cpus/aarch64/cortex_a57.S
AS lib/cpus/aarch64/cortex_a72.S
AS lib/cpus/aarch64/cortex_a73.S
AS lib/cpus/aarch64/cpuamu_helpers.S
AS bl31/aarch64/bl31_entrypoint.S
AS bl31/aarch64/crash_reporting.S
AS bl31/aarch64/ea_delegate.S
AS bl31/aarch64/runtime_exceptions.S
AS lib/cpus/aarch64/dsu_helpers.S
AS plat/common/aarch64/platform_mp_stack.S
AS lib/el3_runtime/aarch64/cpu_data.S
AS lib/cpus/aarch64/cpu_helpers.S
AS lib/locks/exclusive/aarch64/spinlock.S
AS lib/psci/aarch64/psci_helpers.S
AS lib/el3_runtime/aarch64/context.S
AS lib/extensions/amu/aarch64/amu_helpers.S
AS lib/cpus/aarch64/wa_cve_2017_5715_bpiall.S
AS lib/cpus/aarch64/wa_cve_2017_5715_mmu.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl31/bl31.ld.S
LD build/fvp/release/bl31/bl31.elf
BIN build/fvp/release/bl31.bin
Built build/fvp/release/bl31.bin successfully
OD build/fvp/release/bl31/bl31.dump
CC plat/arm/board/fvp/fvp_bl2u_setup.c
CC drivers/arm/tzc/tzc400.c
CC plat/arm/board/fvp/fvp_security.c
CC plat/arm/common/arm_tzc400.c
CC drivers/delay_timer/delay_timer.c
CC drivers/delay_timer/generic_delay_timer.c
CC plat/arm/common/arm_bl2u_setup.c
CC bl2u/bl2u_main.c
CC common/bl_common.c
CC common/tf_log.c
CC drivers/console/multi_console.c
CC plat/common/plat_bl_common.c
CC plat/common/plat_log_common.c
CC plat/common/aarch64/plat_common.c
CC lib/compiler-rt/builtins/popcountdi2.c
CC lib/compiler-rt/builtins/popcountsi2.c
CC plat/arm/board/fvp/fvp_common.c
CC plat/arm/common/arm_common.c
CC plat/arm/common/arm_console.c
CC lib/xlat_tables_v2/aarch64/xlat_tables_arch.c
CC lib/xlat_tables_v2/xlat_tables_context.c
CC lib/xlat_tables_v2/xlat_tables_core.c
CC lib/xlat_tables_v2/xlat_tables_utils.c
AS bl2u/aarch64/bl2u_entrypoint.S
AS plat/common/aarch64/platform_up_stack.S
AS common/aarch64/early_exceptions.S
AS common/aarch64/debug.S
AS lib/aarch64/cache_helpers.S
AS lib/aarch64/misc_helpers.S
AS plat/common/aarch64/platform_helpers.S
AS drivers/arm/pl011/aarch64/pl011_console.S
AS plat/arm/board/common/aarch64/board_arm_helpers.S
AS plat/arm/common/aarch64/arm_helpers.S
AS lib/xlat_tables_v2/aarch64/enable_mmu.S
PP bl2u/bl2u.ld.S
LD build/fvp/release/bl2u/bl2u.elf
BIN build/fvp/release/bl2u.bin
Built build/fvp/release/bl2u.bin successfully
OD build/fvp/release/bl2u/bl2u.dump
CPP plat/arm/board/fvp/fdts/fvp_fw_config.dts
DTC plat/arm/board/fvp/fdts/fvp_fw_config.dts
CPP plat/arm/board/fvp/fdts/fvp_soc_fw_config.dts
DTC plat/arm/board/fvp/fdts/fvp_soc_fw_config.dts
CPP plat/arm/board/fvp/fdts/fvp_nt_fw_config.dts
DTC plat/arm/board/fvp/fdts/fvp_nt_fw_config.dts
CPP fdts/fvp-base-gicv3-psci.dts
DTC fdts/fvp-base-gicv3-psci.dts
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:215.20-220.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/flash@0,00000000:
simple-bus unit address format error, expected "0"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:221.19-224.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/vram@2,00000000:
simple-bus unit address format error, expected "200000000"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:225.23-229.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/ethernet@2,02000000:
simple-bus unit address format error, expected "202000000"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:230.26-235.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/clk24mhz: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:236.30-241.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/refclk1mhz: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:242.32-247.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/refclk32khz: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:248.21-370.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/iofpga@3,00000000:
simple-bus unit address format error, expected "300000000"
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:371.33-377.5:
Warning (simple_bus_reg): /smb@0,0/motherboard/fixedregulator: missing
or empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:381.21-387.6:
Warning (simple_bus_reg): /smb@0,0/motherboard/mcc/osc: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:388.12-391.6:
Warning (simple_bus_reg): /smb@0,0/motherboard/mcc/muxfpga: missing or
empty reg/ranges property
./build/fvp/release/fdts/fvp-base-gicv3-psci.pre.dts:392.12-395.6:
Warning (simple_bus_reg): /smb@0,0/motherboard/mcc/dvimode: missing or
empty reg/ranges property
--
Best Regards
Masahiro Yamada
Hi All,
I’ll be running the TF-A Tech Forum next week and I wanted to give an idea of what to expect in this inaugural meeting.
While in future meetings I will want to seek input of what the agenda will be before the meeting with the option for other project contributors to present on topics in this first one I have a set agenda which is influenced by the format used in the counterpart TF-M Tech Forum.
Agenda:
* Introduction to the TF-A Technical Forum Meeting
* Technical Overview of the Debug-FS Feature
* Optional TF-A Mailing List Topic Discussions
Thanks
Joanna
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of Bill Fletcher via TF-A <tf-a(a)lists.trustedfirmware.org>
Reply to: Bill Fletcher <bill.fletcher(a)linaro.org>
Date: Friday, 28 February 2020 at 15:25
To: <tf-a(a)lists.trustedfirmware.org>
Subject: [TF-A] Updated invitation: TF-A Tech Forum @ Thu 12 Mar 2020 17:00 - 18:00 (GMT) (tf-a(a)lists.trustedfirmware.org)
This event has been changed.
TF-A Tech Forum
When
Thu 12 Mar 2020 17:00 – 18:00 United Kingdom Time
Calendar
tf-a(a)lists.trustedfirmware.org
Who
(Guest list has been hidden at organiser's request)
more details »<https://www.google.com/calendar/event?action=VIEW&eid=MGVhNDdsMGVqNnEzZ3BpY…>
Changed:
We are starting an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC.
Feel free to forward this invite to colleagues. Future invites will be via the TF-A mailing list and also published on the Trusted Firmware website. Details are here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/<https://www.google.com/url?q=https%3A%2F%2Fwww.trustedfirmware.org%2Fmeetin…>
Trusted Firmware is inviting you to a scheduled Zoom meeting.
Join Zoom Meeting
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Meeting ID: 915 970 4974
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(updated due to content filtering issues)
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IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Hello,
I'm preparing a set of patches for GICv3 driver for GICv3.1 and GICv4 support.
Please review and provide your comments for the 1st patch which separates GICD and GICR accessor functions and adds new macros for GICv3 registers access.
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/3550
Regards.
Alexei
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.