Hi all,
I am working on integrating our IP(PUFcc) into TF-Mv2.1.0, with the PUFcc located at address 0x51700000.
The PUFcc can be access on bl2 stage, however, it cannot be access on booting tf-m stage.
The exception log as below:
[cid:image002.png@01DAEFC7.96FE4EB0]FATAL ERROR: HardFault
Here is some context for the exception:
EXC_RETURN (LR): 0xFFFFFFF1
Exception came from secure FW in handler mode.
xPSR: 0x00000003
MSP: 0x31000B18
PSP: 0x31000BF8
MSP_NS: 0xFFFFFFFC
PSP_NS: 0xFFFFFFFC
Exception frame at: 0x31000B18
R0: 0x31000B60
R1: 0x00000000
R2: 0x0000001B
R3: 0x00000002
R12: 0x00000000
LR: 0x38009EF7
PC: 0x3800AB02
xPSR: 0x6100000B
Callee saved register state: R4: 0xFFFFFFF9
R5: 0x31000B60
R6: 0x00000002
R7: 0x00000002
R8: 0x38030F24
R9: 0x0000001B
R10: 0x00000011
R11: 0x38030F11
CFSR: 0x00008200
BFSR: 0x00000082
BFAR: 0x00000004
MMFSR: 0x00000000
MMFAR: Not Valid
UFSR: 0x00000000
HFSR: 0x40000000
SFSR: 0x00000000
SFAR: Not Valid
The diff patch as below:
[cid:image003.png@01DAEFC7.96FE4EB0]--- a/secure_fw/spm/core/main.c
+++ b/secure_fw/spm/core/main.c
@@ -56,6 +56,9 @@ static fih_int tfm_core_init(void)
*/
SPMLOG_INFMSG("\033[1;34mBooting TF-M "VERSION_FULLSTR"\033[0m\r\n");
+ uint32_t* p_s = (uint32_t *)0x51700000;
+ printf("p_s = %08x\n", (uint32_t)*p_s);
Could you provide any suggestions on this issue?
Best regards,
Mark Chen
Research & Development Division II
PUFsecurity Corporation
Tel: 886-3-5601010 ext. 3110
Fax: 886-3-5601177
Email: mark(a)pufsecurity.com<mailto:mark@pufsecurity.com>
[cid:image001.png@01DAEFC5.FD4AE270]
From: Andy Chen <andychen(a)pufsecurity.com<mailto:andychen@pufsecurity.com>>
Sent: Thursday, August 1, 2024 12:12 AM
To: Anton Komlev <Anton.Komlev(a)arm.com<mailto:Anton.Komlev@arm.com>>
Cc: Randy Liu <randyliu(a)pufsecurity.com<mailto:randyliu@pufsecurity.com>>; Victor Huang <victor(a)pufsecurity.com<mailto:victor@pufsecurity.com>>; Neil Chen <neilchen(a)pufsecurity.com<mailto:neilchen@pufsecurity.com>>; Antonio De Angelis <Antonio.DeAngelis(a)arm.com<mailto:Antonio.DeAngelis@arm.com>>; Shebu Varghese Kuriakose <Shebu.VargheseKuriakose(a)arm.com<mailto:Shebu.VargheseKuriakose@arm.com>>
Subject: Re: [Technical Loop] PSA Crypto API with PUFcc on the TF-M platform
Hi Anton,
Thank you and enjoy your time!!!
Best,
Andy
________________________________
寄件者: Anton Komlev <Anton.Komlev(a)arm.com<mailto:Anton.Komlev@arm.com>>
寄件日期: Wednesday, July 31, 2024 11:34:48 PM
收件者: Andy Chen <andychen(a)pufsecurity.com<mailto:andychen@pufsecurity.com>>
副本: Randy Liu <randyliu(a)pufsecurity.com<mailto:randyliu@pufsecurity.com>>; Victor Huang <victor(a)pufsecurity.com<mailto:victor@pufsecurity.com>>; Neil Chen <neilchen(a)pufsecurity.com<mailto:neilchen@pufsecurity.com>>; Antonio De Angelis <Antonio.DeAngelis(a)arm.com<mailto:Antonio.DeAngelis@arm.com>>; Shebu Varghese Kuriakose <Shebu.VargheseKuriakose(a)arm.com<mailto:Shebu.VargheseKuriakose@arm.com>>
主旨: RE: [Technical Loop] PSA Crypto API with PUFcc on the TF-M platform
HI Andy,
Great to hear good news.
I will be in annual leave from tomorrow, Aug 1st, but Antonio (coped) could help you and can redirect the possible questions to appropriate team members.
With the occasion, I would appreciate if your team evaluates and follows TF-M documentation and gives us feedback on possible confusion or missing information.
Best regards,
Anton
From: Andy Chen <andychen(a)pufsecurity.com<mailto:andychen@pufsecurity.com>>
Sent: Wednesday, July 31, 2024 3:26 PM
To: Anton Komlev <Anton.Komlev(a)arm.com<mailto:Anton.Komlev@arm.com>>
Cc: Randy Liu <randyliu(a)pufsecurity.com<mailto:randyliu@pufsecurity.com>>; Victor Huang <victor(a)pufsecurity.com<mailto:victor@pufsecurity.com>>; Neil Chen <neilchen(a)pufsecurity.com<mailto:neilchen@pufsecurity.com>>
Subject: [Technical Loop] PSA Crypto API with PUFcc on the TF-M platform
#Set a new mail loop
Hi Anton,
We set a kick-off meeting of "PSA Crypto API with PUFcc on the TF-M platform" this week.
• TF-M v2.1.0
• PSA Crypto API - v1.2.1
• PSA Certified APIs Architecture Test Suite - v1.6
• MPS3 with AN552
Randy, Victor, and Neil are members of this project.
We would have many issues when developing that need your help to solve it.
Please feel free to add your teams. Let's make the project successful.
Thank you very much.
Have a Nice Day,
Andy
[cid:image001.png@01DAEFC5.FD4AE270]
熵碼科技股份有限公司
Tel: 886-3-5601010 #2119
Email: andychen(a)pufsecurity.com<mailto:andychen@pufsecurity.com>
Website: https://www.pufsecurity.com/
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Hello,
We noticed that build of TF-M for CM33 platform generates ELF file for which architecture is armv3m. Step to reproduce:
1. Build TF-M secure image for CM33 platform with armclang (used 6.19).
2. Use arm-none-eabi-objdump provided with arm-gnu-toolchain-11.3.rel1-mingw-w64-i686-arm-none-eabi to print headers:
* arm-none-eabi-objdump -x tfm_s.axf
You will see following output:
tfm_s.axf
architecture: armv3m, flags 0x00000012:
EXEC_P, HAS_SYMS
While fromelf (from armclang) prints following:
========================================================================
** ELF Header Information
File Name: tfm_s.axf
Machine class: ELFCLASS32 (32-bit)
Data encoding: ELFDATA2LSB (Little endian)
Header version: EV_CURRENT (Current version)
Operating System ABI: none
ABI Version: 0
File Type: ET_EXEC (Executable) (2)
Machine: EM_ARM (ARM)
Image Entry point: 0x16004319
Flags: EF_ARM_HASENTRY + EF_ARM_ABI_FLOAT_HARD (0x05000402)
ARM ELF revision: 5 (ABI version 2)
Is't expected? Because we have problems with debugging images generated by armclang in eclipse with gdb.
Regards,
Roman.
Hi all,
I have pushed for review a change to improve the TF-M linker scripts / scatter files: https://review.trustedfirmware.org/c/TF-M/trusted-firmware-m/+/30316
There are two ideas behind the change:
* Merge the isolation level 3 features from the tfm_isolation_l3 linker files into tfm_common_s, so that one linker file can support all TF-M isolation levels.
* Group the memory by its desired memory protection attribute as far as possible, so that as much of the memory map as possible can be covered by MPU regions to restrict the attributes to no more than needed. The main advantage of this is to reduce how much of the memory is executable.
There are more details in the commit message.
Since it could be a disruptive change, the new linker files are added in addition to the existing tfm_common_s.sct/ld/icf and tfm_isolation_l3.sct/ld/icf ones and only platforms that are already using the common tfm_hal_isolation_v8m.c are switched over for now. But the idea is that platforms can gradually migrate and eventually the existing linker files can be removed.
Kind regards,
Jamie
