On Thursday 11 November 2021 18:26:12 Bipin Ravi wrote:
Hi Pali,
Please find the reply inline below.
--Bipin
-----Original Message----- From: Pali Rohár pali@kernel.org Sent: Tuesday, October 5, 2021 9:24 AM To: Bipin Ravi Bipin.Ravi@arm.com Cc: Joanna Farley Joanna.Farley@arm.com; Konstantin Porotchkin kostap@marvell.com; Olivier Deprez Olivier.Deprez@arm.com; tf-a@lists.trustedfirmware.org; Marek Behún marek.behun@nic.cz Subject: Re: [TF-A] A53 errata 855873 on Marvell Armada 3720 (Was: Re: Missing CPU workaround warning message)
Hello Bipin! Thank you for reply. I have one more question, see below.
On Tuesday 28 September 2021 06:10:47 Bipin Ravi wrote:
Hi Pali,
Please find my comments inline below.
--Bipin
-----Original Message----- From: Pali Rohár pali@kernel.org Sent: Sunday, September 26, 2021 9:57 AM To: Joanna Farley Joanna.Farley@arm.com; Konstantin Porotchkin kostap@marvell.com; Bipin Ravi Bipin.Ravi@arm.com Cc: Olivier Deprez Olivier.Deprez@arm.com; tf-a@lists.trustedfirmware.org; Marek Behún marek.behun@nic.cz Subject: Re: [TF-A] A53 errata 855873 on Marvell Armada 3720 (Was: Re: Missing CPU workaround warning message)
Hello Joanna! Thank you for response.
Konstantin, could you check if A3720 is affected by that ARM errata 855873?
Bipin or Joanna, in ARM errata 855873 is described "system cache". What kind of cache it is? It is L3 or L2 or some other? Because I do not understand to which cache that errata description refers.
<Bipin Ravi> Cortex A53 implements the optional integrated L2 configurable caches with option for sizes being 128KB, 256KB, 512KB, 1MB, and 2MB. So, L2 is integrated and part of the Cluster if it's included. System Cache in Cortex A53 context is any cache like an L3 cache implemented outside of the Cluster.
In errata 855873 is written:
"Implications If the processor is connected to an interconnect that has a system cache or a snoop filter then this erratum might cause data corruption."
Does it mean if A53 processor does not have snoop filter and it also does not have system cache then it is not affected by this errata?
I'm asking because we have CCI-400 interconnect which IIRC does not have snoop filter. And we do not have L3 cache and based on your description we should not have any "system cache".
So is then this platform affected by errata 855873?
<Bipin Ravi> The implications for the errata says " If the processor is connected to an interconnect that has a system cache or a snoop filter then this erratum might cause data corruption."
The emphasis is on the interconnect having a system cache OR snoop filter. I talked to the support team and they mentioned there is no SF(Snoop Filter) or SLC(System Level Cache) in CCI-400. There is one in CCI-550(and maybe CCI-500), both doesn’t apply for this case.
So, I would say this errata doesn't apply for the above said platform configuration. Hope it clarifies.
Hello and thank you for clarification! We therefore do not enable TF-A workaround for errata 855873 on Marvell Armada 3700 platform.