- TF-A - lists.trustedfirmware.org

Firmware-A v2.12 release code freeze notification

by Govindraj Raja

Hi All, The next release of the Firmware-A bundle of projects tagged v2.12 has an expected code freeze date of Nov, 8th 2024. Refer to the release cadence section from TF-A documentation (https://trustedfirmware-a.readthedocs.io/en/latest/about/release-informatio…). Closing out the release takes around 6-10 working days after the code freeze. v2.12 release preparation tasks start from now. We want to ensure that planned feature patches for the release are submitted in good time for the review process to conclude. As a kind recommendation and a matter of sharing CI resources, please launch CI jobs with care e.g.: -For simple platform, docs changes, or one liners, use Allow-CI+1 label (no need for a full Allow-CI+2 run). -For large patch stacks use Allow-CI+2 at top of the patch stack (and if required few individual Allow+CI+1 labels in the middle of the patch stack). -Carefully analyze results and fix the change if required, before launching new jobs on the same change. -If after issuing a Allow-CI+1 or Allow-CI+2 label a Build start notice is not added as a gerrit comment on the patch right away please be patient as under heavy load CI jobs can be queued and in extreme conditions it can be over an hour before the Build start notice is issued. Issuing another Allow-CI+1 or Allow-CI+2 label will just result in an additional job being queued. -- Thanks, Govindraj R

3 months, 3 weeks

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Re: Question about SPM-MM SMC function ids

by Olivier Deprez

Hi, This issue was raised long time ago but unfortunately never got fixed/merged. It may be ok restoring the change and progress it: Https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/11002<https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/11002> Https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.…<https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.…> https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.… On a related note, I hope you saw the deprecation notice: https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.… Regards, Olivier. ________________________________ From: Sureshkumar Ponnusamy <sponnusamy(a)microsoft.com> Sent: 11 November 2025 05:46 To: David Daney <daviddaney(a)microsoft.com>; tf-a-owner(a)lists.trustedfirmware.org <tf-a-owner(a)lists.trustedfirmware.org> Cc: Giri Mudusuru <girimudusuru(a)microsoft.com>; Kun Qin <Kun.Qin(a)microsoft.com> Subject: RE: Question about SPM-MM SMC function ids Yes, the problem is in comparing logic and masks used. From: David Daney <daviddaney(a)microsoft.com> Sent: Monday, November 10, 2025 7:38 PM To: Sureshkumar Ponnusamy <sponnusamy(a)microsoft.com>; tf-a-owner(a)lists.trustedfirmware.org Cc: Giri Mudusuru <girimudusuru(a)microsoft.com>; Kun Qin <Kun.Qin(a)microsoft.com> Subject: Re: Question about SPM-MM SMC function ids According to the DEN0060A specification the only values used are: MM_VERSION: 0x8400 0040 MM_COMMUNICATE: 0x8400 0041/0xC400 0041 These don't overlap with the TRNG function IDs defined in DEN0098 David. ________________________________ From: Sureshkumar Ponnusamy <sponnusamy(a)microsoft.com<mailto:sponnusamy@microsoft.com>> Sent: Monday, November 10, 2025 7:32 PM To: tf-a-owner(a)lists.trustedfirmware.org<mailto:tf-a-owner@lists.trustedfirmware.org> <tf-a-owner(a)lists.trustedfirmware.org<mailto:tf-a-owner@lists.trustedfirmware.org>> Cc: Giri Mudusuru <girimudusuru(a)microsoft.com<mailto:girimudusuru@microsoft.com>>; David Daney <daviddaney(a)microsoft.com<mailto:daviddaney@microsoft.com>>; Kun Qin <Kun.Qin(a)microsoft.com<mailto:Kun.Qin@microsoft.com>> Subject: Question about SPM-MM SMC function ids Hi Manish, Levi Yun , TF-A community , I am facing an issue when enabling SPM-MM feature and it looks like there is a minor issue with the SMC ID range check. When SPM-MM is enabled, I cannot use the TRNG SMC services. /* These macros are used to identify SPM-MM calls using the SMC function ID */ #define SPM_MM_FID_MASK U(0xffff) #define SPM_MM_FID_MIN_VALUE U(0x40) #define SPM_MM_FID_MAX_VALUE U(0x7f) #define is_spm_mm_fid(_fid) \ ((((_fid) & SPM_MM_FID_MASK) >= SPM_MM_FID_MIN_VALUE) && \ (((_fid) & SPM_MM_FID_MASK) <= SPM_MM_FID_MAX_VALUE)) Here, the SPM-MM SMC ID range spans from 0x40 to 0x7F, which overlaps with the TRNG SMC service IDs: /* SMC function IDs for TRNG queries */ #define ARM_TRNG_VERSION U(0x84000050) #define ARM_TRNG_FEATURES U(0x84000051) #define ARM_TRNG_GET_UUID U(0x84000052) #define ARM_TRNG_RND32 U(0x84000053) #define ARM_TRNG_RND64 U(0xC4000053) Could you please clarify the rationale behind including the TRNG SMC IDs within the SPM-MM ID range? If this overlap was unintentional, we have to fix it. Looking forward to your insights and feedback on this matter. Thanks Suresh

3 months, 3 weeks

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 2 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 6 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 493664: Control flow issues (DEADCODE) /lib/libc/strtoull.c: 106 in strtoull() _____________________________________________________________________________________________ *** CID 493664: Control flow issues (DEADCODE) /lib/libc/strtoull.c: 106 in strtoull() 100 else { 101 #ifdef __aarch64__ 102 uint128_t extended = (uint128_t)acc * (unsigned)base; 103 extended += (unsigned)c; 104 105 if (extended > ULLONG_MAX) { >>> CID 493664: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "any = -1;". 106 any = -1; 107 } else { 108 acc = (unsigned long long)extended; 109 any = 1; 110 } 111 #else ** CID 493663: Control flow issues (DEADCODE) /lib/libc/strtoul.c: 105 in strtoul() _____________________________________________________________________________________________ *** CID 493663: Control flow issues (DEADCODE) /lib/libc/strtoul.c: 105 in strtoul() 99 any = -1; 100 else { 101 extended = (unsigned long long)acc * (unsigned)base; 102 extended += (unsigned)c; 103 104 if (extended > (unsigned long long)ULONG_MAX) { >>> CID 493663: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "any = -1;". 105 any = -1; 106 } else { 107 acc = (unsigned long)extended; 108 any = 1; 109 } 110 } ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

3 months, 3 weeks

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 493457: Control flow issues (UNREACHABLE) /plat/arm/board/fvp/fvp_spmd_logical_sp.c: 37 in fvp_get_partition_info() _____________________________________________________________________________________________ *** CID 493457: Control flow issues (UNREACHABLE) /plat/arm/board/fvp/fvp_spmd_logical_sp.c: 37 in fvp_get_partition_info() 31 * SPM. 32 * 33 * TODO: Integrate this helper function for a new anticipated feature. 34 */ 35 return; 36 >>> CID 493457: Control flow issues (UNREACHABLE) >>> This code cannot be reached: "struct ffa_value ret = {0UL};". 37 struct ffa_value ret = { 0 }; 38 uint32_t target_uuid[4] = { 0 }; 39 static struct ffa_partition_info_v1_1 40 part_info[SPMD_LP_MAX_SUPPORTED_SP] = { 0 }; 41 42 uint16_t num_partitions = 0; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

3 months, 3 weeks

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Invitation: TF-A Tech Forum - Hafnium future looking improvements @ Thu Nov 13, 2025 12pm - 1pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

TF-A Tech Forum - Hafnium future looking improvements Thursday Nov 13, 2025 ⋅ 12pm – 1pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Hi, This is a one off session for a partner to present coming improvements related to Hafnium project. Apologies for the meeting time not accommodating people in US timezones. We'll record the session and publish in the TF-A tech forum page as usual. Regards,Olivier.Trusted Firmware is inviting you to a scheduled Zoom meeting.Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Reply for tf-a(a)lists.trustedfirmware.org and view more details https://calendar.google.com/calendar/event?action=VIEW&eid=MDdmMGs0NjBkcW5q… Your attendance is optional. ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

3 months, 3 weeks

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 394590: Null pointer dereferences (NULL_RETURNS) _____________________________________________________________________________________________ *** CID 394590: Null pointer dereferences (NULL_RETURNS) /lib/libfdt/fdt_overlay.c: 788 in overlay_apply_node() 782 &prop_len); 783 if (prop_len == -FDT_ERR_NOTFOUND) 784 return -FDT_ERR_INTERNAL; 785 if (prop_len < 0) 786 return prop_len; 787 >>> CID 394590: Null pointer dereferences (NULL_RETURNS) >>> Dereferencing a pointer that might be "NULL" "prop" when calling "fdt_setprop". 788 ret = fdt_setprop(fdt, target, name, prop, prop_len); 789 if (ret) 790 return ret; 791 } 792 793 fdt_for_each_subnode(subnode, fdto, node) { ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

3 months, 4 weeks

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Trusted Firmware-A LTS v2.12.8 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.8 is now available. This release contains the following patches: 776781d6d fix(simd): fix base register in fpregs_context_* [1] 0dba1a220 fix(cpus): workaround for Cortex-A720 erratum 3711910 [2] 6cce5175f fix(cpus): workaround for Cortex-A720 erratum 2729604 [3] ccb421921 refactor: fix workaround order for Cortex-A720 [4] 200fa2012 fix(spm-mm): prevent excessive racing [5] [1] https://review.trustedfirmware.org/q/I757a26f8910c2ab648116e001e06baa3deb2e… [2] https://review.trustedfirmware.org/q/Id65d5ba41b96648b07c09df77fb25cc4bdb50… [3] https://review.trustedfirmware.org/q/I4567d75ba9f17146d0d7bc5cdb622bb63efad… [4] https://review.trustedfirmware.org/q/I6770567a9580973ceedb5911f0a495391ef9e… [5] https://review.trustedfirmware.org/q/I0861d04ed95437e4ca9f203d9e79a6296b1ea… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.8/change-log.html Thanks, TF-A LTS team

4 months

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 4 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 4 of 4 defect(s) ** CID 491156: (DEADCODE) /drivers/st/usb_dwc3/usb_dwc3.c: 1741 in dwc3_handle_dev_event() /drivers/st/usb_dwc3/usb_dwc3.c: 1724 in dwc3_handle_dev_event() /drivers/st/usb_dwc3/usb_dwc3.c: 1718 in dwc3_handle_dev_event() _____________________________________________________________________________________________ *** CID 491156: (DEADCODE) /drivers/st/usb_dwc3/usb_dwc3.c: 1741 in dwc3_handle_dev_event() 1735 return action; 1736 } 1737 } 1738 1739 /* Clear Stall for all EP except EP0OUT k = USB_DWC3_NUM_OUT_EP */ 1740 for (i = 1; i < USB_DWC3_NUM_OUT_EP; i++) { >>> CID 491156: (DEADCODE) >>> Execution cannot reach this statement: "ep = &dwc3_handle->OUT_ep[i];". 1741 ep = &dwc3_handle->OUT_ep[i]; 1742 1743 if (!ep->is_stall) { 1744 continue; 1745 } 1746 /drivers/st/usb_dwc3/usb_dwc3.c: 1724 in dwc3_handle_dev_event() 1718 dwc3_ep_stop_xfer(dwc3_handle, 1719 &dwc3_handle->pcd_handle->out_ep[i]); 1720 } 1721 1722 /* Clear Stall for all EP except EP0IN k = USB_DWC3_NUM_IN_EP */ 1723 for (i = 1; i < USB_DWC3_NUM_IN_EP; i++) { >>> CID 491156: (DEADCODE) >>> Execution cannot reach this statement: "ep = &dwc3_handle->IN_ep[i];". 1724 ep = &dwc3_handle->IN_ep[i]; 1725 1726 if (!ep->is_stall) { 1727 continue; 1728 } 1729 /drivers/st/usb_dwc3/usb_dwc3.c: 1718 in dwc3_handle_dev_event() 1712 dwc3_ep_stop_xfer(dwc3_handle, 1713 &dwc3_handle->pcd_handle->in_ep[i]); 1714 } 1715 1716 /* Stop transfers for all EP except EP0OUT k = USB_DWC3_NUM_OUT_EP */ 1717 for (i = 1; i < USB_DWC3_NUM_OUT_EP; i++) { >>> CID 491156: (DEADCODE) >>> Execution cannot reach this statement: "dwc3_ep_stop_xfer(dwc3_hand...". 1718 dwc3_ep_stop_xfer(dwc3_handle, 1719 &dwc3_handle->pcd_handle->out_ep[i]); 1720 } 1721 1722 /* Clear Stall for all EP except EP0IN k = USB_DWC3_NUM_IN_EP */ 1723 for (i = 1; i < USB_DWC3_NUM_IN_EP; i++) { ** CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) /drivers/st/usb_dwc3/usb_dwc3.c: 698 in () _____________________________________________________________________________________________ *** CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) /drivers/st/usb_dwc3/usb_dwc3.c: 698 in () 692 } 693 return USBD_OK; 694 } 695 696 /* Can be called from interrupt context hence cannot wait for Tick */ 697 if (timeout_elapsed(timeout)) { >>> CID 491155: API usage errors (PW.PRINTF_ARG_MISMATCH) >>> argument is incompatible with corresponding format string conversion (expected type "unsigned long" but argument has type "int") 698 ERROR("TIMEOUT Command Complete --> %u PHYEP%lu %x\n", 699 DWC3_DEPCMD_STATUS(reg), phy_epnum, reg); 700 /* "Command Timed Out" */ 701 return USBD_TIMEOUT; 702 } 703 } while (true); ** CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /drivers/st/usb_dwc3/usb_dwc3.c: 2341 in usb_dwc3_init_driver() _____________________________________________________________________________________________ *** CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /drivers/st/usb_dwc3/usb_dwc3.c: 2341 in usb_dwc3_init_driver() 2335 /* 2336 * We are doing 1:1 alternate mapping for endpoints, meaning 2337 * IN Endpoint X maps to Physical Endpoint 2*X +1 and 2338 * OUT Endpoint X maps to Physical Endpoint 2*X. 2339 * So USB endpoint 0x81 is 0x03. 2340 */ >>> CID 491154: Integer handling issues (CONSTANT_EXPRESSION_RESULT) >>> "(i | (128UL /* (uint64_t)1ULL << 7 */)) & (128UL /* (uint64_t)1ULL << 7 */)" is always 0x80 regardless of the values of its operands. This occurs as a value. 2341 dwc3_handle->IN_ep[i].phy_epnum = __HAL_PCD_EPADDR_TO_PHYEPNUM(i | EP_DIR_IN); 2342 2343 dwc3_handle->IN_ep[i].intr_num = PCD_DEV_EVENTS_INTR; 2344 } 2345 2346 for (i = 0; i < USB_DWC3_NUM_OUT_EP ; i++) { ** CID 491153: (UNINIT) _____________________________________________________________________________________________ *** CID 491153: (UNINIT) /plat/nxp/soc-ls1046a/soc.c: 299 in soc_mem_access() 293 dram_idx, index, 294 info_dram_regions->region[dram_idx].addr, 295 info_dram_regions->region[dram_idx].size, 296 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 297 } 298 >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 299 mem_access_setup(NXP_TZC_ADDR, index, tzc400_reg_list); 300 } 301 302 #else /* IMAGE_BL2 */ 303 /* Functions for BL31 */ 304 /plat/nxp/soc-lx2160a/soc.c: 409 in soc_mem_access() 403 tzc400_reg_list); 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 409 mem_access_setup(NXP_TZC2_ADDR, index, 410 tzc400_reg_list); 411 mem_access_setup(NXP_TZC4_ADDR, index, 412 tzc400_reg_list); 413 } 414 } /plat/nxp/soc-lx2160a/soc.c: 411 in soc_mem_access() 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); 409 mem_access_setup(NXP_TZC2_ADDR, index, 410 tzc400_reg_list); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 411 mem_access_setup(NXP_TZC4_ADDR, index, 412 tzc400_reg_list); 413 } 414 } 415 416 #else /plat/nxp/soc-ls1088a/soc.c: 222 in soc_mem_access() 216 dram_idx, index, 217 info_dram_regions->region[dram_idx].addr, 218 info_dram_regions->region[dram_idx].size, 219 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 220 } 221 >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 222 mem_access_setup(NXP_TZC_ADDR, index, 223 tzc400_reg_list); 224 } 225 226 /* 227 * This function implements soc specific erratum /plat/nxp/soc-lx2160a/soc.c: 404 in soc_mem_access() 398 } 399 400 if (devdisr5_info->ddrc1_present != 0) { 401 INFO("DDR Controller 1.\n"); 402 mem_access_setup(NXP_TZC_ADDR, index, 403 tzc400_reg_list); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { 408 INFO("DDR Controller 2.\n"); 409 mem_access_setup(NXP_TZC2_ADDR, index, /plat/nxp/soc-lx2160a/soc.c: 402 in soc_mem_access() 396 info_dram_regions->region[dram_idx].size, 397 NXP_SECURE_DRAM_SIZE, NXP_SP_SHRD_DRAM_SIZE); 398 } 399 400 if (devdisr5_info->ddrc1_present != 0) { 401 INFO("DDR Controller 1.\n"); >>> CID 491153: (UNINIT) >>> Using uninitialized value "tzc400_reg_list->start_addr" when calling "mem_access_setup". 402 mem_access_setup(NXP_TZC_ADDR, index, 403 tzc400_reg_list); 404 mem_access_setup(NXP_TZC3_ADDR, index, 405 tzc400_reg_list); 406 } 407 if (devdisr5_info->ddrc2_present != 0) { ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

4 months

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TF-A Tech Forum on Thu Oct 30th 2025 4.00pm UK

by Olivier Deprez

(re-sending as it seems this email did not properly reach the ML) Hi, On Oct 30th in the TF-A Tech Forum, two different sessions of 30 minutes each will be presented: TF-A SMC fuzzer improvements - Slava Andrianov * Motivating secure world fuzzing * Fuzzer configuration improvements * Future fuzzing work TF-RMM ID registers management - Sona Rebecca Mathew * Earlier RMM directly read ID registers, creating a dependency on EL3 revisions to enable features forcing a version compatibility between the two. * New approach: EL3 capabilities are queried via an SMC call and RMM now uses cached ID register copies populated at cold boot. Includes forward-looking support for FEAT_IDTE3 in TF-A. Regards, Olivier. TF-A Tech Forum Thursday Oct 30, 2025 ⋅ 5pm – 6pm (Central European Time - Paris) Trusted Firmware is inviting you to a scheduled Zoom meeting. Please download and import the following iCalendar (.ics) files to your calendar system. Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Join Zoom Meeting https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… Meeting ID: 935 5786 3987 Passcode: 939141 --- One tap mobile +12532158782,,93557863987# US (Tacoma) +13017158592,,93557863987# US (Washington DC) --- Dial by your location • +1 253 215 8782 US (Tacoma) • +1 301 715 8592 US (Washington DC) • +1 305 224 1968 US • +1 309 205 3325 US • +1 312 626 6799 US (Chicago) • +1 346 248 7799 US (Houston) • +1 360 209 5623 US • +1 386 347 5053 US • +1 507 473 4847 US • +1 564 217 2000 US • +1 646 558 8656 US (New York) • +1 646 931 3860 US • +1 669 444 9171 US • +1 669 900 9128 US (San Jose) • +1 689 278 1000 US • +1 719 359 4580 US • +1 253 205 0468 US • 833 548 0276 US Toll-free • 833 548 0282 US Toll-free • 833 928 4608 US Toll-free • 833 928 4609 US Toll-free • 833 928 4610 US Toll-free • 877 853 5247 US Toll-free • 888 788 0099 US Toll-free Meeting ID: 935 5786 3987 Find your local number: https://linaro-org.zoom.us/u/adoz9mILli

4 months

1
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TF-A Tech Forum on Thu Oct 30th 2025 4.00pm UK

by Olivier Deprez

Hi, On Oct 30th in the TF-A Tech Forum, two different sessions of 30 minutes each will be presented: TF-A SMC fuzzer improvements - Slava Andrianov * Motivating secure world fuzzing * Fuzzer configuration improvements * Future fuzzing work TF-RMM ID registers management - Sona Rebecca Mathew * Earlier RMM directly read ID registers, creating a dependency on EL3 revisions to enable features forcing a version compatibility between the two. * New approach: EL3 capabilities are queried via an SMC call and RMM now uses cached ID register copies populated at cold boot. Includes forward-looking support for FEAT_IDTE3 in TF-A. Regards, Olivier. TF-A Tech Forum Thursday Oct 30, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com

4 months

1
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Marvell a3700 build failure after toolchain update

by Jayanth Dodderi Chidanand

Hi All, During the TF-A CI upgrade from Arm GNU Toolchain version 14.2.Rel1 to 14.3.Rel1 [1], the Marvell A3700 platform build began failing. Since TF-A does not include the WTMI sources and there has been no response from the Marvell maintainers, the platform has been temporarily removed from the CI [2]. We will restore it once the fix lands in the Marvell upstream and links cleanly with 14.3/binutils 2.44. The sections below outline the CI environment, build configuration, and error details for reference. * Test config tf-l1-build-plat/a3700-default:nil * * CI Test Environment Host: Ubuntu 22.04 (Docker) Toolchains: aarch64-none-elf: Arm GNU 14.3.Rel1 arm-none-eabi (CM3/WTMI): Arm GNU 14.3.Rel1 (fails); passes with 14.2.Rel1 * Representative build params: make CROSS_COMPILE=aarch64-none-elf- CROSS_CM3=arm-none-eabi- PLAT=a3700 BL33=/dev/null CM3_SYSTEM_RESET=1 A3720_DB_PM_WAKEUP_SRC=1 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 DEBUG=1 V=1 * Build Failure: (*ABS*0x1fff0000): Unknown destination type (ARM/Thumb) in main.o (.text.startup+0x2a): dangerous relocation: unsupported relocation /home/../.../arm-none-eabi/bin/ld: warning: build/sys_init.elf has a LOAD segment with RWX permissions /home/../.../arm-none-eabi/bin/ld: (*ABS*0x1fff0000): Unknown destination type (ARM/Thumb) in main.o main.o: in function `main': .../A3700-utils-marvell/wtmi/sys_init/main.c:350:(.text.startup+0x2a): dangerous relocation: unsupported relocation collect2: error: ld returned 1 exit status Root Cause On Cortex-M (Thumb-only), calls/jumps to absolute addresses must have bit0 = 1 to indicate Thumb state. Older binutils tolerated raw addresses like 0x1FFF0000; binutils 2.44 now errors if the destination state is unknown (no stub is inserted). Requested fix (in WTMI sources) Please update any absolute branch/call targets to be explicitly Thumb (LSB=1), or define a Thumb symbol and call that. Acceptance criteria: WTMI links cleanly with arm-none-eabi 14.3.Rel1 (binutils 2.44) with no: * Unknown destination type (ARM/Thumb) * dangerous relocation: unsupported relocation [1] https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads [2] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/44444/5 Thanks & regards, Jayanth

4 months

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Canceled event with note: TF-A Tech Forum @ Thu Nov 13, 2025 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Cancelling the Nov 13th instance." TF-A Tech Forum Thursday Nov 13, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

4 months, 1 week

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Trusted Firmware-A LTS v2.12.7 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.7 is now available. This release contains the following patches: 7a241814b fix(smccc): cleanup unused declaration [1] 616a7983d fix(cpus): inform the compiler that struct cpu_ops is aligned [2] 01d80d085 docs(security): update Advisory TFV-6 [3] 79ba33aa3 fix(cpus): use correct Makefile indentation for CVE-2018-3639 check [4] 84e8bc22f build(allwinner): disable unneeded CVE workarounds and MPAM [5] 9cb5a78aa fix(aarch32): make get_cpu_ops_ptr() PCS compliant [6] 7c300227e fix(cpus): workaround for Cortex-A510 erratum 2008766 [7] 4e62dbf9b fix(cpus): workaround for Cortex-A510 erratum 2169012 [8] 399477f9f fix(cpus): workaround for Cortex-A510 erratum 2218134 [9] 05f71e344 fix(cpus): workaround for Cortex-A510 erratum 2420992 [10] 8c67b1a27 fix(cpus): workaround for Cortex-A510 erratum 3672349 [11] 1f547e228 fix(cpus): workaround for Cortex-A510 erratum 3704847 [12] e26cd2c52 fix(cpus): workaround for Neoverse-V2 erratum 3841324 [13] 72f26f182 fix(cpus): workaround for Neoverse-V2 erratum 3701771 [14] [1] https://review.trustedfirmware.org/q/Iae81e0bcbd2feb2b72a4e4e8fd27a27ae00c9… [2] https://review.trustedfirmware.org/q/Id38d6f1b92527b8a414cfbb856a5a82c76a1b… [3] https://review.trustedfirmware.org/q/Icb3d039c8949fd6036c729a845646170710ba… [4] https://review.trustedfirmware.org/q/Ieb56af33a11c40b6753738669eee929c26426… [5] https://review.trustedfirmware.org/q/Ibc52a4fc9b8f5d9b2b28a2ce13d3ab99b63e9… [6] https://review.trustedfirmware.org/q/I7f3b50e56a1288d2a8136a7b8c01544bab19c… [7] https://review.trustedfirmware.org/q/Id1aa0f2c518a055363c962f9abdb27e1ee8bf… [8] https://review.trustedfirmware.org/q/Ifdd59c09e84252dc292600630d81d32986fd6… [9] https://review.trustedfirmware.org/q/Ifec40dee2f7e42c56c9ed447b6b1997b170f9… [10] https://review.trustedfirmware.org/q/Ia76ba2431d76f14c08b95a998806986190d68… [11] https://review.trustedfirmware.org/q/I9786ab8843a2eab45e650c6af50b693348152… [12] https://review.trustedfirmware.org/q/I2c7c8da9c66471115b5bf8fb5c87d4de46ca2… [13] https://review.trustedfirmware.org/q/I9b3a5266103e5000d207c7a270c65455d0646… [14] https://review.trustedfirmware.org/q/Ic0ad68f7bd393bdc03343d5ba815adb23bf6a… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.7/change-log.html Thanks, TF-A LTS team

4 months, 2 weeks

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Deprecating SPM-MM

by Olivier Deprez

Hi, In light of coming TF-A v2.14 in November, we would like to mark the SPM-MM implementation [1] as deprecated. Our understanding is that it's not longer very actively used at least from an upstream perspective, while most SPM sw architecures have adopted/migrated to the FF-A standard [2] [3]. The intent would be to remove this implementation completely from next release in May 26 onwards. This would remove the maintenance burden for 3 orthogonal options, reducing to the 2 FF-A compliant implementations. Simplification also comes to the testing side and CI. The SPM-MM implementation would continue to be supported in LTS branches maintained for 7 years. Let us know if this causes major concerns. Thanks, Regards, Olivier. [1] https://trustedfirmware-a.readthedocs.io/en/latest/components/secure-partit… [2] https://trustedfirmware-a.readthedocs.io/en/latest/components/secure-partit… [3] https://trustedfirmware-a.readthedocs.io/en/latest/components/el3-spmc.html

4 months, 2 weeks

1
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Firmware-A v2.13 release code freeze notification

by Olivier Deprez

Hi All, The next release of the Firmware-A bundle of projects tagged v2.13 has an expected code freeze date of May, 2nd 2025. In order to accommodate the Linaro connect event occurring during the week of May 12th we may extend the release completion date up until the week of May 26th. v2.13 release preparation tasks start from now. We want to ensure that planned feature patches for the release are submitted in good time for the review process to conclude. As a kind recommendation and a matter of sharing CI resources, please launch CI jobs with care e.g.: -For simple platform, docs changes, or one liners, use Allow-CI+1 label (no need for a full Allow-CI+2 run). -For large patch stacks use Allow-CI+2 at top of the patch stack (and if required few individual Allow+CI+1 labels in the middle of the patch stack). -Carefully analyze results and fix the change if required, before launching new jobs on the same change. -If after issuing a Allow-CI+1 or Allow-CI+2 label a Build start notice is not added as a gerrit comment on the patch right away please be patient as under heavy load CI jobs can be queued and in extreme conditions it can be over an hour before the Build start notice is issued. Issuing another Allow-CI+1 or Allow-CI+2 label will just result in an additional job being queued. Regards, Olivier.

4 months, 3 weeks

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Trusted Firmware-A LTS v2.8.39 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.39 is now available. This release contains the following patches: 8d101b32e fix(cpus): workaround for Cortex-A720 erratum 3711910 [1] 7e9945ac3 fix(cpus): workaround for Cortex-A720 erratum 2729604 [2] 8ba721842 refactor: fix workaround order for Cortex-A720 [3] [1] https://review.trustedfirmware.org/q/Id65d5ba41b96648b07c09df77fb25cc4bdb50… [2] https://review.trustedfirmware.org/q/I4567d75ba9f17146d0d7bc5cdb622bb63efad… [3] https://review.trustedfirmware.org/q/I6770567a9580973ceedb5911f0a495391ef9e… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.39/change-log.html Thanks, TF-A LTS team

4 months, 3 weeks

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TF-A Tech Forum Oct 16th 4.00pm (UK) - Secure Partitions Live Firmware Activation

by Olivier Deprez

Hi, On Oct 16th in the TF-A Tech Forum, Madhukar Pappireddy will present his work on secure partitions live firmware activation: requirements, implementation overview, and challenges. Regards, Olivier. TF-A Tech Forum Thursday Oct 16, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com

4 months, 3 weeks

1
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Trusted Firmware-A LTS v2.10.25 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.25 is now available. This release contains the following patches: a4d0e8156 fix(cpus): workaround for Neoverse-V2 erratum 3841324 [1] 94610488d fix(cpus): workaround for Neoverse-V2 erratum 3701771 [2] b5a976a0c fix(cpus): workaround for Cortex-A720 erratum 3711910 [3] af2b4d148 fix(cpus): workaround for Cortex-A720 erratum 2729604 [4] 9344c4e10 refactor: fix workaround order for Cortex-A720 [5] [1] https://review.trustedfirmware.org/q/I9b3a5266103e5000d207c7a270c65455d0646… [2] https://review.trustedfirmware.org/q/Ic0ad68f7bd393bdc03343d5ba815adb23bf6a… [3] https://review.trustedfirmware.org/q/Id65d5ba41b96648b07c09df77fb25cc4bdb50… [4] https://review.trustedfirmware.org/q/I4567d75ba9f17146d0d7bc5cdb622bb63efad… [5] https://review.trustedfirmware.org/q/I6770567a9580973ceedb5911f0a495391ef9e… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.25/change-log.html Thanks, TF-A LTS team

4 months, 3 weeks

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Rethrow SEA from EL3 to lower EL on arm64

by Venkata Pokkuluri

In Firmware First Handling (FFH), all external aborts are trapped to EL3, they can be notified to OS/VM using SDEI or by reinjecting SEA. SDEI is imprecise exception and asynchronous. GHES driver defines SEA as the only synchronous mechanism ( https://github.com/torvalds/linux/blob/master/drivers/acpi/apei/ghes.c#L118), hence SEA reinjection is useful for SEA's where OS/VM takes appropriate action. For example when an user space application running at EL0 consumes a poisoned memory by re-throwing SEA the kernel can terminate the individual application. For SEA Reinjection we need to figure out the right EL to reinject the SEA to and then copy ESR_EL3, SPSR_EL3, ELR_EL3 and FAR_EL3 to target ELs respective registers and calculate new PSTATE for EL3. To find target_el reference code is provided in SyncExternalAbortTarget (J1.3.2.7) in ARM DDI 0487L.a.

4 months, 3 weeks

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Trusted Firmware-A LTS v2.8.38 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.38 is now available. This release contains the following patches: 350252f46 fix(cpus): workaround for Cortex-A510 erratum 2008766 [1] 50c936b5a fix(cpus): workaround for Cortex-A510 erratum 2169012 [2] a8dcd1673 fix(cpus): workaround for Cortex-A510 erratum 2218134 [3] 65711740d fix(cpus): workaround for Cortex-A510 erratum 2420992 [4] 372e1322d fix(cpus): workaround for Cortex-A510 erratum 3672349 [5] bdefd871d fix(cpus): workaround for Cortex-A510 erratum 3704847 [6] dcbc9b2ea fix(cpus): workaround for Neoverse-V2 erratum 3841324 [7] 17e7be571 fix(cpus): workaround for Neoverse-V2 erratum 3701771 [8] [1] https://review.trustedfirmware.org/q/Id1aa0f2c518a055363c962f9abdb27e1ee8bf… [2] https://review.trustedfirmware.org/q/Ifdd59c09e84252dc292600630d81d32986fd6… [3] https://review.trustedfirmware.org/q/Ifec40dee2f7e42c56c9ed447b6b1997b170f9… [4] https://review.trustedfirmware.org/q/Ia76ba2431d76f14c08b95a998806986190d68… [5] https://review.trustedfirmware.org/q/I9786ab8843a2eab45e650c6af50b693348152… [6] https://review.trustedfirmware.org/q/I2c7c8da9c66471115b5bf8fb5c87d4de46ca2… [7] https://review.trustedfirmware.org/q/I9b3a5266103e5000d207c7a270c65455d0646… [8] https://review.trustedfirmware.org/q/Ic0ad68f7bd393bdc03343d5ba815adb23bf6a… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.38/change-log.html Thanks, TF-A LTS team

5 months

1
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Trusted Firmware-A LTS v2.10.24 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.24 is now available. This release contains the following patches: a130a58ec feat(mbedtls): update mbedtls to version 3.6.4 [1] [1] https://review.trustedfirmware.org/q/I57c9c14aabe75a51c74dcf2a33faf59f95ce2… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.24/change-log.html Thanks, TF-A LTS team

5 months

1
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Canceled event with note: TF-A Tech Forum @ Thu Oct 2, 2025 5pm - 6pm (GMT+2) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi, Cancelling as no topic planned for today. Regards, Olivier. " TF-A Tech Forum Thursday Oct 2, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

5 months

1
0
0 0

Trusted Firmware-A LTS v2.10.23 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.23 is now available. This release contains the following patches: fd0b9fc9e build(deps-dev): bump sphinx-rtd-theme from 1.2.0 to 1.3.0 [1] e57596f83 build(deps-dev): bump anytree from 2.8.0 to 2.12.1 [2] 5f0adf430 build(deps-dev): bump click from 8.1.3 to 8.1.8 [3] b0372fb95 build(deps-dev): bump prettytable from 3.7.0 to 3.11.0 [4] bc8e2505a build(dev-deps): bump brace-expansion [5] f665e3e59 fix(cpus): workaround for Cortex-A510 erratum 2008766 [6] b32738dcd fix(cpus): workaround for Cortex-A510 erratum 2169012 [7] 8338b416f fix(cpus): workaround for Cortex-A510 erratum 2218134 [8] bc5a532bf fix(cpus): workaround for Cortex-A510 erratum 2420992 [9] 021e3d449 fix(cpus): workaround for Cortex-A510 erratum 3672349 [10] d6b88dc8a fix(cpus): workaround for Cortex-A510 erratum 3704847 [11] [1] https://review.trustedfirmware.org/q/I8cb732e9d7cbf8359449a8f661dd6c7a09aba… [2] https://review.trustedfirmware.org/q/Ic3cedf9f6e6f9d364647e150d8574f682eb59… [3] https://review.trustedfirmware.org/q/I39e7c3dc92d1a50d0fd5b60c84b2bdb9f3a46… [4] https://review.trustedfirmware.org/q/I182e0845cb9df90f6536fbe6dc5b654d95fee… [5] https://review.trustedfirmware.org/q/I1613e2e8fe36abe22390b41d520ac5916cf24… [6] https://review.trustedfirmware.org/q/Id1aa0f2c518a055363c962f9abdb27e1ee8bf… [7] https://review.trustedfirmware.org/q/Ifdd59c09e84252dc292600630d81d32986fd6… [8] https://review.trustedfirmware.org/q/Ifec40dee2f7e42c56c9ed447b6b1997b170f9… [9] https://review.trustedfirmware.org/q/Ia76ba2431d76f14c08b95a998806986190d68… [10] https://review.trustedfirmware.org/q/I9786ab8843a2eab45e650c6af50b693348152… [11] https://review.trustedfirmware.org/q/I2c7c8da9c66471115b5bf8fb5c87d4de46ca2… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.23/change-log.html Thanks, TF-A LTS team

5 months, 1 week

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TF-A Tech Forum (Thu Sep 18th) - Introducing Rusted Firmware-A

by Olivier Deprez

Hi, On Sep 18th in the TF-A Tech forum, Sandrine Afsa will present on the newly announced Rusted Firmware-A and Arm firmware crates projects with the following agenda: Introducing RF-A & Arm Firmware Crates projects v0.1 release contents Roadmap Request for feedback Regards, Olivier. TF-A Tech Forum Thursday Sep 18, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org qwandor(a)google.com praan(a)google.com

5 months, 1 week

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Trusted Firmware-A LTS v2.8.37 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.37 is now available. This release contains the following patches: 00b2f9f9e fix(cpus): use correct Makefile indentation for CVE-2018-3639 check [1] 3d25bdfca build(allwinner): disable unneeded CVE workarounds and MPAM [2] c56bd3a42 fix(smccc): cleanup unused declaration [3] 6be9e30f8 docs(security): update Advisory TFV-6 [4] 4f6a7e4b1 fix(aarch32): make get_cpu_ops_ptr() PCS compliant [5] 15bf0a7ec fix(cpus): inform the compiler that struct cpu_ops is aligned [6] [1] https://review.trustedfirmware.org/q/Ieb56af33a11c40b6753738669eee929c26426… [2] https://review.trustedfirmware.org/q/Ibc52a4fc9b8f5d9b2b28a2ce13d3ab99b63e9… [3] https://review.trustedfirmware.org/q/Iae81e0bcbd2feb2b72a4e4e8fd27a27ae00c9… [4] https://review.trustedfirmware.org/q/Icb3d039c8949fd6036c729a845646170710ba… [5] https://review.trustedfirmware.org/q/I7f3b50e56a1288d2a8136a7b8c01544bab19c… [6] https://review.trustedfirmware.org/q/Id38d6f1b92527b8a414cfbb856a5a82c76a1b… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.37/change-log.html Thanks, TF-A LTS team

5 months, 2 weeks

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Trusted Firmware-A LTS v2.10.22 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.22 is now available. This release contains the following patches: 685617980 fix(cpus): inform the compiler that struct cpu_ops is aligned [1] 3466985b9 fix(smccc): cleanup unused declaration [2] bb1fcfd2f fix(cpus): use correct Makefile indentation for CVE-2018-3639 check [3] 61d9a828c build(allwinner): disable unneeded CVE workarounds and MPAM [4] c4bff8bfb fix(aarch32): make get_cpu_ops_ptr() PCS compliant [5] [1] https://review.trustedfirmware.org/q/Id38d6f1b92527b8a414cfbb856a5a82c76a1b… [2] https://review.trustedfirmware.org/q/Iae81e0bcbd2feb2b72a4e4e8fd27a27ae00c9… [3] https://review.trustedfirmware.org/q/Ieb56af33a11c40b6753738669eee929c26426… [4] https://review.trustedfirmware.org/q/Ibc52a4fc9b8f5d9b2b28a2ce13d3ab99b63e9… [5] https://review.trustedfirmware.org/q/I7f3b50e56a1288d2a8136a7b8c01544bab19c… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.22/change-log.html Thanks, TF-A LTS team

5 months, 2 weeks

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 2 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 490141: Control flow issues (NO_EFFECT) /contrib/libeventlog/src/event_log.c: 264 in event_log_init_and_reg() _____________________________________________________________________________________________ *** CID 490141: Control flow issues (NO_EFFECT) /contrib/libeventlog/src/event_log.c: 264 in event_log_init_and_reg() 258 int rc = event_log_init(start, finish); 259 if (rc < 0) { 260 return rc; 261 } 262 263 if (hash_info == NULL || hash_info->func == NULL || >>> CID 490141: Control flow issues (NO_EFFECT) >>> This less-than-zero comparison of an unsigned value is never true. "hash_info->count < 0UL". 264 hash_info->count < 0 || hash_info->count > HASH_ALG_COUNT) { 265 return -EINVAL; 266 } 267 268 crypto_hash_info = hash_info; 269 return 0; ** CID 490140: Memory - illegal accesses (OVERRUN) _____________________________________________________________________________________________ *** CID 490140: Memory - illegal accesses (OVERRUN) /contrib/libeventlog/src/event_print.c: 46 in event_log_print_spaced_hex() 40 event_log_append_str(output_buf, cap, &pos, prefix); 41 42 for (size_t off = 0; off < buf_len; off += 16U) { 43 chunk = (buf_len - off >= 16U) ? 16U : (buf_len - off); 44 45 /* write the 16-byte (or tail) chunk */ >>> CID 490140: Memory - illegal accesses (OVERRUN) >>> Overrunning array of 256 bytes at byte offset 256 by dereferencing pointer "output_buf + pos". 46 pos += event_log_write_hex_spaced(output_buf + pos, 47 (pos < cap) ? (cap - pos) : 0, 48 chunk, buf + off); 49 50 NOTICE(" %s\n", output_buf); 51 ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

5 months, 2 weeks

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Adding support for phyCORE AM62L in TF-A

by Florijan Plohl

Hello! We’d like to add support in TF-A for the PHYTEC phyCORE AM62L. On this board we need BL1 to read the on-board EEPROM via I2C to set the correct DRAM timings. Right now we have it working by editing the TI AM62L files on TI's TF-A fork and adding the EEPROM and I2C drivers. Our questions are: - Should we create a separate board for phyCORE AM62L, or would it make more sense to include this as an option in the TI AM62L support? - How much abstraction should we implement for EEPROM and I2C drivers? Thanks for any advice! Best regards, Florijan Plohl

5 months, 2 weeks

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FW: CI infrastructure scheduled maintenance: 12th Sep 2025

by Joanna Farley

FYI From: Saheer Babu via Tf-openci <tf-openci(a)lists.trustedfirmware.org> Date: Wednesday, 10 September 2025 at 15:17 To: tf-openci(a)lists.trustedfirmware.org <tf-openci(a)lists.trustedfirmware.org> Subject: [Tf-openci] CI infrastructure scheduled maintenance: 12th Sep 2025 Hi all, We will be performing upgrade of the clusters hosting review.trustedfirmware.org and ci.trustedfirmware.org on Friday, 12th Sep 2025 at 16:00 GMT+1. During this maintenance window, both services will be unavailable for approximately 4 hours. A follow-up email will be sent once the services are fully restored. Best regards, Saheer IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. -- Tf-openci mailing list -- tf-openci(a)lists.trustedfirmware.org To unsubscribe send an email to tf-openci-leave(a)lists.trustedfirmware.org

5 months, 3 weeks

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Canceled event with note: TF-A Tech Forum @ Thu Sep 4, 2025 5pm - 6pm (GMT+2) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi Cancelling as no topic proposed for this week. Regards, Olivier. " TF-A Tech Forum Thursday Sep 4, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

6 months

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Raspberry Pi-5 platform maintainer

by Manish Pandey2

Hi, I’m looking for details on the Raspberry Pi 5 (RPi5) platform port in TF-A and to identify a potential platform owner/maintainer. I can see an RPi5 port attributed to @mariobalanica02@gmail.com<mailto:mariobalanica02@gmail.com>, but [1] doesn’t list a platform owner for this target. I also haven’t found TF-A documentation describing the software stack or the current level of testing for RPi5. Could someone please point me to: The current platform owner/maintainer, design/bring-up notes around SW stack or testing? [1] : https://git.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a.git… Thanks Manish

6 months

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Does FVP_Base_RevC-2xAEMvA platform model has a full support for address translation at PL2 stage-1 MMU in aarch32?

by Marek

Have you ever succeeded in performing a Stage-1 MMU translation using LPAE (Long Physical Address Extension) on the FVP_Base_RevC-2xAEMvA platform model running in AArch32 Hyp mode (CONFIG64=0) into any other Memory but Strongly-Ordered? My environment is - FVP_Base_RevC-2xAEMvA booting SW stack from bullet point below - SW stack from Yocto, 'meta-arm'. I use 'fvp-base-arm32' that builds bl1, bl2, bl32, bl33, Linux kernel and rootfs. The only component that works there at PL2 HYP mode is u-boot (bl33). Whichever attributes I assign there Normal Memory with Inner or Outer Cacheability, Write-Through, or Write-Back, or Non-cacheable I always end up with Strongly-Ordered. To me it looks like it doesn't read the MAIR correctly and/or ignores the Cachability in HCTR. I inspected the MMU code thoroughly there, compared with the other codes for MMU, from trusted-firmware-a, xen, and Linux kernel and it seems u-boot does it correct. U-boot sets there identity-mapping for all 4GB with 0GB through 2GB Strongly-Ordered, 3G - 4G Normal Memory, Cachable Write-Back Write-Allocate, Non-Shareable and the last 1GB also Strongly-Ordered. Here is a brief execution steps it goes through: #1 Sets up the 2M-block at the 2nd level table with attributes. - sample block descriptor for translating from 0x8000_0000 virt to phys: 0x8000044d - bits[1:0] = 0b01 -> valid descriptor, descriptor type: block - bits[4:2] = 0b011 -> AttrIndx[2:0] points to MAIR0[3] . MAIR0[3] is 0xff - bits[5] = 0b0 - Non-secure - bits[7:6] = 0b01 - Access Permission: Read/write - bits[9:8] = 0b00 -> Shareability: non-shareable #2 Sets up 1st level table descriptor pointing to the descriptor shown above. It sets bits[1:0] to 0b11 meaning it is a table descriptor and valid. #3 Set control registers as follows HTCR is: 0x80000500 so - bits[9:8] = 0b01 -> Inner Cacheability to Normal memory, Outer Write-Back Write-Allocate Cacheable - bits[11:10] = 0b01 -> Outer Cacheability to Normal memory, Outer Write-Back Write-Allocate Cacheable - bits[13:12] = 0b00 -> Non-shareable HTTBR is: 0x00000000feff4000 -> points to 1st lavel table set in #2 HMAIR0 is: 0xffeeaa00 -> as shown above AttrIndx[2:0] points to MAIR0 and the four nibble being 0xff. 0xff is Normal memory, Inner Write-Back Cacheablea, Non-transientb HMAIR1 is: 0x00000000 - I set it to zero there as not used. #4 Finally it sets the M and C bits in HSCTLR registers Inspecting the page tables with amrds the region 3GB through 4GB that should be Normal and Cachable is Strongly-Ordered - 0x80000000 | L2 Block | NP:0x0000000080000000 | XN=0, PXN=0, Contiguous=0, nG=0, AF=1, SH=0x0, AP=0x1, AttrIndx=0x3 - H:0x80000000-0xFEFFFFFF | NP:0x80000000-0xFEFFFFFF | Strongly-ordered | NA | False | True | True Least not last are the parameters I pass to the model: FVP_Base_RevC-2xAEMvA --parameter bp.ve_sysregs.exit_on_shutdown=1 --parameter bp.virtio_net.enabled=1 --parameter bp.virtio_net.hostbridge.userNetworking=1 --parameter bp.virtio_net.hostbridge.userNetPorts=8022=22 --parameter cache_state_modelled=0 --parameter bp.secureflashloader.fname=/home/ubuntu/yocto/poky/arm32-aem-build/tmp/deploy/images/fvp-base-arm32/bl1-fvp.bin --parameter bp.flashloader0.fname=/home/ubuntu/yocto/poky/arm32-aem-build/tmp/deploy/images/fvp-base-arm32/fip-fvp.bin --parameter bp.virtioblockdevice.image_path=/home/ubuntu/yocto/poky/arm32-aem-build/tmp/deploy/images/fvp-base-arm32/core-image-minimal-fvp-base-arm32-20250630100348.rootfs.wic --parameter cluster0.has_arm_v8-4=1 --parameter cluster1.has_arm_v8-4=1 --parameter cluster0.cpu0.CONFIG64=0 --parameter cluster0.cpu1.CONFIG64=0 --parameter cluster0.cpu2.CONFIG64=0 --parameter cluster0.cpu3.CONFIG64=0 --parameter cluster1.cpu0.CONFIG64=0 --parameter cluster1.cpu1.CONFIG64=0 --parameter cluster1.cpu2.CONFIG64=0 --parameter cluster1.cpu3.CONFIG64=0 --data cluster0.cpu0=/home/ubuntu/yocto/poky/arm32-aem-build/tmp/deploy/images/fvp-base-arm32/zImage@0x80080000 --data cluster0.cpu0=/home/ubuntu/yocto/poky/arm32-aem-build/tmp/deploy/images/fvp-base-arm32/fvp-base-revc.dtb@0x8fc00000 --parameter 'bp.terminal_0.terminal_command=tmux new-window -n "%title" "telnet localhost %port"' --parameter bp.terminal_1.start_telnet=0 --parameter bp.terminal_2.start_telnet=0 --parameter bp.terminal_3.start_telnet=0 --iris-server --iris-port 7102 --iris-allow-remote And an interrupted (not full for longevity) console log: NOTICE: Booting Trusted Firmware NOTICE: BL1: v2.8(debug):dd37aa5be-dirty NOTICE: BL1: Built : 20:04:50, Aug 4 2025 NOTICE: BL1: Booting BL2 NOTICE: BL2: v2.8(debug):dd37aa5be-dirty NOTICE: BL2: Built : 20:04:50, Aug 4 2025 NOTICE: BL1: Booting BL32 WARNING: FCONF: Invalid config id 26 INFO: SP_MIN FCONF: HW_CONFIG address = 0x7f00000 INFO: FCONF: Reading HW_CONFIG firmware configuration file from: 0x7f00000 INFO: FCONF: Reading firmware configuration information for: cpu_timer INFO: FCONF: Reading firmware configuration information for: uart_config INFO: FCONF: Reading firmware configuration information for: topology INFO: FCONF: Reading firmware configuration information for: gicv3_config NOTICE: SP_MIN: v2.8(debug):dd37aa5be-dirty NOTICE: SP_MIN: Built : 20:04:50, Aug 4 2025 U-Boot 2022.04 (Aug 06 2025 - 16:41:21 +0000) vexpress_aemv8a fvp aarch32 DRAM: 2 GiB WARNING: Caches not enabled Core: 2 devices, 2 uclasses Flash: 64 MiB MMC: Loading Environment from nowhere... OK In: serial_pl01x Out: serial_pl01x Err: serial_pl01x Net: SMC91111-0 Error: SMC91111-0 address not set. Hit any key to stop autoboot: 0 fvp32# dcache on fvp32# run bootcmd OTE: Dereference aliases by omitting the leading '/', e.g. fdt print ethernet0. Kernel image @ 0x80080000 [ 0x000000 - 0x687970 ] ## Flattened Device Tree blob at 8fc00000 Booting using the fdt blob at 0x8fc00000 Loading Device Tree to feb8b000, end feb90fff ... OK Starting kernel ... Booting Linux on physical CPU 0x0 Linux version 6.1.57-yocto-standard (oe-user@oe-host) (arm-poky-linux-gnueabi-gcc (GCC) 12.3.0, GNU ld (GNU Binutils) 2.40.0.20230703) #1 SMP PREEMPT Wed Oct 11 23:03:27 UTC 2023 CPU: ARMv7 Processor [410fd0f0] revision 0 (ARMv7), cr=10c5387d CPU: div instructions available: patching division code CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache OF: fdt: Machine model: FVP Base RevC earlycon: pl11 at MMIO 0x1c090000 (options '') amba 1c1f0000.clcd: deferred probe pending Poky (Yocto Project Reference Distro) 4.2.4 fvp-base-arm32 /dev/ttyAMA0 fvp-base-arm32 login: root root@fvp-base-arm32:~# random: crng init done random: 1 urandom warning(s) missed due to ratelimiting root@fvp-base-arm32:~# Is there a chance FVP_Base_RevC-2xAEMvA doesn't support the 1-stage MMU translation for anything else but Strongly-Ordered? Thanks, Marek

6 months

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Trusted Firmware-A LTS v2.12.6 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.6 is now available. This release contains the following patches: 27fa107db fix(cpus): put back the global declaration for erratum #3701747 [1] 621560d74 fix(cpus): check minor revision before applying runtime errata [2] 44fc77fef fix(cpus): workaround for Cortex-X3 erratum 3692984 [3] cafd1afdc fix(cpus): workaround for Cortex-X3 erratum 3827463 [4] e9bc0b98b fix(cpus): workaround for Cortex-X3 erratum 3213672 [5] 76a1cce97 docs(security): security advisory for CVE-2024-5660 [6] e90ce7577 docs(security): security advisory for CVE-2024-7881 [7] 4b559e72c fix(cpus): workaround for Cortex-X2 erratum 1901946 [8] 7054fa4e7 fix(cpus): workaround for Cortex-X2 erratum 1916945 [9] 7f0fc6bd0 fix(cpus): workaround for Cortex-X2 erratum 1917258 [10] 47ddedb4d fix(cpus): workaround for Cortex-X2 erratum 1927200 [11] 851c5bf1a fix(cpus): workaround for Cortex-X2 erratum 1934260 [12] 66f25a832 fix(cpus): workaround for Cortex-X2 erratum 2136059 [13] 7430412db fix(cpus): workaround for Cortex-X2 erratum 2267065 [14] d1ed44d64 fix(cpus): workaround for Cortex-X2 erratum 2291219 [15] 885b1291a fix(cpus): organize Cortex-X2 errata entries [16] 7fc7f929c fix(cpus): workaround for Cortex-X4 erratum 3133195 [17] ace292ef2 fix(cpus): workaround for Cortex-X4 erratum 3887999 [18] [1] https://review.trustedfirmware.org/q/Ic7a5a13ae89b0b86ccbea56fecfe12bef57a9… [2] https://review.trustedfirmware.org/q/I46b2ba8b524a073e02b4b5de641ae97795bc1… [3] https://review.trustedfirmware.org/q/I054b47d33fd1ff7bde3ae12e8ee3d99e92039… [4] https://review.trustedfirmware.org/q/I1d4a2b9641400d8b9061f7cb32a8312c39956… [5] https://review.trustedfirmware.org/q/Ia1c03217f4e1816b4e8754a090cf5bc17546b… [6] https://review.trustedfirmware.org/q/I0d0428061f60b6fe83d03362b27b960f6ddcc… [7] https://review.trustedfirmware.org/q/Ide976bc8754dc94d23e76001aaecf52556e70… [8] https://review.trustedfirmware.org/q/I5a65db60f06982191994db49815419c4d7250… [9] https://review.trustedfirmware.org/q/If810b1d0a07c43b3e1aa70d2ec88c1dcfa6f7… [10] https://review.trustedfirmware.org/q/Ic18a5179856f861701f09b2556906a6722db8… [11] https://review.trustedfirmware.org/q/I8d9038df1907888b3c5b2520d06bc150665e7… [12] https://review.trustedfirmware.org/q/I180d38fee27175dc8ac5fa6726e5b71c33402… [13] https://review.trustedfirmware.org/q/I156467537c3f235b50fc8aa19a969f2798bd8… [14] https://review.trustedfirmware.org/q/I540e113f209ef11ec7103d4ef4e48ffb52416… [15] https://review.trustedfirmware.org/q/I43af57961feba3a1c001d09ad804740b996f1… [16] https://review.trustedfirmware.org/q/Ic01517d58d3ca1b2d39be5282b0058c94fa5d… [17] https://review.trustedfirmware.org/q/Id44daf950124e7c2d46cb5d6d6a1083d06fad… [18] https://review.trustedfirmware.org/q/I851746b7b430eac85184c8d402d1aa5bb3c94… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.6/change-log.html Thanks, TF-A LTS team

6 months

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Trusted Firmware-A LTS v2.8.36 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.36 is now available. This release contains the following patches: c1555a4b8 docs(security): security advisory for CVE-2024-5660 [1] 624fc1ef2 fix(cpus): workaround for Cortex-X3 erratum 3692984 [2] 016cec654 fix(cpus): workaround for Cortex-X3 erratum 3827463 [3] aecd38e2d fix(cpus): workaround for Cortex-X3 erratum 3213672 [4] 4e7482dec docs(security): security advisory for CVE-2024-7881 [5] 697b97b1c fix(cpus): check minor revision before applying runtime errata [6] e98240355 fix(cpus): workaround for Cortex-X2 erratum 1901946 [7] 09561550a fix(cpus): workaround for Cortex-X2 erratum 1916945 [8] 030aeeb41 fix(cpus): workaround for Cortex-X2 erratum 1917258 [9] 7285f895b fix(cpus): workaround for Cortex-X2 erratum 1927200 [10] d7e3d8d03 fix(cpus): workaround for Cortex-X2 erratum 1934260 [11] 7b27723e3 fix(cpus): workaround for Cortex-X2 erratum 2136059 [12] 9ba7b304f fix(cpus): workaround for Cortex-X2 erratum 2267065 [13] c7de7e847 feat(cpus): add sysreg_bit_toggle [14] c1e2ccbe9 fix(cpus): workaround for Cortex-X2 erratum 2291219 [15] eff911ae6 fix(cpus): organize Cortex-X2 errata entries [16] 23c71d54d fix(cpus): workaround for Cortex-X4 erratum 3133195 [17] c55f75f33 fix(cpus): workaround for Cortex-X4 erratum 3887999 [18] d8f885dda chore(deps-dev): Bump commitizen [19] 083ec60a7 chore(deps-dev): Bump click from 8.1.7 to 8.1.8 [20] [1] https://review.trustedfirmware.org/q/I0d0428061f60b6fe83d03362b27b960f6ddcc… [2] https://review.trustedfirmware.org/q/I054b47d33fd1ff7bde3ae12e8ee3d99e92039… [3] https://review.trustedfirmware.org/q/I1d4a2b9641400d8b9061f7cb32a8312c39956… [4] https://review.trustedfirmware.org/q/Ia1c03217f4e1816b4e8754a090cf5bc17546b… [5] https://review.trustedfirmware.org/q/Ide976bc8754dc94d23e76001aaecf52556e70… [6] https://review.trustedfirmware.org/q/I46b2ba8b524a073e02b4b5de641ae97795bc1… [7] https://review.trustedfirmware.org/q/I5a65db60f06982191994db49815419c4d7250… [8] https://review.trustedfirmware.org/q/If810b1d0a07c43b3e1aa70d2ec88c1dcfa6f7… [9] https://review.trustedfirmware.org/q/Ic18a5179856f861701f09b2556906a6722db8… [10] https://review.trustedfirmware.org/q/I8d9038df1907888b3c5b2520d06bc150665e7… [11] https://review.trustedfirmware.org/q/I180d38fee27175dc8ac5fa6726e5b71c33402… [12] https://review.trustedfirmware.org/q/I156467537c3f235b50fc8aa19a969f2798bd8… [13] https://review.trustedfirmware.org/q/I540e113f209ef11ec7103d4ef4e48ffb52416… [14] https://review.trustedfirmware.org/q/I058bad58f5949b2d5fe058101410e33b6be1b… [15] https://review.trustedfirmware.org/q/I43af57961feba3a1c001d09ad804740b996f1… [16] https://review.trustedfirmware.org/q/Ic01517d58d3ca1b2d39be5282b0058c94fa5d… [17] https://review.trustedfirmware.org/q/Id44daf950124e7c2d46cb5d6d6a1083d06fad… [18] https://review.trustedfirmware.org/q/I851746b7b430eac85184c8d402d1aa5bb3c94… [19] https://review.trustedfirmware.org/q/Id7a94e085b8cab73efc935e5c71e7b43f6149… [20] https://review.trustedfirmware.org/q/I0e616fa4e45fc803522f1f5fe108fa75e9198… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.36/change-log.html Thanks, TF-A LTS team

6 months

1
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Trusted Firmware-A LTS v2.10.21 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.21 is now available. This release contains the following patches: a8a944318 build(deps-dev): Bump pip-tools from 6.13.0 to 6.14.0 [1] c4e1d4aa4 build(deps-dev): Bump @commitlint/cli from 19.0.0 to 19.8.1 [2] 8fd01f672 build(deps-dev): Bump @commitlint/cz-commitlint from 19.0.0 to 19.8.1 [3] 11ac166ca build(deps-dev): Bump @commitlint/config-conventional [4] f13bcf9b1 feat(cpus): add sysreg_bit_toggle [5] 0c79e2503 fix(cpus): workaround for Cortex-X2 erratum 1901946 [6] 8c1313b57 fix(cpus): workaround for Cortex-X2 erratum 1916945 [7] 79048ea18 fix(cpus): workaround for Cortex-X2 erratum 1917258 [8] 7f237698e fix(cpus): workaround for Cortex-X2 erratum 1927200 [9] 10388d941 fix(cpus): workaround for Cortex-X2 erratum 1934260 [10] d1320024f fix(cpus): workaround for Cortex-X2 erratum 2136059 [11] 158b26749 fix(cpus): workaround for Cortex-X2 erratum 2267065 [12] 211f2681b fix(cpus): workaround for Cortex-X2 erratum 2291219 [13] 23da5c284 fix(cpus): organize Cortex-X2 errata entries [14] 45e66bf45 fix(cpus): workaround for Cortex-X4 erratum 3133195 [15] dbef7f7f4 fix(cpus): workaround for Cortex-X4 erratum 3887999 [16] d30f0ff2c docs(security): update Advisory TFV-6 [17] [1] https://review.trustedfirmware.org/q/I5b529430588b599402553aed2b4929885053c… [2] https://review.trustedfirmware.org/q/I3c0f687e72c1bd02ef297387f5d2155576e31… [3] https://review.trustedfirmware.org/q/I4baeb1055066d580af5df08ebb4f0f96d6fc2… [4] https://review.trustedfirmware.org/q/Ic27f9c7211ef6535702a9475aeed57c9f2864… [5] https://review.trustedfirmware.org/q/I058bad58f5949b2d5fe058101410e33b6be1b… [6] https://review.trustedfirmware.org/q/I5a65db60f06982191994db49815419c4d7250… [7] https://review.trustedfirmware.org/q/If810b1d0a07c43b3e1aa70d2ec88c1dcfa6f7… [8] https://review.trustedfirmware.org/q/Ic18a5179856f861701f09b2556906a6722db8… [9] https://review.trustedfirmware.org/q/I8d9038df1907888b3c5b2520d06bc150665e7… [10] https://review.trustedfirmware.org/q/I180d38fee27175dc8ac5fa6726e5b71c33402… [11] https://review.trustedfirmware.org/q/I156467537c3f235b50fc8aa19a969f2798bd8… [12] https://review.trustedfirmware.org/q/I540e113f209ef11ec7103d4ef4e48ffb52416… [13] https://review.trustedfirmware.org/q/I43af57961feba3a1c001d09ad804740b996f1… [14] https://review.trustedfirmware.org/q/Ic01517d58d3ca1b2d39be5282b0058c94fa5d… [15] https://review.trustedfirmware.org/q/Id44daf950124e7c2d46cb5d6d6a1083d06fad… [16] https://review.trustedfirmware.org/q/I851746b7b430eac85184c8d402d1aa5bb3c94… [17] https://review.trustedfirmware.org/q/Icb3d039c8949fd6036c729a845646170710ba… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.21/change-log.html Thanks, TF-A LTS team

6 months

1
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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 2 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 487973: Memory - corruptions (ARRAY_VS_SINGLETON) _____________________________________________________________________________________________ *** CID 487973: Memory - corruptions (ARRAY_VS_SINGLETON) /plat/xilinx/versal_net/bl31_versal_net_setup.c: 167 in bl31_early_platform_setup2() 161 xbl_ret = xbl_handover(&bl32_image_ep_info, &bl33_image_ep_info, 162 tfa_handoff_addr); 163 if (xbl_ret == XBL_HANDOFF_SUCCESS) { 164 goto success; 165 } 166 #if DEBUG >>> CID 487973: Memory - corruptions (ARRAY_VS_SINGLETON) >>> Passing "&boot_mode" to function "get_boot_mode" which uses it as an array. This might corrupt or misinterpret adjacent memory locations. 167 get_boot_mode(&boot_mode); 168 if ((xbl_ret != XBL_HANDOFF_SUCCESS) && (boot_mode == JTAG_MODE)) { 169 bl31_set_default_config(); 170 goto success; 171 } 172 #endif ** CID 487972: Memory - corruptions (OVERRUN) _____________________________________________________________________________________________ *** CID 487972: Memory - corruptions (OVERRUN) /plat/xilinx/versal_net/bl31_versal_net_setup.c: 167 in bl31_early_platform_setup2() 161 xbl_ret = xbl_handover(&bl32_image_ep_info, &bl33_image_ep_info, 162 tfa_handoff_addr); 163 if (xbl_ret == XBL_HANDOFF_SUCCESS) { 164 goto success; 165 } 166 #if DEBUG >>> CID 487972: Memory - corruptions (OVERRUN) >>> Overrunning buffer pointed to by "&boot_mode" of 1 4-byte elements by passing it to a function which accesses it at element index 5 (byte offset 23). 167 get_boot_mode(&boot_mode); 168 if ((xbl_ret != XBL_HANDOFF_SUCCESS) && (boot_mode == JTAG_MODE)) { 169 bl31_set_default_config(); 170 goto success; 171 } 172 #endif ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

6 months, 1 week

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Rusted Firmware-A is live!

by Olivier Deprez

Hi, Relaying an important announcement about the new Rusted Firmware-A project hosted on trustedfirmware.org: Today, the Trusted Firmware organization proudly unveils Rusted Firmware-A (RF-A) v0.1 \u2014 a ground breaking open-source prototype that reimagines Trusted Firmware-A (TF-A) through the adoption of the Rust programming language. Developed in close collaboration between Arm and Google, both Diamond members of the Trusted Firmware community, RF-A has been architected from the ground up for the latest Arm® A-class processors. With a security-first approach, RF-A delivers strong memory safety, enhanced reliability, and modern modularity. Unlike incremental updates, Rusted Firmware-A is a complete redesign \u2014 free from legacy constraints, built to leverage modern hardware, and designed to provide a robust, maintainable, and future-ready firmware foundation. This milestone reflects years of industry learnings, community insights, and deep collaboration between leading software and silicon providers. Press release - https://www.trustedfirmware.org/news/rf-a-press-release Technical blog - https://www.trustedfirmware.org/blog/rf-a-blog Linkedin post - https://www.linkedin.com/posts/trustedfirmware-org_rusted-firmware-a-rf-a-a… Regards, Olivier on behalf of Arm RF-A team.

6 months, 2 weeks

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Trusted Firmware-A LTS v2.10.20 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.20 is now available. This release contains the following patches: 0f23418f7 docs(security): security advisory for CVE-2024-5660 [1] 2749de008 docs(security): security advisory for CVE-2024-7881 [2] dc0b5b922 fix(cpus): workaround for Cortex-X3 erratum 3692984 [3] fe66ffc80 fix(cpus): workaround for Cortex-X3 erratum 3827463 [4] bf658f6e6 fix(cpus): workaround for Cortex-X3 erratum 3213672 [5] dd846c6b4 fix(cpus): check minor revision before applying runtime errata [6] 588d93fe4 chore(deps): bump sphinxcontrib-svg2pdfconverter from 1.2.2 to 1.3.0 [7] a843ce313 chore(deps): bump commitizen [8] d7d698694 fix(cpus): put back the global declaration for erratum #3701747 [9] [1] https://review.trustedfirmware.org/q/I0d0428061f60b6fe83d03362b27b960f6ddcc… [2] https://review.trustedfirmware.org/q/Ide976bc8754dc94d23e76001aaecf52556e70… [3] https://review.trustedfirmware.org/q/I054b47d33fd1ff7bde3ae12e8ee3d99e92039… [4] https://review.trustedfirmware.org/q/I1d4a2b9641400d8b9061f7cb32a8312c39956… [5] https://review.trustedfirmware.org/q/Ia1c03217f4e1816b4e8754a090cf5bc17546b… [6] https://review.trustedfirmware.org/q/I46b2ba8b524a073e02b4b5de641ae97795bc1… [7] https://review.trustedfirmware.org/q/Ia884121a4eeaf8033ff251e509264c9c97299… [8] https://review.trustedfirmware.org/q/I0cd50a9d7df7dac842a781b5f05a507d6f79d… [9] https://review.trustedfirmware.org/q/Ic7a5a13ae89b0b86ccbea56fecfe12bef57a9… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.20/change-log.html Thanks, TF-A LTS team

6 months, 3 weeks

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 487601: Control flow issues (DEADCODE) /plat/mediatek/drivers/spm/mt8189/mt_spm_pmic_lp.c: 157 in set_vcore_lp_volt() _____________________________________________________________________________________________ *** CID 487601: Control flow issues (DEADCODE) /plat/mediatek/drivers/spm/mt8189/mt_spm_pmic_lp.c: 157 in set_vcore_lp_volt() 151 { 152 /* allow 0.35V ~ 0.75V */ 153 if (volt < VCORE_0_35V) 154 return; 155 if (volt > VCORE_0_75V) 156 return; >>> CID 487601: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "vcore_suspend_vol = volt;". 157 vcore_suspend_vol = volt; 158 } 159 160 uint32_t get_vcore_lp_volt(void) 161 { 162 return vcore_suspend_vol; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

6 months, 3 weeks

1
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optee_ftpm + ms-tpm-20-ref support for RSA key sizes 3072 or 4096 causes a panic

by Dennis Kong

Dear community: I apologize in advance if this is the incorrect place to solicit for input on an issue I am having when enabling support of RSA key sizes > 2048. The environment is described below: TI AM642-EVM board Debian Bookworm running kernel 6.6.100, tpm_ftpm_tee.ko kernel module Uboot booting from sdcard UEFI partition and rootfs partition optee_os version 4.5.0 , 4.6.0, 4.7.0 (no difference in behaviour) optee_client version 4.5.0, 4.6.0, 4.7.0 (no difference in behaviour) optee_ftpm version 4.5.0 or 4.6.0, 4.7.0 (no difference in behaviour) ms-tpm-20-ref commit id 98b60a44aba79b15fcce1c0d1e46cf5918400f6a and e9fc7b89d865536c46deb63f9c7d0121a3ded49c Due to issues with RPMB, we decided to use REE_FS instead. Everything works correctly when I create RSA 2048 keys using tpm2-openssl and related tools: sudo tpm2_createprimary -C o -G rsa2048 -g sha256 -c primary.ctx, When I try rsa3072 or 4096, I get errors from the command line response saying invalid input parameters. I changed the ms-tpm-20-ref include file TpmProfile.h to set RSA_3072 and RSA_4096 macros both to (ALG_RSA && YES). After rebuilding and running, I now get an optee panic for ANY RSA key request INCLUDING rsa2048. I read suggestions to increase the MAX_COMMAND_SIZE/MAX_RESPONSE_SIZE on both the kernel driver tpm_ftpm_tee.ko and also optee_os/optee_ftpm, as well to increase relevant TA_STACK_SIZE and TA_HEAP_SIZE and TA_DATA_SIZE, but nothing seems to change the panic output: sudo tpm2_createprimary -C o -G rsa2048 -g sha256 -c primary.ctx============================================================ E/TC:? 0 E/TC:? 0 TA panicked with code 0xffff0007 E/LD: Status of TA bc50d971-d4c9-42c4-82cb-343fb7f37896 E/LD: arch: aarch64 E/LD: region 0: va 0x40005000 pa 0x9e8b0000 size 0x002000 flags rw-s (ldelf) E/LD: region 1: va 0x40007000 pa 0x9e8b2000 size 0x008000 flags r-xs (ldelf) E/LD: region 2: va 0x4000f000 pa 0x9e8ba000 size 0x001000 flags rw-s (ldelf) E/LD: region 3: va 0x40010000 pa 0x9e8bb000 size 0x004000 flags rw-s (ldelf) E/LD: region 4: va 0x40014000 pa 0x9e8bf000 size 0x001000 flags r--s E/LD: region 5: va 0x40015000 pa 0x9e934000 size 0x011000 flags rw-s (stack) E/LD: region 6: va 0x40026000 pa 0x8ebf0000 size 0x002000 flags rw-- (param) E/LD: region 7: va 0x4006e000 pa 0x9e8c0000 size 0x058000 flags r-xs [0] E/LD: region 8: va 0x400c6000 pa 0x9e918000 size 0x01c000 flags rw-s [0] E/LD: [0] bc50d971-d4c9-42c4-82cb-343fb7f37896 @ 0x4006e000 E/LD: Call stack: E/LD: 0x4006f394 E/LD: 0x40095edc E/LD: 0x4007b5a8 E/LD: 0x400985fc E/LD: 0x40098a70 E/LD: 0x4006fae0 E/LD: 0x400a5508 E/LD: 0x40098b9c D/TC:? 0 user_ta_enter:195 tee_user_ta_enter: TA panicked with code 0xffff0007 D/TC:? 0 release_ta_ctx:670 Releasing panicked TA ctx D/TC:? 0 tee_ta_invoke_command:798 Error: ffff3024 of 3 [ 218.944680] tpm tpm0: ftpm_tee_tpm_op_send: SUBMIT_COMMAND invoke error: 0xffff3024 [ 218.952379] tpm tpm0: tpm_try_transmit: send(): error -53212 D/TC:? 0 tee_ta_invoke_command:798 Error: ffff3024 of 3 [ 218.963359] tpm tpm0: ftpm_tee_tpm_op_send: SUBMIT_COMMAND invoke error: 0xffff3024 [ 218.974241] tpm tpm0: tpm_try_transmit: send(): error -53212 D/TC:? 0 tee_ta_invoke_command:798 Error: ffff3024 of 3 [ 218.985675] tpm tpm0: ftpm_tee_tpm_op_send: SUBMIT_COMMAND invoke error: 0xffff3024 [ 218.993366] tpm tpm0: tpm_try_transmit: send(): error -53212 [ 218.999044] tpm tpm0: tpm2_commit_space: error -14 ERROR:tcti:src/tss2-tcti/tcti-device.c:198:tcti_device_receive()D/TC:? 0 tee_ta_invoke_command:798 Error: ffff3024 of 3 Failed to get response size fd 3, got errno 14: Bad address E[ 219.015351] tpm tpm0: ftpm_tee_tpm_op_send: SUBMIT_COMMAND invoke error: 0xffff3024 RROR:esys:src/tss2-esys/api/Esys_CreatePrimary.c:404:Esys_Create[ 219.028348] tpm tpm0: tpm_try_transmit: send(): error -53212 Primary_Finish() Received a non-TPM Error ERROR:esys:src/tss2-esys/api/Esys_CreatePrimary.c:135:Esys_CreatePrimary() Esys Finish ErrorCode (0x000a000a) ERROR: Esys_CreatePrimary(0xA000A) - tcti:IO failure ERROR:esys:src/tss2-esys/esys_iutil.c:1145:iesys_check_sequence_async() Esys called in bad sequence. ERROR:esys:src/tss2-esys/api/Esys_FlushContext.c:66:Esys_FlushContext() Error in async function ErrorCode (0x00070007) ============================================================================= The last suggestion I saw was to change my dtb file to include a reserved memory region for optee shared memory and not use the default dynamic shared memory. The issue I have is kernel 6.6.100's tpm_ftpm_tee ignores the "memory-region" dts statement that references the optee_shm reserved memory at at 0xa4000000 in my case. Below is my snippet of the dts file. I heard there are patches in the kernel ftpm driver to support the reserved shared memory, but before I try the patches, can anyone opine whether this could cause the panic that I am seeing? Thanks in advance for anyone who can share any information optee_shm: optee-shm@a4000000 { compatible = "shared-dma-pool"; reg = <0x0 0xa4000000 0x0 0x01000000>; no-map; reusable; }; .... firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; memory-region = <&optee_shm>; }; } Dennis Kong, P.Eng. Staff Engineer Perle Systems Limited 60 Renfrew Drive, Markham, ON L3R 0E1 (905) 475-6070 ext. 2126

6 months, 3 weeks

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Does spmd_group0_interrupt_handler_nwd() need to take into account handling of special INTIDs?

by YANG Jun

Hi there, Do spmd_group0_interrupt_handler_nwd() and spmd_handle_group0_intr_swd() need to take into account handling of special INTIDs? Like ehf_el3_interrupt_handler(): /* * Acknowledge interrupt. Proceed with handling only for valid interrupt * IDs. This situation may arise because of Interrupt Management * Framework identifying an EL3 interrupt, but before it's been * acknowledged here, the interrupt was either deasserted, or there was * a higher-priority interrupt of another type. */ intr_raw = plat_ic_acknowledge_interrupt(); intr = plat_ic_get_interrupt_id(intr_raw); if (intr == INTR_ID_UNAVAILABLE) return 0; Best Regards, Joe Yang

6 months, 4 weeks

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Canceled event with note: TF-A Tech Forum @ Thu Aug 21, 2025 5pm - 6pm (GMT+2) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi, Cancelling the TF-A tech forum session on Aug 21st as expecting low attendance in the summer vacation period and no topic planned on this day. Regards, Olivier. " TF-A Tech Forum Thursday Aug 21, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

6 months, 4 weeks

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Canceled event with note: TF-A Tech Forum @ Thu Aug 7, 2025 5pm - 6pm (GMT+2) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi, Cancelling the TF-A tech forum for this week as no topic proposed. Regards, Olivier. " TF-A Tech Forum Thursday Aug 7, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

6 months, 4 weeks

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Re: Does spmd_group0_interrupt_handler_nwd() need to take into account handling of special INTIDs?

by Yang Joe

Hi Madhukar, Yes, I have encountered a spurious ID(1023) issue once. Best Regards, Joe Yang

7 months

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Trusted Firmware-A LTS v2.8.35 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.35 is now available. This release contains the following patches: 0aaca5da3 fix(cpus): workaround for Cortex-A710 erratum 1901946 [1] b83bf0ad1 fix(cpus): workaround for Cortex-A710 erratum 1916945 [2] e26d08b8c fix(cpus): workaround for Cortex-A710 erratum 1917258 [3] ac23c6eba fix(cpus): workaround for Cortex-A710 erratum 1927200 [4] 777b7063f fix(zynqmp): workaround issue around cntpct_el0 [5] 8a48b31f3 fix(imx8mp): remove ERR050463 VPUMIX workaround [6] [1] https://review.trustedfirmware.org/q/I703f0e6ee122e44a9bc284d90f1465039e3b4… [2] https://review.trustedfirmware.org/q/I54793492c527928d7f266165a31b8613de838… [3] https://review.trustedfirmware.org/q/I1fae91a5e3a8ecea255f0f0a481bfd6196a7d… [4] https://review.trustedfirmware.org/q/I53c4aa17c1c2dc85b68f17d58f93bb1ee6b3d… [5] https://review.trustedfirmware.org/q/Ie43096bb33bb0e02c8cac07f965610b4565e1… [6] https://review.trustedfirmware.org/q/I263531c6eef44a679002cd048e71fb50c63d9… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.35/change-log.html Thanks, TF-A LTS team

7 months, 1 week

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Trusted Firmware-A LTS v2.12.5 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.5 is now available. This release contains the following patches: df4665589 fix(zynqmp): workaround issue around cntpct_el0 [1] f005662e6 fix(imx8mp): remove ERR050463 VPUMIX workaround [2] da60f9c02 fix(cpus): workaround for Cortex-A710 erratum 1901946 [3] e3f2ee2ca fix(cpus): workaround for Cortex-A710 erratum 1916945 [4] bdb9f85e1 fix(cpus): workaround for Cortex-A710 erratum 1917258 [5] 4aa3e4c6c fix(cpus): workaround for Cortex-A710 erratum 1927200 [6] [1] https://review.trustedfirmware.org/q/Ie43096bb33bb0e02c8cac07f965610b4565e1… [2] https://review.trustedfirmware.org/q/I263531c6eef44a679002cd048e71fb50c63d9… [3] https://review.trustedfirmware.org/q/I703f0e6ee122e44a9bc284d90f1465039e3b4… [4] https://review.trustedfirmware.org/q/I54793492c527928d7f266165a31b8613de838… [5] https://review.trustedfirmware.org/q/I1fae91a5e3a8ecea255f0f0a481bfd6196a7d… [6] https://review.trustedfirmware.org/q/I53c4aa17c1c2dc85b68f17d58f93bb1ee6b3d… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.5/change-log.html Thanks, TF-A LTS team

7 months, 1 week

1
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Trusted Firmware-A LTS v2.10.19 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.19 is now available. This release contains the following patches: 5a70c5221 fix(cpus): workaround for Cortex-A710 erratum 1901946 [1] d16c477c7 fix(cpus): workaround for Cortex-A710 erratum 1916945 [2] 2a571f7f2 fix(cpus): workaround for Cortex-A710 erratum 1917258 [3] bc44ad427 fix(cpus): workaround for Cortex-A710 erratum 1927200 [4] b1926f4c0 fix(zynqmp): workaround issue around cntpct_el0 [5] b200b62c2 fix(imx8mp): remove ERR050463 VPUMIX workaround [6] [1] https://review.trustedfirmware.org/q/I703f0e6ee122e44a9bc284d90f1465039e3b4… [2] https://review.trustedfirmware.org/q/I54793492c527928d7f266165a31b8613de838… [3] https://review.trustedfirmware.org/q/I1fae91a5e3a8ecea255f0f0a481bfd6196a7d… [4] https://review.trustedfirmware.org/q/I53c4aa17c1c2dc85b68f17d58f93bb1ee6b3d… [5] https://review.trustedfirmware.org/q/Ie43096bb33bb0e02c8cac07f965610b4565e1… [6] https://review.trustedfirmware.org/q/I263531c6eef44a679002cd048e71fb50c63d9… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.19/change-log.html Thanks, TF-A LTS team

7 months, 1 week

1
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Contributing to Trusted Firmware Armv7-A and Armv8-A

by Waqas Mazhar

Hi all, Hope you are well. I have recently joined this mailing list and am quite keen to contribute to this project but don't know where to start. Currently, I am going through Trusted Firmware A Documentation <https://trustedfirmware-a.readthedocs.io/en/latest/index.html> document and Gerrit code reviews <https://review.trustedfirmware.org/q/status:open+-is:wip> to develop some initial understanding and familiarity about the project. As a first step, I am trying to understand areas where I can contribute. Is there any simple issue for me to pick? I am happy to volunteer. Looking forward to hearing from you, Waqas

7 months, 2 weeks

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TF-A Tech Forum on July 10th 2025 - SMC Fuzzing

by Olivier Deprez

Hi, In the TF-A Tech Forum on July 10th 2025 Mark Dykes from Arm TF-A team will present the topic of SMC Fuzzing with the agenda: Overview of the TF-A fuzzer and its basic implementation in practice. Regards, Olivier. TF-A Tech Forum Thursday Jul 10, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org

7 months, 3 weeks

2
1
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MISRA Compliance: Request to consider filing deviation for 11.1 (Function Pointer Conversions) in TF-A

by Dhruva Gole

Hello, Background & Justification: MISRA C:2012 Rule 11.1 forbids the conversion from a function pointer to any other type. However, in the context of TF-A, we encounter scenarios where this conversion is necessary and performed with full knowledge of the target architecture and toolchain behavior. A prominent example is in low-level platform code, such as transferring control between bootloader stages or passing function entry points for CPU/core bring-up, where the conversion is unavoidable and well-understood. One such example is the K3 PSCI driver [1] where we pass the k3_sec_entrypoint which is of type uintptr_t, to the ti_sci_proc_set_boot_cfg function where the parameter is of type uint64_t. Another place that triggered the discussions behind this MISRA C issue was the TI AM62L PSCI driver [2] that needs a 16b aligned function pointer. We don't have to go into specific case by case discussion of solving these issues, but just wanted to share example use cases of function pointer conversion. Request: I propose we formally document a project-wide MISRA C:2012 Rule 11.1 deviation, reflecting current and future usage throughout the TF-A codebase. This deviation allows us to balance MISRA objectives with the practical and architectural necessities of TF-A development. Rationale: * Conversions between function pointers and other types are essential in several parts of the TF-A codebase, not limited to one module or file. * Platform-specific code (e.g., power management, bootloader hand-offs) relies on this pattern for correct operation. References: [1] https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/ti/k3… [2] https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/ti/k3… -- Best regards, Dhruva Gole Texas Instruments Incorporated

7 months, 4 weeks

2
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