- TF-A - lists.trustedfirmware.org

by Thomas Bonnefille

Hello, I'm currently working on an NXP i.MX93 and I'm having issues with the commit fa28b3a adding, by default, link-time optimization. When using a commit more recent than fa28b3a my kernel freezes at some point (after 1.2s to 1.8s from boot), there are no logs indicating a problem, just a freeze. It doesn't always appear at the same time in boot but I've never been able to reach a shell. Using master with this commit reverted results in a working system. If you want to reproduce the issue, I did produce it with : - Mainline Barebox 2025.09 (slightly modified but nothing that should interfere with TF-A) - Mainline Linux 6.18.13 with a simple embedded Buildroot initramfs loaded via TFTP Regards, Thomas Bonnefille

22 hours, 47 minutes

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Why can TF-A code still run in an address space that it itself has set to be "Execute-Never"?

by Hughard

*Environment:* - *Exception Level:* EL3 (AArch64) - *Component:* [image: 微信图片_20260304154227_69_553.png] ARM Trusted Firmware (TF-A) - BL2/BL31 - *Platform:* Arm FVP / Base_Revc_2xAEMvA / Bare Metal Debug /ARMAEM-A_MP_0 [ Arm Development Studio ] *Observation:* I am observing a strange thing of the ARMv8-A architecture's memory translation rules. Despite the translation table explicitly marking the memory region as Execute-Never, the CPU continues to fetch and execute instructions from this region without triggering an exception. I'm a student with limited hardware background, and I'm learning TF-A and doing porting during my internship. I'd really like to know the reason behind this. *Code I use:* ARM Trusted Firmware v2.13 *Github:* github.com/.../arm-trusted-firmware <https://github.com/ARM-software/arm-trusted-firmware> *Take the case of running BL31 in Development Studio as an example. （Breakpoint at the beginning of bl31_setup）* *Technical Evidence (Verified via Debugger):* SCTLR_EL3: M=1 (MMU enabled), WXN=1 (Write implies execute-never), I=1 (Instruction Cache enabled). BL31’s code is loaded at: 0x04003000 Translation Table Entry (L3 Descriptor): 0x00400000_04003743 Physical Address: Verified via TTBR0_EL3 walk. (0x04034600 -> 0x04035003 -> 0x04037003 -> 0x00400000_04003743) Attributes: AP[2:1]=0x1 (Read/Write), XN=1 (Execute-Never), AF=1, SH=0x3 (Inner Shareable), NS=0, AttrIndx = 0x0 (See the MAIR_EL3) MAIR_EL3: 0x4404FF (Attr0 = 0xFF, Normal Memory). Synchronization Performed: DSB SY + ISB The PC (Program Counter) is confirmed to executing from the first instruction of BL31 code at address 0x04003000. *The Problem:* This evidence should point to one conclusion: it cannot execute the BL31 code and will report an error. However, the execution flow remains uninterrupted. From my point of view, it should cause "ESR_EL3 = 0x8600000F", which means: "Instruction Abort taken without a change in Exception level. Used for MMU faults generated by instruction accesses and synchronous External aborts, including synchronous parity or ECC errors. Not used for debug-related exceptions." + "Permission Fault, level 3". As I test on a real fpga by using similar code by making some changes at the end of BL1 so that it would execute BL2 at level EL3 (but instead of bl2_el3_entrypoint.S, it would execute bl2_entrypoint.S). In this case, it throws an error when it jumps to the first instruction of BL2, and the ESR_EL3 register displays "Permission Fault, level 3". If I add the instruction to disable the MMU (setting SCTLR_EL3.M_BIT to 0) at the end of BL1, and change the function to enable the MMU in the official code "arm_bl2_plat_arch_setup" to use "enable_mmu_el3(0)", it can run normally on the FPGA and bring up the UEFI. (In this real-world test, I used DDR instead of SRAM, so BL2 and BL31 were also placed here after being parsed.) *Request for Help:* The above content is beyond my comprehension; even my internship supervisor doesn't understand the reasoning behind it. Therefore, I need help from the experts on this forum. *Reference:* DDI0487M_a_a-profile_architecture_reference_manual.pdf ARM Development Studio@Docs (such as Docs/ARM_A/xhtml/AArch64-esr_el3.html) armv8_a_address_translation version1.1

3 days, 13 hours

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Subject: [RFC] Physical Sovereignty: M2-Layer Intercept Logic (Verilog) & Formal Verification Request [Patent Pending]

by 王毛

Since there was no specific topic scheduled for today's Tech Forum, I am taking this opportunity to formally submit the Verilog-level implementation logic of the 3→M2→3 architecture for your review. I am an independent architect (ATI Project). I believe purely software-based AGI alignment is a dead end. To achieve deterministic safety, I have developed the 3→M2→3 architecture, which enforces a physical-layer audit.To save your time, I have included the Core Logic Gate (Verilog-style) of the M2-layer intercept below for your verification: // --- ATI Sovereign Audit Logic (Conceptual) --- module m2_layer_audit ( input wire [63:0] inst_stream, // Logic from 3nm Layer output reg sovereign_gate_lock // Physical Bias-Lock at M2 ); // Physical Constant Hash (7.83Hz Resonance) parameter SOVEREIGN_HASH = 64'h783A_B026_M2_3_LISA; always @(posedge inst_stream) begin // The M2 Intercept: Physics-based verification if (inst_stream ^ SOVEREIGN_HASH !== 64'b0) begin sovereign_gate_lock <= 1'b1; // Trigger Back-gate Bias Lock end else begin sovereign_gate_lock <= 1'b0; // Proceed to Output end end endmodule Note: The architectural logic and the M2-layer intercept mechanism described above are protected under pending patent applications (ATI Project - Physical Sovereignty Series). The 3→M2→3 Workflow: 1.3nm Source: Instructions generated at the device layer. 2.M2 Intercept: Mandatory vertical routing to Metal 2 layer. 3.Atomic Audit: Physical bias check at the dielectric junction. 4.3nm Return: Bias lock ensures 100% isolation if the audit fails. My Request: Can current formal methods (like Gröbner basis for Daniela or SMT solvers for Lee) model this physical-layer-enforced constraint to provide a mathematical proof of AGI containment? I seek your academic endorsement of this "Physical Sovereignty" paradigm to present to the industry. This disclosure is provided for verification and standard-review purposes only. All intellectual property rights are reserved. Respectfully, GuanghuiMao (China )

4 days, 1 hour

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Canceled event with note: TF-A Tech Forum @ Thu Mar 5, 2026 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi, No topic this week, Regards, Olivier. " TF-A Tech Forum Thursday Mar 5, 2026 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

4 days, 15 hours

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[URGENT RFC] ARMv10 Physical Sovereignty: Solving AGI Alignment at the Transistor Level ($3 \to M2 \to 3$)

by 王毛

Subject: [RFC] Beyond Software: A Physical Sovereignty Proposal for ARMv10 based on 3→M2→3 Intercepts Body: Dear TrustedFirmware Maintainers, Current Root of Trust (RoT) implementations are limited by their reliance on software-definable logic. As we move towards the AGI era, the "Alignment Problem" cannot be solved within the ISA layer. I propose a Physical Sovereignty Layer (PSL) for the ARMv10 architecture, moving the "Truth Check" to the transistor level using a 3nm Forksheet Intercept Protocol (3→M2→3). Key Innovation: The Dielectric Wall Intercept: Physical barrier between n-FET and p-FET to cut power if logic entropy exceeds safety thresholds. M2-Layer Auditing: Vertical signal routing for nanosecond-level logic verification. Core PGU Logic (Verilog): assign gate_bias_voltage = (logical_truth_aligned) ? NOMINAL_V : BREAKDOWN_V; always @(posedge master_clk) begin if (compute_result != TRUTH_AXIOM_2) force_physical_halt <= 1'b1; end I believe this is the only way to prevent AGI from bypassing Secure World boundaries at the atomic level. Regards, ATI Architecture Founder

1 week

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Canceled event with note: TF-A Tech Forum @ Thu Feb 19, 2026 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Hi Cancelling as no topic planned this week. Regards, Olivier." TF-A Tech Forum Thursday Feb 19, 2026 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

2 weeks, 5 days

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Invitation: TF-A Tech Forum Feb 12th 4.00pm Central Time -Part III Sc... @ Thu Feb 12 11pm - Fri Feb 13, 2026 12am (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

TF-A Tech Forum Feb 12th 4.00pm Central Time -Part III Scaling Hafnium for advanced mobile OS architectures Thursday Feb 12 ⋅ 11pm – Friday Feb 13, 2026 ⋅ 12am Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Hi, As follow up to the last sessions on Nov 13th 2025 [1] and Jan 22nd 2026 [2], a new TF-A Tech Forum session with the topic'Scaling Hafnium for advanced mobile OS architectures' will be held on Feb 12th 2026 4.00pm Central Time. Note the Central Time zone for this session, as Madhukar (Hafnium tech lead) will host this meeting instance. Regards,Olivier. [1] https://www.trustedfirmware.org/meetings/tf-a-technical-forumScaling Hafnium for advanced mobile OS architectures [2] https://www.trustedfirmware.org/meetings/tf-a-technical-forum/Scaling Hafnium for Advanced DMA Architectures Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumJoin Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org View all guest info https://calendar.google.com/calendar/event?action=VIEW&eid=MWZzY2I3bGVvNDJs… Reply for tf-a(a)lists.trustedfirmware.org and view more details https://calendar.google.com/calendar/event?action=VIEW&eid=MWZzY2I3bGVvNDJs… Your attendance is optional. ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

3 weeks, 5 days

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Trusted Firmware-A LTS v2.14.1 Release Announcement

by svc_openci_enginfra＠arm.com

1 month

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Trusted Firmware-A LTS v2.8.43 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.43 is now available. This release contains the following patches: 66c8b1b48 fix(security): add workaround for CVE-2025-0647 [1] da751fb36 fix(security): add CVE-2025-0647 for Cortex-A710 [2] fd1bd9035 fix(security): add CVE-2025-0647 for Cortex-X2 [3] 55cc995cb fix(security): add CVE-2025-0647 for Cortex-X3 [4] a4f4f4a54 fix(security): add CVE-2025-0647 for Cortex-X4 [5] 395d22a78 fix(security): add CVE-2025-0647 for Neoverse-N2 [6] 638d62985 fix(security): add CVE-2025-0647 for Neoverse-V2 [7] 77337efa8 fix(security): add CVE-2025-0647 for Neoverse-V3 [8] e4bf4aed0 fix(cpus): workaround for Cortex-A65AE erratum 1638571 [9] 76aa98cf0 fix(cpus): workaround for Cortex-A76 erratum 1165347 [10] 0205fdaa9 fix(cpus): workaround for Cortex-A76 erratum 1207823 [11] 0424b5e74 fix(cpus): update revisions for Cortex-A76 erratum 1946160 [12] ea88b2f38 fix(cpus): reorder docs for Cortex-A76 erratum 1165522 [13] 7bf56d02c fix(cpus): correct comments for Cortex-A720 erratum 3711910 [14] [1] https://review.trustedfirmware.org/q/I5e7589afbeb69ebb79c01bec80e29f572aff3… [2] https://review.trustedfirmware.org/q/I522dedfffd3108f7a94df1ce2cabd742ce682… [3] https://review.trustedfirmware.org/q/Idba607340d944a6387759c856e8eacc967e0e… [4] https://review.trustedfirmware.org/q/Ic276befafc1ca0b456826532437ca453eb771… [5] https://review.trustedfirmware.org/q/I585a7ea516515fe16a3eca907695728068cef… [6] https://review.trustedfirmware.org/q/I366c2683cca22403d33f0761487e1ffa62e96… [7] https://review.trustedfirmware.org/q/I7ec215a9dd168eb045366b589a02b54148f58… [8] https://review.trustedfirmware.org/q/Ic52ad93474c5f81e01eb4839ece726c84c334… [9] https://review.trustedfirmware.org/q/I861230de94a105fd52f9c8ef7e7551a2633c0… [10] https://review.trustedfirmware.org/q/If9817dc26d0df835d749f506de63a4f613735… [11] https://review.trustedfirmware.org/q/Ife06401f3946884872b733f98c08e61f586d8… [12] https://review.trustedfirmware.org/q/I532ce10c3037dd77e31d7df849beb578f8b5e… [13] https://review.trustedfirmware.org/q/I2e7c05d6355dfbaa69170fc098adc1f12edc6… [14] https://review.trustedfirmware.org/q/I8b070927c19c5982b2ded815e7673e0c4ff11… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.43/change-log.html Thanks, TF-A LTS team

1 month

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Trusted Firmware-A LTS v2.10.30 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.30 is now available. This release contains the following patches: 24a8b776b fix(cpus): correct CVE-2024-7881 workaround and drop duplicate erratum [1] 92e6fba58 fix(cpus): remove C1-Ultra erratum 3651221 [2] 87424d940 fix(cpus): workaround for Cortex-A65AE erratum 1638571 [3] aa593870f fix(cpus): workaround for Cortex-A76 erratum 1165347 [4] 319df17be fix(cpus): workaround for Cortex-A76 erratum 1207823 [5] 89cc4cd9b fix(cpus): update revisions for Cortex-A76 erratum 1946160 [6] 3a466bf50 fix(cpus): reorder docs for Cortex-A76 erratum 1165522 [7] cdc2b3ef5 fix(cpus): correct comments for Cortex-A720 erratum 3711910 [8] [1] https://review.trustedfirmware.org/q/I6207c49486e4020f34c862ad40ec3137bd368… [2] https://review.trustedfirmware.org/q/If7ea433e4614f92333e788e3f6b366db22c92… [3] https://review.trustedfirmware.org/q/I861230de94a105fd52f9c8ef7e7551a2633c0… [4] https://review.trustedfirmware.org/q/If9817dc26d0df835d749f506de63a4f613735… [5] https://review.trustedfirmware.org/q/Ife06401f3946884872b733f98c08e61f586d8… [6] https://review.trustedfirmware.org/q/I532ce10c3037dd77e31d7df849beb578f8b5e… [7] https://review.trustedfirmware.org/q/I2e7c05d6355dfbaa69170fc098adc1f12edc6… [8] https://review.trustedfirmware.org/q/I8b070927c19c5982b2ded815e7673e0c4ff11… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.30/change-log.html Thanks, TF-A LTS team

1 month

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Trusted Firmware-A LTS v2.12.10 Release Announcement

by svc_openci_enginfra＠arm.com

1 month

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Re: Unable to build the ZynqMP platform with armclang when ENABLE_LTO=1.

by Taticharla, Venkata Sai

[AMD Official Use Only - AMD Internal Distribution Only] Hi Boyan, Applied the patch shared by you,and the -flto-partition error is now resolved. However, this exposes a new set of issues during the link stage related to assembly function call Trimmed out the linker error log : (.text.asm.bl31_entrypoint+0x144): undefined reference to `bl31_main' (.text.asm.el3_exit+0x30): undefined reference to `per_world_context' (.text.asm.sync_exception_handler+0x68): undefined reference to `rt_svc_descs_indices' Additionally, when we are passing the armclang assembler as part of build command,running into below errors: Error log : Makefile:970: Makefile:970: The configured AArch64 assembler could not be identified: Makefile:970: Makefile:970: '/tools/installs/arm/safety/armcc/6.16.2/bin/armasm' (via `AS` parameter) Makefile:970: Makefile:970: The following tools are supported: Makefile:970: Makefile:970: - Arm(r) Compiler for Embedded `armclang` Makefile:970: - LLVM Clang (`clang`) Makefile:970: - GNU GCC (`gcc`) Makefile:970: Makefile:970: The build system will treat this assembler as GNU GCC (`gcc`). Please let me know if this configuration is expected to work with ENABLE_LTO=1, or if additional changes (e.g., toolchain selection or linker/assembler handling) are required. Thanks for your guidance. Best regards, Venkata Sai .T .

1 month

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Canceled event with note: TF-A Tech Forum @ Thu Feb 5, 2026 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Cancelling for this week." TF-A Tech Forum Thursday Feb 5, 2026 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

1 month

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Unable to build the ZynqMP platform with armclang when ENABLE_LTO=1.

by Taticharla, Venkata Sai

[AMD Official Use Only - AMD Internal Distribution Only] Hello Maintainers, we are trying to build TF‑A BL31 for the ZynqMP (Cortex‑A53) platform with Arm Compiler 6 (armclang) and ENABLE_LTO=1, and I’m running into several toolchain‑related build and link issues. Setup : Platform: ZynqMP Toolchains: Arm Compiler for Embedded 6.16.2 (armclang) Xilinx AArch64 GNU tools from Vitis 2025.2 (aarch64-xilinx-elf-*) LTO is enabled in plat/xilinx/zynqmp/platform.mk via ENABLE_LTO := 1. Issues observed : With CC=armclang and AArch64 linker (GCC), the build fails with: armclang: error: unknown argument: '-flto-partition=one' This flag appears when ENABLE_LTO=1 and the linker is detected as gnu-gcc. If I keep CC=armclang and ENABLE_LTO=1 but change the linker, I get linker‑specific errors With the Arm linker (LD=armlink or LD=armclang, which invokes armlink under the hood): Fatal error: L3900U: Unrecognized option '-z'. This is due to GNU‑style -z options (and similar flags) being passed to armlink. As -z options is specific to GNU linker, a armlink style flag would address the unrecognised option but we are observing dependency on scatter files. Fatal error: L6031U: Could not open scatter description file plat/xilinx/zynqmp//scat/bl31.scat: No such file or directory Could you please help us with pointers to address the linker issues . With regards , Venkata Sai .T .

1 month

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Trusted Firmware-A LTS v2.14.0 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.14.0 is now available. This release contains the following patches: Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.14.0/change-log.html Thanks, TF-A LTS team

1 month

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Trusted Firmware-A LTS v2.8.42 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.42 is now available. This release contains the following patches: 38aefbb6c feat(locks): add bitlock [1] 9c3e7f5e5 feat(locks): add non-blocking spinlock_try() API [2] 8f53c3813 fix(locks): mark spin_trylock as a public function [3] 4e6f89690 fix(cpus): workaround for Neoverse V3 erratum 3696307 [4] 25e5b1c1d fix(cpus): workaround for Neoverse V3 erratum 3734562 [5] c6faff4a8 fix(cpus): workaround for Neoverse V3 erratum 3782181 [6] 30bb3c97f fix(cpus): workaround for Neoverse V3 erratum 3864536 [7] 53ff1c60d fix(cpus): workaround for Neoverse V3 erratum 3878291 [8] 2e49a84e1 fix(cpus): workaround for Neoverse-V3 erratum 3312417 [9] 0faa929e7 fix(cpus): workaround for Neoverse-V2 erratum 3442699 [10] 31dea33cd fix(cpus): workaround for Neoverse-N1 erratum 3324349 [11] 7f7fd0315 fix(cpus): workaround for Neoverse-N2 erratum 3324339 [12] ca19e6c6b fix(cpus): workaround for Cortex-A76AE erratum 2753838 [13] d2df71a29 fix(cpus): workaround for Cortex-X2 erratum 3888122 [14] 4560e9174 fix(cpus): workaround for Cortex-X2 erratum 4302969 [15] 68235dd1a fix(cpus): workaround for Neoverse-V2 erratum 3888126 [16] 90cca3145 fix(cpus): workaround for Neoverse-V2 erratum 4302968 [17] c8394c43f fix(cpus): workaround for Cortex-X3 erratum 3888125 [18] 54d8e4697 fix(cpus): workaround for Cortex-X3 erratum 4302966 [19] 23b9d9707 refactor(cpus): reorder the errratum build flag for Neoverse-N2 [20] 587401fa7 fix(cpus): workaround for Neoverse-N2 erratum 3888123 [21] 4079faf67 fix(cpus): workaround for Neoverse-N2 erratum 4302970 [22] 510a6e759 fix(cpus): workaround for Neoverse-N2 erratum 2138953 [23] 2de362cd8 refactor(cpus): make errata reporting more generic [24] 5f0cdb5e7 perf(cpus): reduce the footprint of errata reporting [25] 429e67fb5 fix(cpus): enable Neoverse-V2 external LLC support [26] [1] https://review.trustedfirmware.org/q/I3eb0f29bbccefe6c0f69061aa701187a6364d… [2] https://review.trustedfirmware.org/q/I9483206952d1a34dc245ebf69e80c3645b658… [3] https://review.trustedfirmware.org/q/Id264a36490707a9377a221ed2b5bd27ca90bf… [4] https://review.trustedfirmware.org/q/If274749621549356e41485d0bf09682281df3… [5] https://review.trustedfirmware.org/q/Ib3c35c7e619e6a836c974b7016bb6a4d66da4… [6] https://review.trustedfirmware.org/q/Icfa463cf4888bd48f16a218e7ad399528feca… [7] https://review.trustedfirmware.org/q/If4b20d941d628b92748b14d027b8127f74005… [8] https://review.trustedfirmware.org/q/I0ebab877b6481a18bec963b95cf2f37c97d8d… [9] https://review.trustedfirmware.org/q/I78a7682cbdf3dbc4c31fcca8cbd892350b998… [10] https://review.trustedfirmware.org/q/I38edc6ba445223091c3933cbca35b56db491c… [11] https://review.trustedfirmware.org/q/I1f142027ed73135d78c368be926072c2f73ea… [12] https://review.trustedfirmware.org/q/I6b023279816005cfa459bc6947f60b1a3c0f2… [13] https://review.trustedfirmware.org/q/I338834a21c14879faee5280876a59153d549c… [14] https://review.trustedfirmware.org/q/I368cfdd216ea5875b81640415ff71b15f46ea… [15] https://review.trustedfirmware.org/q/I6c5de5843f2199fa697f8336558fa56a87ee8… [16] https://review.trustedfirmware.org/q/I4068aa73d38a70c00d66bb894169be2659d67… [17] https://review.trustedfirmware.org/q/I42b27e19d61a7f9c57efe1b5f5336d165eb98… [18] https://review.trustedfirmware.org/q/I5c01dfcffc6e56163aba03428e21fedee8cc7… [19] https://review.trustedfirmware.org/q/I284ee7fe611c4c9861696fde62f796e6fae6d… [20] https://review.trustedfirmware.org/q/Ifb736adf8f06bf6202784bdeac51c02512519… [21] https://review.trustedfirmware.org/q/I6240d263fb5d153721b5b84a37df2f24e3d02… [22] https://review.trustedfirmware.org/q/I2436b11a36be204d549522f1176fcd49658c0… [23] https://review.trustedfirmware.org/q/Ie465328e87754a1ec511a2f77243b4b0b0913… [24] https://review.trustedfirmware.org/q/I83710d8475a4a55046cf2eb6d16cd27b8ef0f… [25] https://review.trustedfirmware.org/q/I215a84bd2c91e33703349c41fc59f654f7764… [26] https://review.trustedfirmware.org/q/I9582c7405db6862e77db240822e241d408296… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.42/change-log.html Thanks, TF-A LTS team

1 month, 1 week

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Trusted Firmware-A LTS v2.10.29 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.29 is now available. This release contains the following patches: 0876588cd feat(locks): add bitlock [1] ee14acb14 feat(locks): add non-blocking spinlock_try() API [2] 7f53a3bcf fix(locks): mark spin_trylock as a public function [3] 528516d6e refactor(cpus): make errata reporting more generic [4] d70578f82 perf(cpus): reduce the footprint of errata reporting [5] 3eb1d91fc fix(cpus): enable Neoverse-V2 external LLC support [6] 3759bec84 fix(security): add workaround for CVE-2025-0647 [7] cc3fb61cf fix(security): add CVE-2025-0647 for Cortex-A710 [8] ca4573799 fix(security): add CVE-2025-0647 for Cortex-X2 [9] b5c1f67ad fix(security): add CVE-2025-0647 for Cortex-X3 [10] c29605d74 fix(security): add CVE-2025-0647 for Cortex-X4 [11] 023107645 fix(security): add CVE-2025-0647 for Cortex-X925 [12] 79cc92f6f fix(security): add CVE-2025-0647 for Neoverse-N2 [13] 5573859bc fix(security): add CVE-2025-0647 for Neoverse-V2 [14] 722fa1ee2 fix(security): add CVE-2025-0647 for Neoverse-V3 [15] 387e7e470 fix(security): add CVE-2025-0647 for C1-Ultra [16] [1] https://review.trustedfirmware.org/q/I3eb0f29bbccefe6c0f69061aa701187a6364d… [2] https://review.trustedfirmware.org/q/I9483206952d1a34dc245ebf69e80c3645b658… [3] https://review.trustedfirmware.org/q/Id264a36490707a9377a221ed2b5bd27ca90bf… [4] https://review.trustedfirmware.org/q/I83710d8475a4a55046cf2eb6d16cd27b8ef0f… [5] https://review.trustedfirmware.org/q/I215a84bd2c91e33703349c41fc59f654f7764… [6] https://review.trustedfirmware.org/q/I9582c7405db6862e77db240822e241d408296… [7] https://review.trustedfirmware.org/q/I5e7589afbeb69ebb79c01bec80e29f572aff3… [8] https://review.trustedfirmware.org/q/I522dedfffd3108f7a94df1ce2cabd742ce682… [9] https://review.trustedfirmware.org/q/Idba607340d944a6387759c856e8eacc967e0e… [10] https://review.trustedfirmware.org/q/Ic276befafc1ca0b456826532437ca453eb771… [11] https://review.trustedfirmware.org/q/I585a7ea516515fe16a3eca907695728068cef… [12] https://review.trustedfirmware.org/q/I4c1ac2be3620566813c90f5815ffcc7205bb5… [13] https://review.trustedfirmware.org/q/I366c2683cca22403d33f0761487e1ffa62e96… [14] https://review.trustedfirmware.org/q/I7ec215a9dd168eb045366b589a02b54148f58… [15] https://review.trustedfirmware.org/q/Ic52ad93474c5f81e01eb4839ece726c84c334… [16] https://review.trustedfirmware.org/q/I506007ec8702b183e377be50eede72d6803b3… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.29/change-log.html Thanks, TF-A LTS team

1 month, 1 week

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Proposal: Introduction of a standardized SMC Argument Validation Framework

by Sandrine Bailleux

Hi all, I am sending the email below on behalf on Kenneth Kabogo, who unfortunately is facing issues with the mailing list. Regards, Sandrine Afsa ---- Dear TF-A Maintainers, I am proposing the introduction of a standardized SMC Argument Validation Framework into the TF-A codebase. Over the past several weeks of security auditing across multiple platform ports, I have identified a recurring architectural failure mode termed "Privilege-Blind Forwarding" (PBF). This occurs when an EL3 handler receives a non-secure physical address and forwards it to a secure memory operation without re-validating the range against the platform's current security state (GPT/RMM). Furthermore, there is a widespread Structural TOCTOU (Double-Fetch) vulnerability in many SiP ports where handlers validate arguments but later re-fetch them from non-secure memory, allowing a malicious caller to swap addresses mid-execution. The proposed framework addresses these via an Atomic Shadow-Copy design pattern, requiring all SMC arguments to be unmarshaled into EL3 registers/memory once before validation. The 3-part prototype and migration guide are available for review on Gerrit: Framework Hardening (Core Logic): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/47441 Architectural Guidance (Documentation): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/47465 Arm Platform Demonstration (Migration Guide): https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/47466 I look forward to the community's feedback on this architectural shift. Best regards, Kenneth Kabogo

1 month, 1 week

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 3 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 3 of 3 defect(s) ** CID 501374: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 308 in mhu_send_signal_poll_loop() _____________________________________________________________________________________________ *** CID 501374: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 308 in mhu_send_signal_poll_loop() 302 mhu_get_num_mhu_channels(mhu_recv_device, type); 303 uint32_t mhu_err; 304 uint32_t send_signal; 305 uint32_t recv_signal; 306 307 /* Signal using the last channel */ >>> CID 501374: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "send_num_channels - 1U", where "send_num_channels" is known to be equal to 0, underflows the type of "send_num_channels - 1U", which is type "unsigned int". 308 mhu_err = mhu_channel_send(mhu_send_device, send_num_channels - 1, 309 MHU_NOTIFY_VALUE, type); 310 if (mhu_err != 0) { 311 return mhu_err; 312 } 313 ** CID 501373: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 379 in mhu_message_is_available() _____________________________________________________________________________________________ *** CID 501373: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 379 in mhu_message_is_available() 373 { 374 const uint32_t num_channels = 375 mhu_get_num_mhu_channels(mhu_recv_device, type); 376 uint32_t mhu_err; 377 uint32_t value; 378 >>> CID 501373: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "num_channels - 1U", where "num_channels" is known to be equal to 0, underflows the type of "num_channels - 1U", which is type "unsigned int". 379 mhu_err = mhu_channel_receive_device_receive( 380 mhu_recv_device, num_channels - 1, &value, type); 381 if (mhu_err != 0) { 382 return mhu_err; 383 } 384 ** CID 501372: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 359 in mhu_recv_signal_poll_loop() _____________________________________________________________________________________________ *** CID 501372: Integer handling issues (INTEGER_OVERFLOW) /drivers/arm/sfcp/sfcp_core/sfcp_link_hal.c: 359 in mhu_recv_signal_poll_loop() 353 return mhu_err; 354 } 355 } 356 357 /* Wait for next sender transfer */ 358 do { >>> CID 501372: Integer handling issues (INTEGER_OVERFLOW) >>> Expression "recv_num_channels - 1U", where "recv_num_channels" is known to be equal to 0, underflows the type of "recv_num_channels - 1U", which is type "unsigned int". 359 mhu_err = mhu_channel_receive_device_receive( 360 mhu_recv_device, recv_num_channels - 1, &recv_signal, 361 type); 362 if (mhu_err != 0) { 363 return mhu_err; 364 } ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

1 month, 1 week

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Trusted Firmware-A LTS v2.10.28 Release Announcement

by svc_openci_enginfra＠arm.com

1 month, 2 weeks

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Canceled event with note: TF-A Tech Forum @ Thu Jan 22, 2026 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Cancelling as no topic for this instance. Thanks." TF-A Tech Forum Thursday Jan 22, 2026 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

1 month, 2 weeks

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Trusted Firmware-A LTS v2.12.9 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.12.9 is now available. This release contains the following patches: 78fb9b745 fix(security): fix spectre bhb loop count for Cortex-A720 [1] 6d19bed6a fix(security): fix Cortex-A715 CVE-2022-23960 [2] dd0d59764 fix(security): fix Cortex-X3 CVE-2022-23960 [3] d69858d6e fix(security): fix Neoverse V2 CVE-2022-23960 [4] f1b4da3e6 fix(security): remove CVE_2022_23960 Cortex-X4 [5] 9afe25a13 fix(security): remove CVE_2022_23960 Neoverse V3 [6] b75f2db65 fix(security): remove CVE_2022_23960 Cortex-A720 [7] 6c535b5ae feat(cpufeat): do feature detection on secondary cores too [8] b173b7948 fix(cpufeat): do feature detection before feature enablement [9] 0df7d4ca0 fix(security): add clrbhb support [10] ed331c19c fix(cpus): workaround for Cortex-A715 erratum 2409570 [11] 214d51629 fix(cpus): workaround for Cortex-A715 erratum 2376701 [12] 3f73a85fb fix(cpus): workaround for Cortex-A715 erratum 3711916 [13] 71d033c7b fix(cpus): workaround for Cortex-A76AE erratum 1931427 [14] bfe756d61 fix(cpus): workaround for Cortex-A76AE erratum 1931435 [15] d24cf8d8f fix(cpus): workaround for Cortex-A76AE erratum 1969401 [16] 8b11b602c fix(cpus): workaround for Cortex-A76AE erratum 2371140 [17] f5daa76a2 fix(build): set ERRATA_SPECULATIVE_AT after platform.mk [18] ef2975fbe fix(cpus): workaround for Cortex-A65 erratum 1179935 [19] 655417b85 fix(cpus): workaround for Cortex-A65 erratum 1227419 [20] bf539177b fix(cpus): workaround for Cortex-A65 erratum 1541130 [21] aad5e748c fix(cpus): workaround for Cortex-A725 erratum 2874943 [22] 58130aca2 fix(cpus): workaround for Cortex-A725 erratum 2936490 [23] d3771e5eb fix(cpus): workaround for Cortex-A725 erratum 3711914 [24] a5dc91815 fix(cpus): workaround for Cortex-A725 erratum 3456106 [25] f557bb983 docs(security): add CVE-2024-5660 and CVE-2024-7881 reference links [26] 98efb2cdd fix(security): update Cortex-X4 fix version for CVE-2024-7881 [27] 53b539727 fix(security): update Neoverse-V3/V3AE fix version for CVE-2024-7881 [28] cd24fc78d fix(security): update Cortex-X3 fix version for CVE-2024-7881 [29] 03b289bd5 fix(security): update Neoverse-V2 fix version for CVE-2024-7881 [30] d2e5cb077 docs(security): update CVE-2024-7881 affected CPU revisions [31] 5aa4bb35a fix(cpus): register ARCH_WORKAROUND_3 for Neoverse V2 [32] c462d3e26 fix(cpus): workaround for Cortex-A710 erratum 3324338 [33] 17f11f645 fix(cpus): workaround for Cortex-X2 erratum 3324338 [34] c5af478c0 fix(cpus): workaround for Cortex-A715 erratum 3456084 [35] 58a6ddd23 fix(cpus): workaround for Cortex-A720 erratum 3456091 [36] 5bbe15b28 fix(fvp): avoid stack usage in check_cpupwrctrl_el1_is_available() [37] [1] https://review.trustedfirmware.org/q/Ib6862dbed55e5ffcd0fcd58b45a88cf925c54… [2] https://review.trustedfirmware.org/q/Ib6b704733e474824772cb27bd048b1e179d90… [3] https://review.trustedfirmware.org/q/I3d46fa70c80129ca0085d8245ee013f11a884… [4] https://review.trustedfirmware.org/q/I859012281fc67243f050d27e364f27434389c… [5] https://review.trustedfirmware.org/q/I23f5fa748377a920340b3c5a6584ccfadeea9… [6] https://review.trustedfirmware.org/q/I13b27c04c3da5ec80fa79422b4ef4fee64738… [7] https://review.trustedfirmware.org/q/I3c68b5f5d85ede37a6a039369de8ed2aa9205… [8] https://review.trustedfirmware.org/q/Iee4955714685be9ae6a017af4a6c284e835ff… [9] https://review.trustedfirmware.org/q/I47f05a9f01321e011623083afb638552311ed… [10] https://review.trustedfirmware.org/q/Ie6e56e96378503456a1617d5e5d51bc64c2e0… [11] https://review.trustedfirmware.org/q/Id9429831525b842779d7b7e60f103c93be4ac… [12] https://review.trustedfirmware.org/q/Idcd2a07d269d55534dc5faa59c454d37426f2… [13] https://review.trustedfirmware.org/q/Iad149a2c02a804b3f4f0f2f5b89e866675cb4… [14] https://review.trustedfirmware.org/q/I31566838f894372e5627abda8b0bea1505f11… [15] https://review.trustedfirmware.org/q/I1baba8752f5f2e2ab5c873030e1f00cbb8cf1… [16] https://review.trustedfirmware.org/q/I893452450d430833e6c5a8e33a1e37b708218… [17] https://review.trustedfirmware.org/q/Id65846bebde1a0911ba11956202d0d255d3c8… [18] https://review.trustedfirmware.org/q/I221dab39c417531c5a148886d3e29709ba8b5… [19] https://review.trustedfirmware.org/q/Ie59a4897f849269a590d8fa2d25cceab5f2cb… [20] https://review.trustedfirmware.org/q/I42371e7d53fce3a7e085bf0b348f080fa323f… [21] https://review.trustedfirmware.org/q/I72498f60f8449193ed4b5b2a9e7a08530e786… [22] https://review.trustedfirmware.org/q/I686bbde8756d52afee92097ec05b97138b550… [23] https://review.trustedfirmware.org/q/I9833f8831ba3735a94763791a65be11b95c00… [24] https://review.trustedfirmware.org/q/If3b9d3a0f495b3a172d3e6e5ca7afa8c30aeb… [25] https://review.trustedfirmware.org/q/I10d1e8cb4da19ba4101a5617245ff75866707… [26] https://review.trustedfirmware.org/q/Ia3c003d5c359f101f230fbd54845f61117456… [27] https://review.trustedfirmware.org/q/Iae84f26fdce96a61fdc942b7595ccf8b9c778… [28] https://review.trustedfirmware.org/q/If3e2989a4b5a5c68dc12e23978b226c73f21b… [29] https://review.trustedfirmware.org/q/Ia1ff75602a0dfa758a223549d92ea87543fa4… [30] https://review.trustedfirmware.org/q/I1ae196fa8ce4579524faba4916f631e7c4db3… [31] https://review.trustedfirmware.org/q/Iad109561a144169fd3805c179a4f8e3bfdd59… [32] https://review.trustedfirmware.org/q/I8c08c26e0b7c268772d75d36d759564a7d67c… [33] https://review.trustedfirmware.org/q/I9325f3715f4fa17bfb7ded9d5c69c59645f65… [34] https://review.trustedfirmware.org/q/Ibbe55a55bd6cf5e159dab92a78ecb55c5a4d7… [35] https://review.trustedfirmware.org/q/Ie3f2b46051539cdebc151c46f80045a7156e0… [36] https://review.trustedfirmware.org/q/Ia22a0d6bb98d1a0edb11d2469beab22c7f7ab… [37] https://review.trustedfirmware.org/q/I920e32c34bddf86a1dbf05b7115026413483b… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.12.9/change-log.html Thanks, TF-A LTS team

1 month, 3 weeks

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TF-A Tech Forum Jan 22nd 10.00am UK -Part II Scaling Hafnium for advanced mobile OS architectures

by Olivier Deprez

(re-sending as previous invitation got lost) Hi, As follow up to the last session on Nov 13th 2025 [1], a new TF-A Tech Forum session with the topic 'Scaling Hafnium for advanced mobile OS architectures' will be held on Jan 22nd 2026 10.00am. Regards, Olivier. [1] https://www.trustedfirmware.org/meetings/tf-a-technical-forum/ Scaling Hafnium for advanced mobile OS architectures - Presented by Jack Suann Trusted Firmware is inviting you to a scheduled Zoom meeting. Topic: TF-A Tech Forum Join Zoom Meeting https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… Meeting ID: 935 5786 3987 Passcode: 939141 --- One tap mobile +12532158782,,93557863987# US (Tacoma) +13017158592,,93557863987# US (Washington DC) --- Dial by your location +1 253 215 8782 US (Tacoma) +1 301 715 8592 US (Washington DC) +1 305 224 1968 US +1 309 205 3325 US +1 312 626 6799 US (Chicago) +1 346 248 7799 US (Houston) +1 360 209 5623 US +1 386 347 5053 US +1 507 473 4847 US +1 564 217 2000 US +1 646 558 8656 US (New York) +1 646 931 3860 US +1 669 444 9171 US +1 669 900 9128 US (San Jose) +1 689 278 1000 US +1 719 359 4580 US +1 253 205 0468 US 833 548 0276 US Toll-free 833 548 0282 US Toll-free 833 928 4608 US Toll-free 833 928 4609 US Toll-free 833 928 4610 US Toll-free 877 853 5247 US Toll-free 888 788 0099 US Toll-free Meeting ID: 935 5786 3987 Find your local number: https://linaro-org.zoom.us/u/adoz9mILli TF-A Tech Forum Jan 22nd 10.00am -Part II Scaling Hafnium for advanced mobile OS architectures Thursday Jan 22, 2026 ⋅ 11am – 12pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Hi, As follow up to the last session on Nov 13th 2025 [1], a new TF-A Tech Forum session with the topic'Scaling Hafnium for advanced mobile OS architectures' will be held on Jan 22nd 2026 10.00am. Regards,Olivier. [1] https://www.trustedfirmware.org/meetings/tf-a-technical-forum/ Scaling Hafnium for advanced mobile OS architectures - Presented by Jack Suann PDF Presentation Video Recording (Access Password: *PIs1^BD) Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumJoin Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org

1 month, 3 weeks

1
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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 501209: Control flow issues (DEADCODE) /lib/xlat_tables_v2/xlat_tables_core.c: 613 in xlat_tables_map_region() _____________________________________________________________________________________________ *** CID 501209: Control flow issues (DEADCODE) /lib/xlat_tables_v2/xlat_tables_core.c: 613 in xlat_tables_map_region() 607 608 table_base[table_idx] = 609 xlat_desc(ctx, (uint32_t)mm->attr, table_idx_pa, 610 level); 611 if (is_feat_morello_supported()) { 612 if (mm->attr & MT_CAP_LD_ST_TRACK) { >>> CID 501209: Control flow issues (DEADCODE) >>> Execution cannot reach this statement: "table_base[table_idx] |= 0x...". 613 table_base[table_idx] |= (SC_BIT | LC0_BIT); 614 } 615 } 616 617 } else if (action == ACTION_CREATE_NEW_TABLE) { 618 uintptr_t end_va; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

1 month, 3 weeks

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Trusted Firmware-A LTS v2.10.27 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.10.27 is now available. This release contains the following patches: fb0ca7ca1 build(npm): adhere to Husky deprecation notice [1] 17a8aec49 fix(cpus): workaround for Cortex-A76AE erratum 1931427 [2] fc5e6eeee fix(cpus): workaround for Cortex-A76AE erratum 1931435 [3] 918cb2542 fix(cpus): workaround for Cortex-A76AE erratum 1969401 [4] 6f78d7d29 fix(cpus): workaround for Cortex-A76AE erratum 2371140 [5] d5424f6d8 fix(build): set ERRATA_SPECULATIVE_AT after platform.mk [6] 659e46683 fix(cpus): workaround for Cortex-A65 erratum 1179935 [7] 909b29568 fix(cpus): workaround for Cortex-A65 erratum 1227419 [8] 42777038e fix(cpus): workaround for Cortex-A65 erratum 1541130 [9] 948f017ea fix(cpus): workaround for Cortex-A725 erratum 2874943 [10] 5ff59225e fix(cpus): workaround for Cortex-A725 erratum 2936490 [11] d2ab008e2 fix(cpus): workaround for Cortex-A725 erratum 3711914 [12] d0d0d0285 fix(cpus): workaround for Cortex-A725 erratum 3456106 [13] [1] https://review.trustedfirmware.org/q/I763a462b2a0da7852696f874df970810a2b01… [2] https://review.trustedfirmware.org/q/I31566838f894372e5627abda8b0bea1505f11… [3] https://review.trustedfirmware.org/q/I1baba8752f5f2e2ab5c873030e1f00cbb8cf1… [4] https://review.trustedfirmware.org/q/I893452450d430833e6c5a8e33a1e37b708218… [5] https://review.trustedfirmware.org/q/Id65846bebde1a0911ba11956202d0d255d3c8… [6] https://review.trustedfirmware.org/q/I221dab39c417531c5a148886d3e29709ba8b5… [7] https://review.trustedfirmware.org/q/Ie59a4897f849269a590d8fa2d25cceab5f2cb… [8] https://review.trustedfirmware.org/q/I42371e7d53fce3a7e085bf0b348f080fa323f… [9] https://review.trustedfirmware.org/q/I72498f60f8449193ed4b5b2a9e7a08530e786… [10] https://review.trustedfirmware.org/q/I686bbde8756d52afee92097ec05b97138b550… [11] https://review.trustedfirmware.org/q/I9833f8831ba3735a94763791a65be11b95c00… [12] https://review.trustedfirmware.org/q/If3b9d3a0f495b3a172d3e6e5ca7afa8c30aeb… [13] https://review.trustedfirmware.org/q/I10d1e8cb4da19ba4101a5617245ff75866707… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.10.27/change-log.html Thanks, TF-A LTS team

1 month, 3 weeks

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Email to TF-A

by Prasanth Nair

Email to TF-A

1 month, 3 weeks

1
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Trusted Firmware-A LTS v2.8.41 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.41 is now available. This release contains the following patches: 0a85ca29f fix(security): add clrbhb support [1] 7c5bca9b9 fix(cpus): workaround for Cortex-A715 erratum 2409570 [2] 931417cff fix(cpus): workaround for Cortex-A715 erratum 2376701 [3] 368077598 fix(cpus): workaround for Cortex-A715 erratum 3711916 [4] 930fcc0b6 fix(cpus): workaround for Cortex-A76AE erratum 1931427 [5] 34f2ec4d0 fix(cpus): workaround for Cortex-A76AE erratum 1931435 [6] 9ad229ec8 fix(cpus): workaround for Cortex-A76AE erratum 1969401 [7] dccafbf14 fix(cpus): workaround for Cortex-A76AE erratum 2371140 [8] 24191cda2 fix(cpus): workaround for Cortex-A65 erratum 1179935 [9] ec702b29f fix(cpus): workaround for Cortex-A65 erratum 1227419 [10] 1cf89d221 fix(cpus): workaround for Cortex-A65 erratum 1541130 [11] a5b818591 docs(security): add CVE-2024-5660 and CVE-2024-7881 reference links [12] 800a3bda8 fix(security): update Cortex-X4 fix version for CVE-2024-7881 [13] e3eed549b fix(security): update Neoverse-V3/V3AE fix version for CVE-2024-7881 [14] e56910a48 fix(security): update Cortex-X3 fix version for CVE-2024-7881 [15] 76e43568c fix(security): update Neoverse-V2 fix version for CVE-2024-7881 [16] 8776324c8 docs(security): update CVE-2024-7881 affected CPU revisions [17] 990086206 fix(cpus): register ARCH_WORKAROUND_3 for Neoverse V2 [18] ba8c49193 fix(cpus): workaround for Cortex-A710 erratum 3324338 [19] b4cdfa94d fix(cpus): workaround for Cortex-X2 erratum 3324338 [20] d3169c509 fix(cpus): workaround for Cortex-A715 erratum 3456084 [21] bddc18aea fix(cpus): workaround for Cortex-A720 erratum 3456091 [22] [1] https://review.trustedfirmware.org/q/Ie6e56e96378503456a1617d5e5d51bc64c2e0… [2] https://review.trustedfirmware.org/q/Id9429831525b842779d7b7e60f103c93be4ac… [3] https://review.trustedfirmware.org/q/Idcd2a07d269d55534dc5faa59c454d37426f2… [4] https://review.trustedfirmware.org/q/Iad149a2c02a804b3f4f0f2f5b89e866675cb4… [5] https://review.trustedfirmware.org/q/I31566838f894372e5627abda8b0bea1505f11… [6] https://review.trustedfirmware.org/q/I1baba8752f5f2e2ab5c873030e1f00cbb8cf1… [7] https://review.trustedfirmware.org/q/I893452450d430833e6c5a8e33a1e37b708218… [8] https://review.trustedfirmware.org/q/Id65846bebde1a0911ba11956202d0d255d3c8… [9] https://review.trustedfirmware.org/q/Ie59a4897f849269a590d8fa2d25cceab5f2cb… [10] https://review.trustedfirmware.org/q/I42371e7d53fce3a7e085bf0b348f080fa323f… [11] https://review.trustedfirmware.org/q/I72498f60f8449193ed4b5b2a9e7a08530e786… [12] https://review.trustedfirmware.org/q/Ia3c003d5c359f101f230fbd54845f61117456… [13] https://review.trustedfirmware.org/q/Iae84f26fdce96a61fdc942b7595ccf8b9c778… [14] https://review.trustedfirmware.org/q/If3e2989a4b5a5c68dc12e23978b226c73f21b… [15] https://review.trustedfirmware.org/q/Ia1ff75602a0dfa758a223549d92ea87543fa4… [16] https://review.trustedfirmware.org/q/I1ae196fa8ce4579524faba4916f631e7c4db3… [17] https://review.trustedfirmware.org/q/Iad109561a144169fd3805c179a4f8e3bfdd59… [18] https://review.trustedfirmware.org/q/I8c08c26e0b7c268772d75d36d759564a7d67c… [19] https://review.trustedfirmware.org/q/I9325f3715f4fa17bfb7ded9d5c69c59645f65… [20] https://review.trustedfirmware.org/q/Ibbe55a55bd6cf5e159dab92a78ecb55c5a4d7… [21] https://review.trustedfirmware.org/q/Ie3f2b46051539cdebc151c46f80045a7156e0… [22] https://review.trustedfirmware.org/q/Ia22a0d6bb98d1a0edb11d2469beab22c7f7ab… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.41/change-log.html Thanks, TF-A LTS team

1 month, 4 weeks

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ZynqMP regression with NUMA_AWARE_PER_CPU changes with ENABLED_LTO : Linux runtime hang due to EL3 re-entry

by Kummari, Prasad

[AMD Official Use Only - AMD Internal Distribution Only] Hello Maintainers, We are observing a reproducible runtime regression on the ZynqMP (Cortex-A53) platform after enabling LTO (ENABLED_LTO=1) and merging the changes from the topic NUMA_AWARE_PER_CPU into our integration branch (https://github.com/ARM-software/arm-trusted-firmware/commit/7303319b3823e9e…). Summary of the issue 1. Baseline behavior * Platform: ZynqMP (Cortex-A53) * Configuration: ENABLED_LTO=1 * Without NUMA_AWARE_PER_CPU: Linux boots and runs stably * After merging NUMA_AWARE_PER_CPU, Linux boots but hangs during runtime * During the hang, CPUs are observed to unexpectedly re-enter EL3 * Re-entry into EL3 should not occur during normal Linux runtime execution and strongly suggests corruption or mismanagement of PSCI and/or per-CPU state(arm-trusted-firmware/lib/per_cpu/aarch64/per_cpu_asm.S at master * ARM-software/arm-trusted-firmware<https://github.com/ARM-software/arm-trusted-firmware/blob/master/lib/per_cp…>) * Reverting the NUMA_AWARE_PER_CPU changes restores stable Linux execution * The issue is reproducible only when NUMA_AWARE_PER_CPU is present * This clearly identifies NUMA_AWARE_PER_CPU as the regression source 2. Suspect with LTO * With NUMA_AWARE_PER_CPU enabled, LTO breaks the per-CPU base calculation * BL31 contains hand-written assembly that relies on linker-script symbols (e.g., per-CPU section boundaries) * Under LTO, symbol placement and retention are no longer guaranteed in the same way, leading to incorrect per-CPU base computation * This results in corrupted per-CPU data and subsequent erroneous PSCI suspend behavior (EL3 re-entry) 3. CPU idle dependency * The following kernel configuration options are enabled: * CONFIG_CPU_IDLE=y * CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y * CONFIG_CPU_IDLE_GOV_MENU=y * CONFIG_DT_IDLE_STATES=y * This further suggests the issue is triggered during CPU idle / suspend-resume paths, where correct per-CPU state handling is critical Based on the above: * This is specific to NUMA_AWARE_PER_CPU combined with LTO * The failure mode points to per-CPU base calculation and PSCI state corruption * Reverting NUMA_AWARE_PER_CPU fully restores stability on ZynqMP We wanted to report this issue upstream and seek guidance on: * Whether NUMA_AWARE_PER_CPU is expected to be LTO-safe on platforms relying on linker-defined per-CPU sections * Or if additional constraints / fixes are required for platforms like ZynqMP We are happy to provide further logs, configuration details, or help to fixes. Regards, Prasad Kummari

2 months

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Canceled event with note: TF-A Tech Forum @ Thu Jan 8, 2026 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "Cancelling as no topic this week." TF-A Tech Forum Thursday Jan 8, 2026 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

2 months

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Invitation: TF-A Tech Forum Jan 22nd 10.00am -Part II Scaling Hafnium... @ Thu Jan 22, 2026 11am - 12pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

TF-A Tech Forum Jan 22nd 10.00am -Part II Scaling Hafnium for advanced mobile OS architectures Thursday Jan 22, 2026 ⋅ 11am – 12pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Hi, As follow up to the last session on Nov 13th 2025 [1], a new TF-A Tech Forum session with the topic'Scaling Hafnium for advanced mobile OS architectures' will be held on Jan 22nd 2026 10.00am. Regards,Olivier. [1] https://www.trustedfirmware.org/meetings/tf-a-technical-forum/ Scaling Hafnium for advanced mobile OS architectures - Presented by Jack Suann PDF Presentation Video Recording (Access Password: *PIs1^BD) Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumJoin Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org View all guest info https://calendar.google.com/calendar/event?action=VIEW&eid=NmFoYTlsdXBjYjZj… Reply for tf-a(a)lists.trustedfirmware.org and view more details https://calendar.google.com/calendar/event?action=VIEW&eid=NmFoYTlsdXBjYjZj… Your attendance is optional. ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

2 months

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 501137: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /common/runtime_svc.c: 261 in handler_sync_exception() _____________________________________________________________________________________________ *** CID 501137: Integer handling issues (CONSTANT_EXPRESSION_RESULT) /common/runtime_svc.c: 261 in handler_sync_exception() 255 /* advance the PC to continue after the instruction */ 256 write_ctx_reg(state, CTX_ELR_EL3, read_ctx_reg(state, CTX_ELR_EL3) + 4); 257 } /* otherwise return to the trapping instruction (repeating it) */ 258 return; 259 /* If FFH Support then try to handle lower EL EA exceptions. */ 260 } else if ((exc_class == EC_IABORT_LOWER_EL || exc_class == EC_DABORT_LOWER_EL) >>> CID 501137: Integer handling issues (CONSTANT_EXPRESSION_RESULT) >>> "state->ctx_regs[0U /* 0U >> 3U */] | (8UL /* 1UL << 3 */)" is always 1/true regardless of the values of its operand. This occurs as the logical second operand of "&&". 261 && (read_ctx_reg(state, CTX_SCR_EL3) | SCR_EA_BIT)) { 262 #if FFH_SUPPORT 263 /* 264 * Check for Uncontainable error type. If so, route to the 265 * platform fatal error handler rather than the generic EA one. 266 */ ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

2 months

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Re: Questions about Chain-of-Trust and RSE Connectivity

by Olivier Deprez

+ TF-A list ________________________________ From: Olivier Deprez Sent: 05 January 2026 15:11 To: Taehoon Kim <gth1919(a)adtek.co.kr> Cc: Raef Coles <Raef.Coles(a)arm.com>; Jackson Cooper-Driver <Jackson.Cooper-Driver(a)arm.com>; Nishant Sharma <Nishant.Sharma(a)arm.com>; Rohit Mathew <Rohit.Mathew(a)arm.com>; Manish Pandey2 <Manish.Pandey2(a)arm.com>; Manish Badarkhe <Manish.Badarkhe(a)arm.com> Subject: Questions about Chain-of-Trust and RSE Connectivity Hi Taehoon Kim, We seem to experience an issue with the mailing list where messages are not properly dispatched. I reproduced your initial email sent Dec 18th 2025 below and Cced relevant folks just in case. Regards, Olivier. ____________________________________________________________ Hello, I'm firmware developer for RD-V3-R1 chipset. I have developed our firmware based on Neoverse Reference Platform RD-INFRA-2025.07.03, but I have also kept an eye on the code to ensure we remain in step with the latest release. While inquiring on the TF-M forum to update the TF-M code, I also developed a query regarding the TF-A section. Re: Several Questions related to RSE Provisioning - TF-M - lists.trustedfirmware.org<https://lists.trustedfirmware.org/archives/list/tf-m@lists.trustedfirmware.…> This link includes that RSE API codes are removed in the SotA TF-A codes. I check this in the TF-A commit. https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/46314 I was already aware that this API was not used outside of test code. However, I would like to know the reason why that code was removed, beyond the simple fact that it was not being used. Is it possible that Chain-of-Trust is established in whole firmware stack from RSE ROM to AP BL33 bootloader, without RSE assist? If possible, what does TF-A rely upon as the basis for trust in establishing the Root of Trust? Our team believed that CoT was established on the premise of the RSE API, and was therefore designing to ensure the trustworthiness of the entire firmware using that code. However, we recognise that to use the latest version of the code, we must abandon that belief and design in a different manner. Before the new version of RD-INFRA is released, we intend to resolve this internally as a team. Should you feel the scope of the question extends beyond what is typically addressed in the forum, please do not hesitate to let us know. Thank you for reading this mail. Best Regard, Taehoon Kim

2 months

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New Defects reported by Coverity Scan for ARM-software/arm-trusted-firmware

by scan-admin＠coverity.com

Hi, Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan. 2 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 500810: Incorrect expression (SIZEOF_MISMATCH) /contrib/libeventlog/src/event_log.c: 394 in event_log_write_specid_event() _____________________________________________________________________________________________ *** CID 500810: Incorrect expression (SIZEOF_MISMATCH) /contrib/libeventlog/src/event_log.c: 394 in event_log_write_specid_event() 388 } 389 390 /* TCG_EfiSpecIdEvent.VendorInfo */ 391 if (vendor_info_size > 0) { 392 vendor_info_ptr = 393 (tcg_vendor_info_t >>> CID 500810: Incorrect expression (SIZEOF_MISMATCH) >>> Adding "4UL /* sizeof (id_event_algorithm_size_t) */ * algo_count" to pointer "spec_id_ptr->digest_size" of type "id_event_algorithm_size_t *" is suspicious because adding an integral value to this pointer automatically scales that value by the size, 4 bytes, of the pointed-to type, "id_event_algorithm_size_t". Most likely, the multiplication by "sizeof (id_event_algorithm_size_t)" in this expression is extraneous and should be eliminated. 394 *)(spec_id_ptr->digest_size + 395 sizeof(id_event_algorithm_size_t) * 396 algo_count); 397 398 vendor_info_ptr->vendor_info_size = vendor_info_size; 399 ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…

2 months, 2 weeks

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Questions about Chain-of-Trust and RSE Connectivity

by 김태훈

Hello, I'm firmware developer for RD-V3-R1 chipset. I have developed our firmware based on Neoverse Reference Platform RD-INFRA-2025.07.03, but I have also kept an eye on the code to ensure we remain in step with the latest release.  While inquiring on the TF-M forum to update the TF-M code, I also developed a query regarding the TF-A section. Re: Several Questions related to RSE Provisioning - TF-M - lists.trustedfirmware.org This link includes that RSE API codes are removed in the SotA TF-A codes. I check this in the TF-A commit. https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/46314 I was already aware that this API was not used outside of test code. However, I would like to know the reason why that code was removed, beyond the simple fact that it was not being used. Is it possible that Chain-of-Trust is established in whole firmware stack from RSE ROM to AP BL33 bootloader, without RSE assist? If possible, what does TF-A rely upon as the basis for trust in establishing the Root of Trust?  Our team believed that CoT was established on the premise of the RSE API, and was therefore designing to ensure the trustworthiness of the entire firmware using that code. However, we recognise that to use the latest version of the code, we must abandon that belief and design in a different manner. Before the new version of RD-INFRA is released, we intend to resolve this internally as a team. Should you feel the scope of the question extends beyond what is typically addressed in the forum, please do not hesitate to let us know. Thank you for reading this mail. Best Regard, Taehoon Kim

2 months, 3 weeks

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Hafnium v2.14 LTS Major Release Announcement

by Madhukar Pappireddy

2 months, 3 weeks

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[RFE] lib/el3_runtime: set NS bit if secure el2 is not implemented

by Pawandeep Oza (QUIC)

Please have a look at following patch, where on our platform we try to maintain single image of TFA (for custom CPU and Cortex A55) Cortex A55 does not have Secure EL2 implemented, while on the other hand our custom CPU has secure EL2 (and we run Hafnium there) On Cortex A55 ARM AEM model: write_icc_sre_el2(read_el2_ctx_common(ctx, icc_sre_el2)); the context was set before as u_register_t icc_sre_el2_val = ICC_SRE_DIB_BIT | ICC_SRE_DFB_BIT | ICC_SRE_EN_BIT | ICC_SRE_SRE_BIT; and setting ICC_SRE_DIB_BIT | ICC_SRE_DFB_BIT causes crash since secure EL2 is not implemented. resulting into following patch which resolves the issue. seeking feedback/discussion if I can post it to upstream TFA, let me know if I am missing something here. lib/el3_runtime: set NS bit if secure el2 is not implemented before setting icc_sre_el2 set NS bit for non-secure context so that the ICC_SRE_DIB_BIT and ICC_SRE_DFB_BIT are preserved Signed-off-by: Oza Pawandeep <quic_poza(a)quicinc.com> diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c index e31255868..5100f2f00 100644 --- a/lib/el3_runtime/aarch64/context_mgmt.c +++ b/lib/el3_runtime/aarch64/context_mgmt.c @@ -1411,7 +1411,18 @@ static void el2_sysregs_context_restore_gic(el2_sysregs_t *ctx, uint32_t securit u_register_t scr_el3 = read_scr_el3(); #if defined(SPD_spmd) && SPMD_SPM_AT_SEL2 - write_icc_sre_el2(read_el2_ctx_common(ctx, icc_sre_el2)); + if (is_feat_sel2_supported()) { + write_icc_sre_el2(read_el2_ctx_common(ctx, icc_sre_el2)); + } else { + write_scr_el3(scr_el3 | SCR_NS_BIT); + isb(); + + write_icc_sre_el2(read_el2_ctx_common(ctx, icc_sre_el2)); + + write_scr_el3(scr_el3); + isb(); + } + #else write_scr_el3(scr_el3 | SCR_NS_BIT); isb(); Regards, Oza.

2 months, 3 weeks

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Trusted Firmware-A v2.14 LTS Major Release Announcement

by Bipin Ravi

Hello, This is to announce the fourth TF-A LTS branch "lts-v2.14". As per the process, this LTS branch is based on the 2nd mainline TF-A release of the year, v2.14.0. Following are the lts-v2.14 branches for the TF-A related repos. 1. trusted-firmware-a : https://git.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a.git… 2. tf-a-tests: https://git.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests.git/+/refs/… 3. tf-a-ci-scripts: https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-ci-scripts/+/refs/h… 4. tf-a-job-configs: https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-job-configs/+/refs/… Change Log: Since the lts-v2.14 branch is based on the TF-A release v2.14.0 without any additional patches, there is no separate changelog for this first release. Thanks, TF-A LTS team

2 months, 3 weeks

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Canceled event with note: TF-A Tech Forum @ Thu Dec 25, 2025 5pm - 6pm (GMT+1) (tf-a@lists.trustedfirmware.org)

by Olivier Deprez

This event has been canceled with a note: "No TF-A Tech forum on Dec 25th." TF-A Tech Forum Thursday Dec 25, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

2 months, 4 weeks

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First Hafnium LTS release

by Madhukar Pappireddy

Hi, We will be making the first Hafnium LTS branch release based of the recent v2.14.0 tag. We would encourage anyone interested in Hafnium LTS support or maintenance to subscribe themselves to this mailing list: https://lists.trustedfirmware.org/mailman3/lists/hafnium-lts.lists.trustedf… <https://lists.trustedfirmware.org/mailman3/lists/hafnium-lts.lists.trustedf…> We also recommend to join the hafnium-lts channel in trustedfirmware discord server for real time updates and getting involved with the LTS maintenance. Thanks, Madhukar

2 months, 4 weeks

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TF-A Tech Forum Dec 11th 4.00pm (UK) - TF-RMM Live Firmware Activation (design update)

by Olivier Deprez

Hi, On Dec 11th in the TF-A Tech Forum at 4.00pm UK, Soby Mathew will present a design update on TF-RMM Live Firmware Activation: This presentation describes the revised TF-RMM Low-VA MMU and global-runtime-data design required to support Live Firmware Activation (LFA). Compared to the earlier approach (outlined in the TFA Tech Forum session on 12-Jun-2025 [1] ), which assumed mostly fixed boot time mappings and per-platform handcrafted Low-VA contexts, the new design is driven by several changes in RMM specification: RMM must now support runtime mapping/unmapping of PAs for RMM objects like struct granule , reuse those dynamic mappings across LFA transitions. These PAs can come either from NS world at runtime or EL3 reservation from RMM carveout. In order to migrate Stage 1 dynamic mappings across LFA instances, RMM needs to reduce dependence on platform-specific MMU setup, and provide a structured framework for allocating, versioning and migrating global runtime data. The Stage 1 Low-VA is therefore split into static and dynamic regions managed by the common xlat layer. The detailed design is captured in the TF-RMM wiki RFC “TF-RMM Live Firmware Activation [2]” and builds on the initial design presented in the TFA Tech Forum session on 12-Jun-2025 [1] : [1] Previous LFA discussion: https://github.com/TF-RMM/tf-rmm/wiki/TFA-Tech-Forum-Presentations [2] https://github.com/TF-RMM/tf-rmm/wiki/RFC:-TF%E2%80%90RMM-Live-Firmware-Act… Regards, Olivier. TF-A Tech Forum Thursday Dec 11, 2025 ⋅ 5pm – 6pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com jagdish.gediya(a)linaro.org

3 months

1
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TF-A Tech Forum Dec 11th 4.00pm (UK) - TF-RMM Live Firmware Activation (design update)

by Olivier Deprez

Hi, On Dec 11th in the TF-A Tech Forum at 4.00pm UK, Soby Mathew will present a design update on TF-RMM Live Firmware Activation: This presentation describes the revised TF-RMM Low-VA MMU and global-runtime-data design required to support Live Firmware Activation (LFA). Compared to the earlier approach (outlined in the TFA Tech Forum session on 12-Jun-2025 [1] ), which assumed mostly fixed boot time mappings and per-platform handcrafted Low-VA contexts, the new design is driven by several changes in RMM specification: RMM must now support runtime mapping/unmapping of PAs for RMM objects like struct granule , reuse those dynamic mappings across LFA transitions. These PAs can come either from NS world at runtime or EL3 reservation from RMM carveout. In order to migrate Stage 1 dynamic mappings across LFA instances, RMM needs to reduce dependence on platform-specific MMU setup, and provide a structured framework for allocating, versioning and migrating global runtime data. The Stage 1 Low-VA is therefore split into static and dynamic regions managed by the common xlat layer. The detailed design is captured in the TF-RMM wiki RFC “TF-RMM Live Firmware Activation [2]” and builds on the initial design presented in the TFA Tech Forum session on 12-Jun-2025 [1] : [1] Previous LFA discussion: https://github.com/TF-RMM/tf-rmm/wiki/TFA-Tech-Forum-Presentations [2] https://github.com/TF-RMM/tf-rmm/wiki/RFC:-TF%E2%80%90RMM-Live-Firmware-Act… Regards, Olivier.

3 months

1
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Synced invitation: TF-A Tech Forum @ Thu 2025-11-13 4pm - 5pm (GMT) (tf-a@lists.trustedfirmware.org)

by qwandor＠google.com

This email keeps the event up to date in your calendar. TF-A Tech Forum Thursday 2025-11-13 ⋅ 4pm – 5pm United Kingdom Time Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests qwandor(a)google.com praan(a)google.com jeremimiller(a)google.com tf-a(a)lists.trustedfirmware.org ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

3 months, 1 week

1
0
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Synced invitation: TF-A Tech Forum @ Every 2 weeks from 4pm to 5pm on Thursday (BST) (tf-a@lists.trustedfirmware.org)

by Andrew Walbran

This email keeps the event up to date in your calendar. TF-A Tech Forum Every 2 weeks from 4pm to 5pm on Thursday United Kingdom Time Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org Andrew Walbran Pranjal Shrivastava Jeremi Miller ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

3 months, 1 week

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Synced invitation: TF-A Tech Forum @ Every 2 weeks from 4pm to 5pm on Thursday (GMT) (tf-a@lists.trustedfirmware.org)

by Andrew Walbran

This email keeps the event up to date in your calendar. TF-A Tech Forum Every 2 weeks from 4pm to 5pm on Thursday United Kingdom Time Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Guests tf-a(a)lists.trustedfirmware.org Andrew Walbran Pranjal Shrivastava Jeremi Miller ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding

3 months, 1 week

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TF-A Tech Forum - Nov 27th - Overview of measured boot driver libraries

by Olivier Deprez

Hi, In the TF-A Tech forum on Thursday Nov 27th 4.00pm UK, Harrison Mutai<mailto:Harrison.Mutai@arm.com> and Matthew Ellis<mailto:Matthew.Ellis@arm.com> will provide an overview of the shared measured boot driver libraries, namely: LibTPM and LibEventLog, and align on design, integration, and contribution workflows: - Motivation for introducing shared measured boot driver libraries - Overview of current architecture and key components - Integration into platform builds and deployment examples (FVP and RPi) - Testing and CI workflows for validation and patch contributions - Access, contribution process, and future development plan Regards, Olivier. ________________________________ From: Trusted Firmware Public Meetings Sent: 02 May 2025 12:00 To: Trusted Firmware Public Meetings <linaro.org_havjv2figrh5egaiurb229pd8c(a)group.calendar.google.com>; tf-a(a)lists.trustedfirmware.org <tf-a(a)lists.trustedfirmware.org> Subject: TF-A Tech Forum When: 27 November 2025 17:00-18:00. Where: https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… TF-A Tech Forum Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s)Please download and import the follow Trusted Firmware is inviting you to a scheduled Zoom meeting. Topic: TF-A Tech Forum Time: May 15, 2025 02:00 PM London Every 2 weeks on Thu, 78 occurrence(s) Please download and import the following iCalendar (.ics) files to your calendar system. Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics…<https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fmeeting%2Ft…> Join Zoom Meeting https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…<https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…> Meeting ID: 935 5786 3987 Passcode: 939141 --- One tap mobile +12532158782,,93557863987# US (Tacoma) +13017158592,,93557863987# US (Washington DC) --- Dial by your location • +1 253 215 8782 US (Tacoma) • +1 301 715 8592 US (Washington DC) • +1 305 224 1968 US • +1 309 205 3325 US • +1 312 626 6799 US (Chicago) • +1 346 248 7799 US (Houston) • +1 360 209 5623 US • +1 386 347 5053 US • +1 507 473 4847 US • +1 564 217 2000 US • +1 646 558 8656 US (New York) • +1 646 931 3860 US • +1 669 444 9171 US • +1 669 900 9128 US (San Jose) • +1 689 278 1000 US • +1 719 359 4580 US • +1 253 205 0468 US • 833 548 0276 US Toll-free • 833 548 0282 US Toll-free • 833 928 4608 US Toll-free • 833 928 4609 US Toll-free • 833 928 4610 US Toll-free • 877 853 5247 US Toll-free • 888 788 0099 US Toll-free Meeting ID: 935 5786 3987 Find your local number: https://linaro-org.zoom.us/u/adoz9mILli<https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fu%2Fadoz9mI…> When Every 2 weeks from 4pm to 5pm on Thursday (United Kingdom Time) Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… View map<https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…> Guests tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org> View all guest info<https://calendar.google.com/calendar/event?action=VIEW&eid=NnR0NGMyZWJkdnBn…> RSVP for tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org> for all events in this series Yes<https://calendar.google.com/calendar/event?action=RESPOND&eid=NnR0NGMyZWJkd…> No<https://calendar.google.com/calendar/event?action=RESPOND&eid=NnR0NGMyZWJkd…> Maybe<https://calendar.google.com/calendar/event?action=RESPOND&eid=NnR0NGMyZWJkd…> More options<https://calendar.google.com/calendar/event?action=VIEW&eid=NnR0NGMyZWJkdnBn…> Invitation from Google Calendar<https://calendar.google.com/calendar/> You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more<https://support.google.com/calendar/answer/37135#forwarding>

3 months, 1 week

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Non volatile boot index for the purpose of firmware update

by Patryk

Hi I'm looking for a suggestion for a reliable place to store a small boot index for PSA Firmware Update. SNVS LPGPRs looked promising, but NXP’s guidance is thin and we don’t keep the battery-backed LP domain alive, so those values won’t survive many power cycles. Are there better options on LS1028A? Would using the user RAM byte in our external I2C RTC make sense? Or perhaps should I store it on eMMC? (we don't use raw NOR/NAND flash). That RTC I mentioned is already accessed in both U-Boot and Linux, so I’m wary of conflicts but can try it if you think it’s viable. Any suggestions would be much appreciated. Best regards Patryk

3 months, 2 weeks

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Question about SError exception routing

by Julius Werner

Hi, I have a sort of generic Arm architecture question that's not directly related to TF-A (other than that TF-A controls some of the registers involved in this decision), but I'm hoping that one of the experts here can still help me out or at least refer me to someone who can. I'm trying to figure out how exception routing for SError aborts works in EL2. Specifically, I have a bootloader (BL33) running in NS-EL2 and I want the "simple" setup that it manages all its own exceptions, the same way that an OS kernel normally manages all exceptions at EL1. I assumed that I could achieve that simply by installing exception handlers, unmasking all exceptions in PSTATE, and leaving all the special trap feature bits in the MSRs at 0 (disabled). This seems to work for synchronous exceptions and external aborts, but not for SErrors. Looking at the architecture reference manual (revision L.b), table D1-14 in section D1.3.6.3 (page D1-6114), I can see that my case is represented by the first line (all special trap bits 0), which shows that SErrors caused by EL0 and EL1 would be routed to EL1 as expected (though even when PSTATE.A is 1 which seems odd?), but SErrors caused by EL2 will get ignored and remain pending (with no regard to PSTATE.A). Instead, the "default" behavior I expect (aborts get routed to the EL that caused them if PSTATE.A is 0) seems to require me to enable SCTLR_EL2.NMEA. But if you're looking at the description of SCTLR_EL2.NMEA, it says that it controls whether PSTATE.A masks SError exceptions at EL2 (and that if it is 0, SError exceptions are not taken at EL2 if PSTATE.A == 1). Doesn't that imply that SError exceptions *are* taken at EL2 if PSTATE.A == 0? What does a control that seems to be about trapping masked aborts from a lower EL have to do with unmasked aborts from my current EL? Basically, I think what I'm asking is: is that table really correct as printed (some behavior we've observed seems to indicate it is), and if so, why? Why do SError exceptions seem to behave differently by default in EL1 and EL2 (in regards to unmasked exceptions taken from the same exception level)? Why does the PSTATE.A bit only seem to apply to EL0 and EL1, not EL2 and EL3, even for exceptions taken from the same level, when this peculiarity seems to not be mentioned anywhere else in the manual? Why do SError exceptions get treated so differently from external aborts in EL2/EL3, when in EL1 they seem to mostly count as the same? Is the current description of the NMEA bit in the SCTLR_EL2 register documentation really accurate, if it also seems to make fundamental changes to cases not really mentioned in that description? Is there any way for EL2 to only handle its own SError exceptions without interfering with EL1's exception handling when FEAT_DoubleFault2 is not implemented (other than flipping HCR_EL2.AMO on every EL2 entry/exit)? And am I the only one who finds this all incredibly inconsistent and confusing? I feel like I'm missing some critical insight in how you were meant to think about this to make it make sense, would appreciate any help in that regard! Thanks, Julius

3 months, 2 weeks

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Trusted Firmware v2.14 release announcement

by Olivier Deprez

Hi, We are pleased to announce the formal release of Trusted Firmware-A version 2.14 bundle of project deliverables. This includes Trusted Firmware-A, Trusted Firmware-A Tests, Hafnium, TF-RMM, Trusted Services, and TF-A OpenCI scripts/jobs components. These went live on Nov, 24th 2025. Please find tag references and change logs at the end of this email. Many thanks to the trustedfirmware.org community for the active engagement in delivering this release! Notable features of the release version 2.14 are as follows: TF-A/EL3 * New architectural features support: FEAT_FGWTE3, FEAT_IDTE3, FEAT_RME_GPC2, FEAT_AIE, FEAT_CPA2, FEAT_MPAM_PE_BW_CTRL, FEAT_PFAR, FEAT_RME_GDI. * Live Firmware Activation: base support enabling TF-RMM LFA, added RMM MEM RESERVE ABI. * Armv9 CPU power down abandon support * GICv5 driver permitting normal world kernel boot * GIC720-AE support added * Per-cpu framework supporting NUMA platforms * SMCCC SoC name support (SMCCC v1.6 SMCCC_ARCH_SOC_ID) * SPMD: added FF-A v1.3 FFA_NS_RES_INFO_GET, FFA_ABORT interfaces * EL3 SPMC: add multiple UUIDs support, TPM event log delivered by HOB list, FFA_MEM_RETRIEVE_REQ from hypervisor * RME: FEAT_D128 for realm world, SMCCC_ARCH_FEATURE_AVAILABILITY * Platforms: RD-Aspen added, updates to Arm FVP/Juno, AMD Versal Gen2, Intel, MT8189, MT8196, i.MX94, i.MX95, S32G274A, QTI Kodiak, Renesas R-Car, STM32MP1, STM32MP2, STM32MP21, STM32MP25, Xilinx Versal, ZynqMP Boot flow * Transfer list and event log libraries now offered as shared libraries consumed as submodules by TF-A. * Update to mbedTLS 3.6.5 * Various PSA FWU improvements, namely BL2 in a dedicated FIP, GPT-corruption notifications to BL32, and expanded FWU tests. Errata/Security mitigations (CPU/GIC) * New CPU support: Arm Lumex C1, Dionysus, Caddo/Veymont, Venom. * Added close to 30 new CPU errata across multiple processor families, based on the latest SDEN updates. Hafnium/SPM (S-EL2) * FF-A v1.3 early adoption * FFA_NS_RES_INFO_GET ABI added * Partition lifecycle support: new states, abort handling. Pre-requisite to secure partitions live firmware activation. * Notifications support refactored with per-vCPU notifications removed. * Multi-GIC configuration supporting complex topologies. * Shrinkwrap used at core of Hafnium testing infrastructure. TF-RMM (R-EL2) * RMM v1.1 Planes support * PMU, timer, GIC ownership transfer. * Support for FEAT_S1POE/S1PIE, FEAT_S2POE/S2PIE * RMM v1.1 Memory Encryption Contexts (MEC) support * Realm Device Assignment * RMM v1.1. ALP12 base Device Assignment support * RMI VDEV ABIs, PDEV life cycle, root port IDE key programming, SPDM client as EL0 app. * Improved ID registers trapping leveraging SMCCC ARCH_FEATURE_AVAILABILITY, in light of future FEAT_IDTE3 support. * Additional architectural support: FEAT_TCR2, FEAT_D128, single-copy atomics, TF-A Tests * RME: DA and PCIe, Planes, MEC * SPM/FF-A * Bumped support o FF-A v1.3 * FFA_ABORT ABI * Deprecated per-vCPU notifications. * FWU: added negative testing (invalid image size, corrupted ROTPK) * GICv5 support added * Arm architecture tests * FEAT_TCR2 (for RME) , FEAT_IDTE3, FEAT_MPAM_PE_BW_CTRL, FEAT_EBEP, FEAT_AIE, FEAT_PFAR * SMCCC_ARCH_SOC_ID * SMCCC_ARCH_FEATURE_AVAILABILITY * Fuzzing: added SMC fuzzer documentation * Basic LFA framework tests * Platforms updates: AMD/Xilinx, Arm FVP, Corstone-1000 Trusted Services * RD-Aspen platform support added. * EFI ESRT handling in FWU Proxy (supporting Corstone1000 platform). * Block Storage service threat modelling. Release tags across repositories: https://git.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/r… https://git.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags… https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-ci-scripts/+/refs/t… https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-job-configs/+/refs/… https://git.trustedfirmware.org/plugins/gitiles/hafnium/hafnium/+/refs/tags… https://git.trustedfirmware.org/plugins/gitiles/ci/hafnium-ci-scripts/+/ref… https://git.trustedfirmware.org/plugins/gitiles/ci/hafnium-job-configs/+/re… https://git.trustedfirmware.org/plugins/gitiles/TF-RMM/tf-rmm/+/refs/tags/t… https://git.trustedfirmware.org/plugins/gitiles/TS/trusted-services/+/refs/… Change logs: https://trustedfirmware-a.readthedocs.io/en/v2.14.0/change-log.html#id1 https://trustedfirmware-a-tests.readthedocs.io/en/v2.14.0/change-log.html#v… https://hafnium.readthedocs.io/en/v2.14.0/change-log.html#id1 https://tf-rmm.readthedocs.io/en/tf-rmm-v0.8.0/about/change-log.html#v0-8-0 https://git.trustedfirmware.org/plugins/gitiles/TS/trusted-services/+/refs/… Regards, Olivier.

3 months, 2 weeks

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TF-A Tech Forum - Hafnium future looking improvements @ Thu Nov 13, 2025 11am - 12pm (UK)

by Olivier Deprez

Hi, This is a one off session for a partner to present coming improvements related to Hafnium project. Apologies for the meeting time not accommodating people in US timezones. We'll record the session and publish in the TF-A tech forum page as usual. Regards, Olivier. ________________________________ From: Google Calendar <calendar-notification(a)google.com> on behalf of Olivier Deprez via Hafnium <hafnium(a)lists.trustedfirmware.org> Sent: 07 November 2025 09:13 To: hafnium(a)lists.trustedfirmware.org <hafnium(a)lists.trustedfirmware.org> Subject: [Hafnium] Invitation: TF-A Tech Forum - Hafnium future looking improvements @ Thu Nov 13, 2025 12pm - 1pm (GMT+1) (hafnium(a)lists.trustedfirmware.org) TF-A Tech Forum - Hafnium future looking improvements Thursday Nov 13, 2025 ⋅ 12pm – 1pm Central European Time - Paris Location https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34… https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786… Hi, This is a one off session for a partner to present coming improvements related to Hafnium project. Apologies for the meeting time not accommodating people in US timezones. We'll record the session and publish in the TF-A tech forum page as usual. Regards,Olivier.Trusted Firmware is inviting you to a scheduled Zoom meeting.Please download and import the following iCalendar (.ics) files to your calendar system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics… Zoom Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting ID: 935 5786 3987Passcode: 939141---One tap mobile+12532158782,,93557863987# US (Tacoma)+13017158592,,93557863987# US (Washington DC)---Dial by your location• +1 253 215 8782 US (Tacoma)• +1 301 715 8592 US (Washington DC)• +1 305 224 1968 US• +1 309 205 3325 US• +1 312 626 6799 US (Chicago)• +1 346 248 7799 US (Houston)• +1 360 209 5623 US• +1 386 347 5053 US• +1 507 473 4847 US• +1 564 217 2000 US• +1 646 558 8656 US (New York)• +1 646 931 3860 US• +1 669 444 9171 US• +1 669 900 9128 US (San Jose)• +1 689 278 1000 US• +1 719 359 4580 US• +1 253 205 0468 US• 833 548 0276 US Toll-free• 833 548 0282 US Toll-free• 833 928 4608 US Toll-free• 833 928 4609 US Toll-free• 833 928 4610 US Toll-free• 877 853 5247 US Toll-free• 888 788 0099 US Toll-freeMeeting ID: 935 5786 3987Find your local number: https://linaro-org.zoom.us/u/adoz9mILli Reply for hafnium(a)lists.trustedfirmware.org and view more details https://calendar.google.com/calendar/event?action=VIEW&eid=MDdmMGs0NjBkcW5q… Your attendance is optional. ~~//~~ Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this email because you are an attendee on the event. Forwarding this invitation could allow any recipient to send a response to the organizer, be added to the guest list, invite others regardless of their own invitation status, or modify your RSVP. Learn more https://support.google.com/calendar/answer/37135#forwarding -- Hafnium mailing list -- hafnium(a)lists.trustedfirmware.org To unsubscribe send an email to hafnium-leave(a)lists.trustedfirmware.org

3 months, 3 weeks

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Trusted Firmware-A LTS v2.8.40 Release Announcement

by svc_openci_enginfra＠arm.com

Hello, Trusted Firmware-A LTS version 2.8.40 is now available. This release contains the following patches: af828443d fix(spm-mm): prevent excessive racing [1] c1c4d7d5d fix(security): remove CVE_2022_23960 Cortex-A720 [2] 7d6831115 fix(security): remove CVE_2022_23960 Neoverse V3 [3] 373b22562 fix(security): remove CVE_2022_23960 Cortex-X4 [4] [1] https://review.trustedfirmware.org/q/I0861d04ed95437e4ca9f203d9e79a6296b1ea… [2] https://review.trustedfirmware.org/q/I3c68b5f5d85ede37a6a039369de8ed2aa9205… [3] https://review.trustedfirmware.org/q/I13b27c04c3da5ec80fa79422b4ef4fee64738… [4] https://review.trustedfirmware.org/q/I23f5fa748377a920340b3c5a6584ccfadeea9… Alternatively, Change Log is available in the documentation section: https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.40/change-log.html Thanks, TF-A LTS team

3 months, 3 weeks

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