Hi All,
Please note build option CTX_INCLUDE_MTE_REGS is now replaced with ENABLE_FEAT_MTE[1]
To avoid breaking any builds for timebeing CTX_INCLUDE_MTE_REGS usage will indirectly
enable ENABLE_FEAT_MTE but will produce a build warning.
Kindly request anyone using CTX_INCLUDE_MTE_REGS to replace with ENABLE_FEAT_MTE
As option CTX_INCLUDE_MTE_REGS backward support will be removed after next release
and going forward usage of CTX_INCLUDE_MTE_REGS will not be handled within build.
--
Thanks,
Govindraj R
[1]: https://review.trustedfirmware.org/q/topic:%22gr/refac_mte%22
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Hi,
Right now, TF-A coding guidelines advocate the use of strlcpy() over
strcpy()/strncpy() (see the banned libc functions [1]) for the following
reasons:
- strlcpy() always null-terminates the destination string, even if it
gets truncated. This is safer and less error-prone than leaving it
unterminated like strncpy() does in this case.
- With strlcpy(), it is possible to detect whether the string was
truncated. This is useful in some use cases.
- strlcpy() writes a single null-terminating byte into the destination
string, whereas strncpy() wastes time writing multiple null-terminating
bytes until it fills the destination string. Thus, strlcpy() is more
efficient in the case where the source string is shorter than the
destination one.
There exists another string copy variant: strscpy(). Just like
strlcpy(), it is not part of the C standard but most libc
implementations provide it. strscpy() has the following advantages over
strlcpy():
- strscpy() only reads the specified number of bytes from the source
string, whereas strlcpy() reads all of its bytes until it finds a
null-terminating byte (this is because it needs to return this information).
This opens up a potential security risk if the source string is
untrusted and controlled by an attacker, as we might end up reading a
lot of memory if proper safeguards are not put in place on the source
string prior to calling strlcpy().
Also it causes a performance penalty for reading "useless" bytes from
the source string.
- Checking for truncation is easier and less error-prone with strscpy()
: strscpy() returns an error code (-E2BIG) in case of truncation,
whereas strlcpy() requires comparing the return value with the
destination string size.
For these reasons, it seems to me we should prefer strscpy() over
strlcpy() in TF-A code base. Any thoughts?
Note that the Linux kernel coding style already goes in that direction.
The coding style verification script (checkpatch.pl), which TF-A reuses,
will print the following warning message if strlcpy() is used:
WARNING: Prefer strscpy over strlcpy - see:
https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmk…
This got flagged by the OpenCI into some TF-A code review already [2].
If we decide that strlcpy() is fine for TF-A codebase in the end, we'll
at least need to find a way to silence this checkpatch.pl warning.
AFAICS there is already a switch to this effect so it should just be a
matter of adding '--ignore STRLCPY' inside .checkpatch.conf file.
Best regards,
Sandrine
[1]
https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-guideline…)
[2] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/25551
Hello,
In the file /plat/xilinx/zynqmp/aarch64/zynqmp_common.c, there is a function named plat_get_syscnt_freq2 with its definition. Simultaneously, the declaration of this function is included in include/plat/common/platform.h with the name plat_get_syscnt_freq2 and a different parameter type, leading to a violation when running the Coverity MISRA-C analysis for the Zynqmp platform. Declaration uses a different parameter type than the function Definition.
Addressing this issue by introducing a typedef for plat_get_syscnt_freq2 in platform.h and specifying its type as uint32_t resolves the violation. However, it introduces a challenge for other platforms, as this modification necessitates similar changes across various platforms, causing violations in those areas due to the adjusted typedef.
Is it possible to fix with the typedef? Please suggest.
Regards,
Nithin
Hello,
In the file /bl31/interrupt_mgmt.c and /include/drivers/arm/gicv2.h and other files getting misra_c_2012_rule_2_4_violation: Type has tag "intr_type_desc" but that tag is never used. during the Coverity MISRA-C analysis.
typedef struct intr_type_desc {
interrupt_type_handler_t handler;
u_register_t scr_el3[2];
uint32_t flags;
} intr_type_desc_t;
Resolution: Removed the intr_type_desc variable as it declared it's typedef intr_type_desc_t.
typedef struct {
interrupt_type_handler_t handler;
u_register_t scr_el3[2];
uint32_t flags;
} intr_type_desc_t;
Is It possible to remove the intr_type_desc variable since it is typedef. Please suggest?
Regards,
Nithin
Hi,
Patrick has sent 2 correction patches for PSCI stack in OSI mode there:
https://review.trustedfirmware.org/q/topic:%22fix_psci_osi%22
But when running CI+2, there are 2 platforms for which 2 PSCI OSI tests
are failing:
fvp-ext-pstate-ea-el3|fvp-default|fvp-tftf-fip.tftf-cortexa57x4a53x4-debug
fvp-ext-pstate-ea-el3|fvp-default|fvp-tftf-fip.tftf-aemv8a-debug
I'm not familiar with those test configs, but when checking lava logs,
I see those traces for failing tests:
2024-01-11T14:21:59 > Executing 'CPU suspend to powerdown at level 1 in
OSI mode'
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Booting
2024-01-11T14:21:59 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:21:59 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Going into suspend state
2024-01-11T14:22:00 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 TEST COMPLETE Failed
2024-01-11T14:22:03 Wrong value: expected 0, got -3
2024-01-11T14:22:03 > Executing 'CPU suspend to powerdown at level 2 in
OSI mode'
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Booting
2024-01-11T14:22:03 INFO: Registered IRQ handler 0x8801b274 for IRQ #7
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Going into suspend state
2024-01-11T14:22:03 INFO: Saving system context
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Unregistered IRQ handler for IRQ #7
2024-01-11T14:22:03 INFO: Powering off
2024-01-11T14:22:03 INFO: Restoring system context
2024-01-11T14:22:03 INFO: Resumed from suspend state
2024-01-11T14:22:03 TEST COMPLETE Failed
2024-01-11T14:22:03 Wrong value: expected 0, got -3
The "Resumed from suspend state" message interleaved with "Going into
suspend state" seem strange, but I cannot say what could be wrong there.
Maybe there is something wrong with the TF-A patches?
Or the platforms tests or configs need to be updated?
If you have any clue that would be very helpful!
Thanks,
Yann
Hi,
I was looking at imx_hab_handler, which forwards calls into the BootROM on i.MX SoCs
in response to secure monitor calls. The BootROM call (and thus the SiP call) accepts
two pointers as arguments, where it writes data.
The plat/imx/imx8m/imx8m*/imx8m*_bl31_setup.c files map the RAM as MT_MEMORY | MT_RW,
which would mean that not only is it writable from TF-A side, but it's also mapped
cacheable.
I see no explicit cache maintenance in the i.MX SiP code for these two pointer
arguments and haven't been successful to find where in TF-A core code if at all,
complete D-Cache is flushed on SMC exit. Therefore I ask:
- Don't shared non-secure memory buffers between EL3 and lower EL require
explicit cache maintenance?
- Did I miss the place where this cache maintenance is done?
- How did it work so far? barebox does explicit flushing before HAB SiP,
invalidation after. U-Boot doesn't do cache maintenance.
Both apparently work...
Thanks,
Ahmad
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1. misra_c_2012_rule_15_1_violation: Using "goto" statement.
In the file common/bl_common.c and other related files, getting misra_c_2012_rule_15_1_violation: Using "goto" statement. during the Coverity MISRA-C analysis.
if (...) {
goto exit;
}
exit:
some operation
Resolution: goto statement is replaced with exit_func() and new variable is introduced to store the return value of exit_func().
exit_func()
some operation
int ret;
if (...) {
ret = return value of exit func()
}
return ret;
Is it possible to fix MISRA 15.1 like this in open source? Please suggest.
2. misra_c_2012_rule_15_5_violation: This return statement is not the final statement in the compound statement that forms the body of the function.
In the file common/bl_common.c, lib/xlat_tables/aarch64/xlat_tables.c and other related files, getting misra_c_2012_rule_15_5_violation: This return statement is not the final statement in the compound statement that forms the body of the function. during the Coverity MISRA-C analysis.
if (...) {
return <something>
}
if (...) {
return <something>
}
return;
Resolution: Taken new variable and assign the return result to new variable and calling only one return statement in end of the function.
int result;
if (...) {
result = <something>
} else {
if (...) {
result = <something>
}
}
return result;
Is it possible to fix MISRA 15.5 like this in open source? Please suggest.
Thanks & Regards,
Nithin G
Hello,
Trusted Firmware-A LTS version 2.8.14 is now available. This release introduces errata workarounds for Cortex-A520, Cortex-A710, and Neoverse X2 CPUs.
The complete list of changes can be found here<https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.14/change-log.html>.
Thanks.
Hello TF-A and TF-M communities,
I've done 2 minor updates to the generic tf.org project maintenance
process, which TF-A and TF-M both use. Please see the pull request here:
https://github.com/TrustedFirmware/tf_docs/pull/1
Please provide your feedback on the pull request, if any.
Happy end-of-year celebrations to all!
Best regards,
Sandrine
Dear all,
we want analyze stack usage details when we build TF-A for armclang compiler but we are not able generate stack usage details.
sorry for long thread and question please go through and suggest way forward to perform stack analysis with TF-A armclang build.
as per https://trustedfirmware-a.readthedocs.io/en/latest/getting_started/initial-… (section 2.3)
when CC is set to armclang, GCC linker is used default (since the TF-A build system doesn’t currently support Arm Scatter files)
So when we try to generate stack usage details we will not be able to use GCC -fstack-usage and -fdump-ipa-calgraph since CC is set to armclang and these flags will be un-recognized.
Since we are building this for armclang we attempted to use following armlinker flags along with -g compiler flag (refer link:https://developer.arm.com/documentation/100748/0607/writing-optimized-…).
--info=stack, --calgrapth, --calgraph_output=text
But we end up with unrecognized options error for --info=stack, --calgrapth, --calgraph_output=text
This error occurs because GCC linker is used default as per above link section 2.3 (since the TF-A build system doesn’t currently support Arm Scatter files)
So we end up with not having stack usage details generated.
Q1: Any suggestion to generate stack usage when CC=armclang and GCC linker is used by default.
Q2: if we attempt to change LD with armlink we will end up with "Fatal error: L6031U: Could not open scatter description file."
https://trustedfirmware-a.readthedocs.io/en/latest/getting_started/initial-… section 2.3 suggest that "that the default linker may be manually overridden using the LD variable" can you please let us know how to override LD with armlinker without getting scatter issue.
Using: armclang 6.6.2 version.
Thank you
Shivakumar Diggi
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Hello,
In the file common/bl_common.c and other related files, there are instances where function parameters are being modified. This leads to violations when running the Coverity MISRA-C analysis for the ZynqMP platform.
To address this issue a new variable is declared and used to store the value from the argument in the code. Is it possible to fix by taking a new variable? Please provide your suggestions.
Regards,
Nithin G
Hello,
In the file lib/xlat_tables/xlat_tables_common.c and other related files, the condition clause of the for loop does not use the loop counter variable "mm". This leads to violations when running the Coverity MISRA-C analysis for the ZynqMP platform.
Addressing this issue added mm as part of loop counter and this belongs to core translational table logic and other violations also related to this. Is it possible to address this issue? Please provide your suggestions.
Regards,
Nithin G
Hello,
Trusted Firmware-A LTS version 2.8.13 is now available. This release introduces workarounds for new CPU errata for Cortex-A78C, Cortex-X3, and Neoverse V1/V2. It also adds support for the SLS mitigation.
The complete list of changes can be found here<https://trustedfirmware-a.readthedocs.io/en/lts-v2.8.13/change-log.html>.
Thanks.
Hello,
In the file bl31/bl31_main.c, there is a function named bl31_lib_init with its definition. Simultaneously, the declaration of this function is included in include/bl31/bl31.h since the function bl31_lib_init used only in one translational unit. leading to a violation when running the Coverity MISRA-C analysis for the ZynqMP.
Addressing this issue need to remove the declaration of the function from the bl31.h file and making its definition static. To maintain visibility, included a static declaration in the bl31_main.c file. However, it will may impact in future modifications due to the removal of the declaration in bl31.h. Please provide your suggestions.
Regards,
Nithin
Dear All,
We would like to announce that we have published an experimental project called rust-spmc which is a S-EL1 FF-A Secure Partition Manager Core implementation in Rust. We started this as a free time project and now we had the opportunity to publish it on trustedfirmware.org. In its current state it has a partial implementation of the FF-A protocol, and it is able to run the secure partitions of Trusted Services with all tests passing on Arm FVP. It also provides the required compartmentalization between the S-EL0 secure partitions.
Please note that the project is experimental (i.e. PoC, not suitable for production) and it is currently not scheduled by Arm for further development.
The Rust language is an ideal language for implementing firmware components given its lack of undefined behavior and its memory safety guarantees. Our goal was to demonstrate the capabilities of language in a security critical firmware environment and to gather feedback from partners which could open up the possibility of further development of the project.
The repository is available here: https://git.trustedfirmware.org/rust-spmc/rust-spmc.git/
We also prepared a readme with instructions for testing the project: https://git.trustedfirmware.org/rust-spmc/rust-spmc.git/about/
Please reach out to us if you are interested in the project or if you have any questions.
Regards,
Bálint Dobszay & Imre Kis
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When booting my Pine64 Rock64 (rk3328), I see the following warning:
WARNING: BL31: cortex_a53: CPU workaround for 1530924 was missing!
That warning is present in u-boot 2023.01 and also in 2023.07.
Asking on their IRC channel and they indicated it should be fixed in TF-A.
In the source code I saw various commits which all seem a variation of
74665119f04de0cd7c735fa741aff607a4a9fde8
titled "Enable workaround for Cortex-A53 erratum 1530924"
But such a commit seems to be missing for the rk3328 platform.
I guess a patch like this is needed to fix that?
```patch
diff --git a/plat/rockchip/rk3328/platform.mk b/plat/rockchip/rk3328/
platform.mk
index 5b4766d51..bd86a1cc8 100644
--- a/plat/rockchip/rk3328/platform.mk
+++ b/plat/rockchip/rk3328/platform.mk
@@ -65,6 +65,7 @@ include lib/libfdt/libfdt.mk
# Enable workarounds for selected Cortex-A53 errata
ERRATA_A53_855873 := 1
+ERRATA_A53_1530924 := 1
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
$(eval $(call add_define,PLAT_SKIP_OPTEE_S_EL1_INT_REGISTER))
```
The Contributor’s Guide indicates that it requires a Microsoft Github account,
so I opted to post a patch to this list.
Cheers,
Diederik
PS: https://developer.trustedfirmware.org/ seems to be full of spam; you may
want to look into that.