Hi,
We are pleased to announce the formal release of Trusted Firmware-A version 2.14 bundle of project deliverables.
This includes Trusted Firmware-A, Trusted Firmware-A Tests, Hafnium, TF-RMM, Trusted Services, and TF-A OpenCI scripts/jobs components.
These went live on Nov, 24th 2025.
Please find tag references and change logs at the end of this email.
Many thanks to the trustedfirmware.org community for the active engagement in delivering this release!
Notable features of the release version 2.14 are as follows:
TF-A/EL3
* New architectural features support: FEAT_FGWTE3, FEAT_IDTE3, FEAT_RME_GPC2, FEAT_AIE, FEAT_CPA2, FEAT_MPAM_PE_BW_CTRL, FEAT_PFAR, FEAT_RME_GDI.
*
Live Firmware Activation: base support enabling TF-RMM LFA, added RMM MEM RESERVE ABI.
*
Armv9 CPU power down abandon support
* GICv5 driver permitting normal world kernel boot
* GIC720-AE support added
* Per-cpu framework supporting NUMA platforms
* SMCCC SoC name support (SMCCC v1.6 SMCCC_ARCH_SOC_ID)
* SPMD: added FF-A v1.3 FFA_NS_RES_INFO_GET, FFA_ABORT interfaces
* EL3 SPMC: add multiple UUIDs support, TPM event log delivered by HOB list, FFA_MEM_RETRIEVE_REQ from hypervisor
* RME: FEAT_D128 for realm world, SMCCC_ARCH_FEATURE_AVAILABILITY
* Platforms: RD-Aspen added, updates to Arm FVP/Juno, AMD Versal Gen2, Intel, MT8189, MT8196, i.MX94, i.MX95, S32G274A, QTI Kodiak, Renesas R-Car, STM32MP1, STM32MP2, STM32MP21, STM32MP25, Xilinx Versal, ZynqMP
Boot flow
* Transfer list and event log libraries now offered as shared libraries consumed as submodules by TF-A.
* Update to mbedTLS 3.6.5
* Various PSA FWU improvements, namely BL2 in a dedicated FIP, GPT-corruption notifications to BL32, and expanded FWU tests.
Errata/Security mitigations (CPU/GIC)
* New CPU support: Arm Lumex C1, Dionysus, Caddo/Veymont, Venom.
* Added close to 30 new CPU errata across multiple processor families, based on the latest SDEN updates.
Hafnium/SPM (S-EL2)
* FF-A v1.3 early adoption
* FFA_NS_RES_INFO_GET ABI added
* Partition lifecycle support: new states, abort handling. Pre-requisite to secure partitions live firmware activation.
* Notifications support refactored with per-vCPU notifications removed.
* Multi-GIC configuration supporting complex topologies.
* Shrinkwrap used at core of Hafnium testing infrastructure.
TF-RMM (R-EL2)
* RMM v1.1 Planes support
* PMU, timer, GIC ownership transfer.
* Support for FEAT_S1POE/S1PIE, FEAT_S2POE/S2PIE
* RMM v1.1 Memory Encryption Contexts (MEC) support
* Realm Device Assignment
* RMM v1.1. ALP12 base Device Assignment support
* RMI VDEV ABIs, PDEV life cycle, root port IDE key programming, SPDM client as EL0 app.
* Improved ID registers trapping leveraging SMCCC ARCH_FEATURE_AVAILABILITY, in light of future FEAT_IDTE3 support.
* Additional architectural support: FEAT_TCR2, FEAT_D128, single-copy atomics,
TF-A Tests
*
RME: DA and PCIe, Planes, MEC
*
SPM/FF-A
* Bumped support o FF-A v1.3
* FFA_ABORT ABI
* Deprecated per-vCPU notifications.
* FWU: added negative testing (invalid image size, corrupted ROTPK)
* GICv5 support added
* Arm architecture tests
* FEAT_TCR2 (for RME) , FEAT_IDTE3, FEAT_MPAM_PE_BW_CTRL, FEAT_EBEP, FEAT_AIE, FEAT_PFAR
* SMCCC_ARCH_SOC_ID
* SMCCC_ARCH_FEATURE_AVAILABILITY
* Fuzzing: added SMC fuzzer documentation
* Basic LFA framework tests
* Platforms updates: AMD/Xilinx, Arm FVP, Corstone-1000
Trusted Services
* RD-Aspen platform support added.
* EFI ESRT handling in FWU Proxy (supporting Corstone1000 platform).
* Block Storage service threat modelling.
Release tags across repositories:
https://git.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a/+/r…https://git.trustedfirmware.org/plugins/gitiles/TF-A/tf-a-tests/+/refs/tags…https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-ci-scripts/+/refs/t…https://git.trustedfirmware.org/plugins/gitiles/ci/tf-a-job-configs/+/refs/…https://git.trustedfirmware.org/plugins/gitiles/hafnium/hafnium/+/refs/tags…https://git.trustedfirmware.org/plugins/gitiles/ci/hafnium-ci-scripts/+/ref…https://git.trustedfirmware.org/plugins/gitiles/ci/hafnium-job-configs/+/re…https://git.trustedfirmware.org/plugins/gitiles/TF-RMM/tf-rmm/+/refs/tags/t…https://git.trustedfirmware.org/plugins/gitiles/TS/trusted-services/+/refs/…
Change logs:
https://trustedfirmware-a.readthedocs.io/en/v2.14.0/change-log.html#id1https://trustedfirmware-a-tests.readthedocs.io/en/v2.14.0/change-log.html#v…https://hafnium.readthedocs.io/en/v2.14.0/change-log.html#id1https://tf-rmm.readthedocs.io/en/tf-rmm-v0.8.0/about/change-log.html#v0-8-0https://git.trustedfirmware.org/plugins/gitiles/TS/trusted-services/+/refs/…
Regards,
Olivier.
Hi,
This is a one off session for a partner to present coming improvements related to Hafnium project.
Apologies for the meeting time not accommodating people in US timezones.
We'll record the session and publish in the TF-A tech forum page as usual.
Regards,
Olivier.
________________________________
From: Google Calendar <calendar-notification(a)google.com> on behalf of Olivier Deprez via Hafnium <hafnium(a)lists.trustedfirmware.org>
Sent: 07 November 2025 09:13
To: hafnium(a)lists.trustedfirmware.org <hafnium(a)lists.trustedfirmware.org>
Subject: [Hafnium] Invitation: TF-A Tech Forum - Hafnium future looking improvements @ Thu Nov 13, 2025 12pm - 1pm (GMT+1) (hafnium(a)lists.trustedfirmware.org)
TF-A Tech Forum - Hafnium future looking improvements
Thursday Nov 13, 2025 ⋅ 12pm – 1pm
Central European Time - Paris
Location
https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…
Hi, This is a one off session for a partner to present coming improvements
related to Hafnium project. Apologies for the meeting time not
accommodating people in US timezones. We'll record the session and publish
in the TF-A tech forum page as usual. Regards,Olivier.Trusted Firmware is
inviting you to a scheduled Zoom meeting.Please download and import the
following iCalendar (.ics) files to your calendar
system.Weekly: https://linaro-org.zoom.us/meeting/tJcocu6gqDgjEtOkyBhSQauR1sUyFwIcNKLa/ics…
Zoom
Meetinghttps://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34.1Meeting
ID: 935 5786 3987Passcode: 939141---One tap
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To unsubscribe send an email to hafnium-leave(a)lists.trustedfirmware.org
All,
Please be aware that today we have published our AI policy with Guidance on
AI-assisted contributions.
See the full details here: https://www.trustedfirmware.org/aipolicy/
Should you have any questions feel free to raise them.
Thanks,
Shaun
Community Manager
Hi All,
The next release of the Firmware-A bundle of projects tagged v2.12 has an expected code freeze date of Nov, 8th 2024.
Refer to the release cadence section from TF-A documentation (https://trustedfirmware-a.readthedocs.io/en/latest/about/release-informatio…).
Closing out the release takes around 6-10 working days after the code freeze.
v2.12 release preparation tasks start from now.
We want to ensure that planned feature patches for the release are submitted in good time for the review process to conclude.
As a kind recommendation and a matter of sharing CI resources, please launch CI jobs with care e.g.:
-For simple platform, docs changes, or one liners, use Allow-CI+1 label (no need for a full Allow-CI+2 run).
-For large patch stacks use Allow-CI+2 at top of the patch stack (and if required few individual Allow+CI+1 labels in the middle of the patch stack).
-Carefully analyze results and fix the change if required, before launching new jobs on the same change.
-If after issuing a Allow-CI+1 or Allow-CI+2 label a Build start notice is not added as a gerrit comment on the patch right away please be patient as under heavy load CI jobs can be queued and in extreme conditions it can be over an hour before the Build start notice is issued. Issuing another Allow-CI+1 or Allow-CI+2 label will just result in an additional job being queued.
--
Thanks,
Govindraj R
Hi,
This issue was raised long time ago but unfortunately never got fixed/merged.
It may be ok restoring the change and progress it:
Https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/11002<https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/11002>
Https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.…<https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.…>
https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.…
On a related note, I hope you saw the deprecation notice:
https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.…
Regards,
Olivier.
________________________________
From: Sureshkumar Ponnusamy <sponnusamy(a)microsoft.com>
Sent: 11 November 2025 05:46
To: David Daney <daviddaney(a)microsoft.com>; tf-a-owner(a)lists.trustedfirmware.org <tf-a-owner(a)lists.trustedfirmware.org>
Cc: Giri Mudusuru <girimudusuru(a)microsoft.com>; Kun Qin <Kun.Qin(a)microsoft.com>
Subject: RE: Question about SPM-MM SMC function ids
Yes, the problem is in comparing logic and masks used.
From: David Daney <daviddaney(a)microsoft.com>
Sent: Monday, November 10, 2025 7:38 PM
To: Sureshkumar Ponnusamy <sponnusamy(a)microsoft.com>; tf-a-owner(a)lists.trustedfirmware.org
Cc: Giri Mudusuru <girimudusuru(a)microsoft.com>; Kun Qin <Kun.Qin(a)microsoft.com>
Subject: Re: Question about SPM-MM SMC function ids
According to the DEN0060A specification the only values used are:
MM_VERSION: 0x8400 0040
MM_COMMUNICATE: 0x8400 0041/0xC400 0041
These don't overlap with the TRNG function IDs defined in DEN0098
David.
________________________________
From: Sureshkumar Ponnusamy <sponnusamy(a)microsoft.com<mailto:sponnusamy@microsoft.com>>
Sent: Monday, November 10, 2025 7:32 PM
To: tf-a-owner(a)lists.trustedfirmware.org<mailto:tf-a-owner@lists.trustedfirmware.org> <tf-a-owner(a)lists.trustedfirmware.org<mailto:tf-a-owner@lists.trustedfirmware.org>>
Cc: Giri Mudusuru <girimudusuru(a)microsoft.com<mailto:girimudusuru@microsoft.com>>; David Daney <daviddaney(a)microsoft.com<mailto:daviddaney@microsoft.com>>; Kun Qin <Kun.Qin(a)microsoft.com<mailto:Kun.Qin@microsoft.com>>
Subject: Question about SPM-MM SMC function ids
Hi Manish, Levi Yun , TF-A community ,
I am facing an issue when enabling SPM-MM feature and it looks like there is a minor issue with the SMC ID range check.
When SPM-MM is enabled, I cannot use the TRNG SMC services.
/* These macros are used to identify SPM-MM calls using the SMC function ID */
#define SPM_MM_FID_MASK U(0xffff)
#define SPM_MM_FID_MIN_VALUE U(0x40)
#define SPM_MM_FID_MAX_VALUE U(0x7f)
#define is_spm_mm_fid(_fid) \
((((_fid) & SPM_MM_FID_MASK) >= SPM_MM_FID_MIN_VALUE) && \
(((_fid) & SPM_MM_FID_MASK) <= SPM_MM_FID_MAX_VALUE))
Here, the SPM-MM SMC ID range spans from 0x40 to 0x7F, which overlaps with the TRNG SMC service IDs:
/* SMC function IDs for TRNG queries */
#define ARM_TRNG_VERSION U(0x84000050)
#define ARM_TRNG_FEATURES U(0x84000051)
#define ARM_TRNG_GET_UUID U(0x84000052)
#define ARM_TRNG_RND32 U(0x84000053)
#define ARM_TRNG_RND64 U(0xC4000053)
Could you please clarify the rationale behind including the TRNG SMC IDs within the SPM-MM ID range? If this overlap was unintentional, we have to fix it.
Looking forward to your insights and feedback on this matter.
Thanks
Suresh
Hi,
Please find the latest report on new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan.
1 new defect(s) introduced to ARM-software/arm-trusted-firmware found with Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 1 of 1 defect(s)
** CID 493457: Control flow issues (UNREACHABLE)
/plat/arm/board/fvp/fvp_spmd_logical_sp.c: 37 in fvp_get_partition_info()
_____________________________________________________________________________________________
*** CID 493457: Control flow issues (UNREACHABLE)
/plat/arm/board/fvp/fvp_spmd_logical_sp.c: 37 in fvp_get_partition_info()
31 * SPM.
32 *
33 * TODO: Integrate this helper function for a new anticipated feature.
34 */
35 return;
36
>>> CID 493457: Control flow issues (UNREACHABLE)
>>> This code cannot be reached: "struct ffa_value ret = {0UL};".
37 struct ffa_value ret = { 0 };
38 uint32_t target_uuid[4] = { 0 };
39 static struct ffa_partition_info_v1_1
40 part_info[SPMD_LP_MAX_SUPPORTED_SP] = { 0 };
41
42 uint16_t num_partitions = 0;
________________________________________________________________________________________________________
To view the defects in Coverity Scan visit, https://scan.coverity.com/projects/arm-software-arm-trusted-firmware?tab=ov…
TF-A Tech Forum - Hafnium future looking improvements
Thursday Nov 13, 2025 ⋅ 12pm – 1pm
Central European Time - Paris
Location
https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…
Hi, This is a one off session for a partner to present coming improvements
related to Hafnium project. Apologies for the meeting time not
accommodating people in US timezones. We'll record the session and publish
in the TF-A tech forum page as usual. Regards,Olivier.Trusted Firmware is
inviting you to a scheduled Zoom meeting.Please download and import the
following iCalendar (.ics) files to your calendar
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(re-sending as it seems this email did not properly reach the ML)
Hi,
On Oct 30th in the TF-A Tech Forum, two different sessions of 30 minutes each will be presented:
TF-A SMC fuzzer improvements - Slava Andrianov
* Motivating secure world fuzzing
* Fuzzer configuration improvements
* Future fuzzing work
TF-RMM ID registers management - Sona Rebecca Mathew
* Earlier RMM directly read ID registers, creating a dependency on EL3 revisions
to enable features forcing a version compatibility between the two.
* New approach: EL3 capabilities are queried via an SMC call
and RMM now uses cached ID register copies populated at cold boot.
Includes forward-looking support for FEAT_IDTE3 in TF-A.
Regards,
Olivier.
TF-A Tech Forum
Thursday Oct 30, 2025 ⋅ 5pm – 6pm (Central European Time - Paris)
Trusted Firmware is inviting you to a scheduled Zoom meeting.
Please download and import the following iCalendar (.ics) files to your calendar system.
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Hi, On Oct 30th in the TF-A Tech Forum, two different sessions of 30
minutes each will be presented: TF-A SMC fuzzer improvements - Slava
Andrianov * Motivating secure world fuzzing * Fuzzer configuration
improvements * Future fuzzing work TF-RMM ID registers management - Sona
Rebecca Mathew * Earlier RMM directly read ID registers, creating a
dependency on EL3 revisions to enable features forcing a version
compatibility between the two. * New approach: EL3 capabilities are queried
via an SMC call and RMM now uses cached ID register copies populated at
cold boot. Includes forward-looking support for FEAT_IDTE3 in TF-A.
Regards, Olivier.
TF-A Tech Forum
Thursday Oct 30, 2025 ⋅ 5pm – 6pm
Central European Time - Paris
Location
https://linaro-org.zoom.us/j/93557863987?pwd=56a1l8cBnetDTZ6eazHGaE1Ctk4W34…https://www.google.com/url?q=https%3A%2F%2Flinaro-org.zoom.us%2Fj%2F9355786…
Trusted Firmware is inviting you to a scheduled Zoom meeting.Topic: TF-A
Tech ForumTime: May 15, 2025 02:00 PM London Every 2 weeks on Thu,
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Guests
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Hi All,
During the TF-A CI upgrade from Arm GNU Toolchain version 14.2.Rel1 to 14.3.Rel1 [1], the Marvell A3700 platform build began failing. Since TF-A does not include the WTMI sources and there has been no response from the Marvell maintainers, the platform has been temporarily removed from the CI [2]. We will restore it once the fix lands in the Marvell upstream and links cleanly with 14.3/binutils 2.44.
The sections below outline the CI environment, build configuration, and error details for reference.
*
Test config
tf-l1-build-plat/a3700-default:nil
*
*
CI Test Environment
Host: Ubuntu 22.04 (Docker)
Toolchains:
aarch64-none-elf: Arm GNU 14.3.Rel1
arm-none-eabi (CM3/WTMI): Arm GNU 14.3.Rel1 (fails); passes with 14.2.Rel1
*
Representative build params:
make CROSS_COMPILE=aarch64-none-elf- CROSS_CM3=arm-none-eabi- PLAT=a3700 BL33=/dev/null CM3_SYSTEM_RESET=1 A3720_DB_PM_WAKEUP_SRC=1 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 DEBUG=1 V=1
*
Build Failure:
(*ABS*0x1fff0000): Unknown destination type (ARM/Thumb) in main.o
(.text.startup+0x2a): dangerous relocation: unsupported relocation
/home/../.../arm-none-eabi/bin/ld: warning: build/sys_init.elf has a LOAD segment with RWX permissions
/home/../.../arm-none-eabi/bin/ld: (*ABS*0x1fff0000): Unknown destination type (ARM/Thumb) in main.o
main.o: in function `main':
.../A3700-utils-marvell/wtmi/sys_init/main.c:350:(.text.startup+0x2a): dangerous relocation: unsupported relocation
collect2: error: ld returned 1 exit status
Root Cause
On Cortex-M (Thumb-only), calls/jumps to absolute addresses must have bit0 = 1 to indicate Thumb state. Older binutils tolerated raw addresses like 0x1FFF0000; binutils 2.44 now errors if the destination state is unknown (no stub is inserted).
Requested fix (in WTMI sources)
Please update any absolute branch/call targets to be explicitly Thumb (LSB=1), or define a Thumb symbol and call that.
Acceptance criteria:
WTMI links cleanly with arm-none-eabi 14.3.Rel1 (binutils 2.44) with no:
*
Unknown destination type (ARM/Thumb)
*
dangerous relocation: unsupported relocation
[1] https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads
[2] https://review.trustedfirmware.org/c/ci/tf-a-ci-scripts/+/44444/5
Thanks & regards,
Jayanth
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Hi,
In light of coming TF-A v2.14 in November, we would like to mark the SPM-MM implementation [1] as deprecated. Our understanding is that it's not longer very actively used at least from an upstream perspective, while most SPM sw architecures have adopted/migrated to the FF-A standard [2] [3].
The intent would be to remove this implementation completely from next release in May 26 onwards.
This would remove the maintenance burden for 3 orthogonal options, reducing to the 2 FF-A compliant implementations.
Simplification also comes to the testing side and CI.
The SPM-MM implementation would continue to be supported in LTS branches maintained for 7 years.
Let us know if this causes major concerns.
Thanks, Regards,
Olivier.
[1] https://trustedfirmware-a.readthedocs.io/en/latest/components/secure-partit…
[2] https://trustedfirmware-a.readthedocs.io/en/latest/components/secure-partit…
[3] https://trustedfirmware-a.readthedocs.io/en/latest/components/el3-spmc.html
Hi All,
The next release of the Firmware-A bundle of projects tagged v2.13 has an expected code freeze date of May, 2nd 2025.
In order to accommodate the Linaro connect event occurring during the week of May 12th we may extend the release completion date up until the week of May 26th.
v2.13 release preparation tasks start from now.
We want to ensure that planned feature patches for the release are submitted in good time for the review process to conclude.
As a kind recommendation and a matter of sharing CI resources, please launch CI jobs with care e.g.:
-For simple platform, docs changes, or one liners, use Allow-CI+1 label (no need for a full Allow-CI+2 run).
-For large patch stacks use Allow-CI+2 at top of the patch stack (and if required few individual Allow+CI+1 labels in the middle of the patch stack).
-Carefully analyze results and fix the change if required, before launching new jobs on the same change.
-If after issuing a Allow-CI+1 or Allow-CI+2 label a Build start notice is not added as a gerrit comment on the patch right away please be patient as under heavy load CI jobs can be queued and in extreme conditions it can be over an hour before the Build start notice is issued. Issuing another Allow-CI+1 or Allow-CI+2 label will just result in an additional job being queued.
Regards,
Olivier.
Hi, On Oct 16th in the TF-A Tech Forum, Madhukar Pappireddy will present
his work on secure partitions live firmware activation: requirements,
implementation overview, and challenges. Regards, Olivier.
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In Firmware First Handling (FFH), all external aborts are trapped to EL3,
they can be notified to OS/VM using SDEI or by reinjecting SEA. SDEI is
imprecise exception and asynchronous.
GHES driver defines SEA as the only synchronous mechanism (
https://github.com/torvalds/linux/blob/master/drivers/acpi/apei/ghes.c#L118),
hence SEA reinjection is useful for SEA's where OS/VM takes appropriate
action.
For example when an user space application running at EL0 consumes a
poisoned memory by re-throwing SEA the kernel can terminate the individual
application.
For SEA Reinjection we need to figure out the right EL to reinject the SEA
to and then copy ESR_EL3, SPSR_EL3, ELR_EL3 and FAR_EL3 to target ELs
respective registers and calculate new PSTATE for EL3.
To find target_el reference code is provided in SyncExternalAbortTarget
(J1.3.2.7) in ARM DDI 0487L.a.