June 2021 - TF-A - lists.trustedfirmware.org

Re: [TF-A] PL011 clock handling between TF-A and Linux

by Varun Wadekar

Hi Michal, AFAIK, TF-A does not publish guidelines for clocks/resets for shared IP. It is left to the platforms. For Tegra platforms, the clocks/reset are managed by a central entity. TF-A is expected to co-ordinate with this entity. Unfortunately, PL011 does not fall in this category and is expected to be kept on by the previous bootloader. -Varun -----Original Message----- From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> On Behalf Of Michal Simek via TF-A Sent: Monday, June 21, 2021 2:24 PM To: tf-a(a)lists.trustedfirmware.org Subject: [TF-A] PL011 clock handling between TF-A and Linux External email: Use caution opening links or attachments Hi, recently we have hit the case where Linux has pl011 driver and using it as a console. The same console is also used by TF-A. If you look at implementation details Linux pl011 driver has in pl011_console_write() clk_enable/clk_disable calls. I can't see any clock handling for PL011 in TF-A that's why I guess that TF-A expectation is that clocks are enabled and must be enabled all the time because pl011 is also used as crashed console. That's why I would like to check with you what's the clock expectation in these shared IP cases. Do you have a requirement that firmware should keep refcount of IP users and never disable clock when only one requires it? Thanks, Michal -- TF-A mailing list TF-A(a)lists.trustedfirmware.org https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.tru…

2 years, 10 months

2
3
0 0

PL011 clock handling between TF-A and Linux

by Michal Simek

Hi, recently we have hit the case where Linux has pl011 driver and using it as a console. The same console is also used by TF-A. If you look at implementation details Linux pl011 driver has in pl011_console_write() clk_enable/clk_disable calls. I can't see any clock handling for PL011 in TF-A that's why I guess that TF-A expectation is that clocks are enabled and must be enabled all the time because pl011 is also used as crashed console. That's why I would like to check with you what's the clock expectation in these shared IP cases. Do you have a requirement that firmware should keep refcount of IP users and never disable clock when only one requires it? Thanks, Michal

2 years, 10 months

1
0
0 0

PIE in tf-a

by virtuoho virtuoho

Hello tf experts, I've been studying the PIE support in TF-A recently, and there is one thing I'm confused about. One is GOT table entry, is there any difference between this and .rela.dyn? I have done some homework, but I didn't find the answer. If someone can tell me, thanks a lot. It looks like the current got segment is only 8 byte, so why must I need this section? Which kind of code will put into this section?

2 years, 10 months

1
0
0 0

TF-A] CANCELLED: TF-A Tech Forum Agenda @ Thr 17th June 2021 16:00-1700 BST

by Joanna Farley

Apologies we don't have any topics to present this week so I am cancelling the TF-A Tech forum for 17th June 2021. We do however we have an exciting topic coming up for Thursday 1st July 2021 which we will share more about nearer the time. In addition I’ll also like to promote this separate Linaro and Arm CCA Tech Event - Deep dive into Arm Confidential Compute Architecture the details of which can be found here https://www.linaro.org/events/linaro-and-arm-cca-tech-day-deep-dive-into-ar… Registration is free for this event which will begin at 14:00 UTC on June 23rd . Thanks all. Joanna

2 years, 10 months

1
0
0 0

Canceled event with note: TF-A Tech Forum @ Thu Jun 17, 2021 4pm - 5pm (BST) (tf-a@lists.trustedfirmware.org)

by joanna.farley＠arm.com

This event has been canceled with this note: "Apologies we don't have any topics to present this week so I am cancelling the Tech forum for 17th June 2021 however we have an exciting topic coming up for Thursday 1st July 2021 which we will share near the time." Title: TF-A Tech Forum We run an open technical forum call for anyone to participate and it is not restricted to Trusted Firmware project members. It will operate under the guidance of the TF TSC. Feel free to forward this invite to colleagues. Invites are via the TF-A mailing list and also published on the Trusted Firmware website. Details are here: https://www.trustedfirmware.org/meetings/tf-a-technical-forum/Tr… Firmware is inviting you to a scheduled Zoom meeting.Join Zoom Meetinghttps://zoom.us/j/9159704974Meeting ID: 915 970 4974One tap mobile+16465588656,,9159704974# US (New York)+16699009128,,9159704974# US (San Jose)Dial by your location        +1 646 558 8656 US (New York)        +1 669 900 9128 US (San Jose)        877 853 5247 US Toll-free        888 788 0099 US Toll-freeMeeting ID: 915 970 4974Find your local number: https://zoom.us/u/ad27hc6t7h   When: Thu Jun 17, 2021 4pm – 5pm United Kingdom Time Calendar: tf-a(a)lists.trustedfirmware.org Who: * Bill Fletcher - creator * marek.bykowski(a)gmail.com * okash.khawaja(a)gmail.com * tf-a(a)lists.trustedfirmware.org Invitation from Google Calendar: https://calendar.google.com/calendar/ You are receiving this courtesy email at the account tf-a(a)lists.trustedfirmware.org because you are an attendee of this event. To stop receiving future updates for this event, decline this event. Alternatively you can sign up for a Google account at https://calendar.google.com/calendar/ and control your notification settings for your entire calendar. Forwarding this invitation could allow any recipient to send a response to the organizer and be added to the guest list, or invite others regardless of their own invitation status, or to modify your RSVP. Learn more at https://support.google.com/calendar/answer/37135#forwarding

2 years, 10 months

1
0
0 0

SP manifest: avoid manual updates to "entrypoint-offset"

by Varun Wadekar

Hello, We (Nico/Raghu) have been implementing SEL0 partitions for Tegra platforms and recently hit an issue, where the "entrypoint-offset" field of the SP manifest [1] cannot cope with increasing manifest blobs. The way the SP manifest is created today, the "entrypoint-offset" field is set to a value *statically* by the implementer. Down the line if the manifest grows past the value written in the "entrypoint-offset", we must manually update it. This needs to be fixed. We believe there is an opportunity to upgrade the sptool to handle this situation during SP package creation, where sptool calculates the manifest size and bumps the "entrypoint-offset" past the end of the manifest. There are other ways of patching the SP manifest at runtime, but they seem sub-optimal. Please let me know if there are other ideas to solve this problem. I will post a patch to update the sptool shortly but wanted to get the ball rolling. Cheers. [1] 14. FF-A manifest binding to device tree - Trusted Firmware-A documentation<https://trustedfirmware-a.readthedocs.io/en/latest/components/ffa-manifest-…>

2 years, 10 months

1
0
0 0

Test Post

by Arjun Khare

Test (sorry for the noise)

2 years, 10 months

1
0
0 0

Re: [TF-A] Support for Kinibi in ATF/SPMD - linear ID

by Achin Gupta

Hi Francois, The blobs are passed in memory only when the primary core boots. The linear id is required when both primaries and secondaries boot. Secondly, the linear id is used to reference per-cpu structures in memory during very early initialisation. Putting the linear id in a memory structure would either require a per-cpu structure (chicken and egg) or a read-only global structure (to avoid complicated locks with the MMU turned off). It seems to me that the linear id should be passed in an unused register specified by the partition manifest. Passing it in the blob list seems a bit counter intuitive to me but happy to understand your thoughts better. cheers, Achin ________________________________ From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of François Ozog via TF-A <tf-a(a)lists.trustedfirmware.org> Sent: 14 June 2021 16:29 To: Lukas Hanel <lukas.hanel(a)trustonic.com> Cc: tf-a(a)lists.trustedfirmware.org <tf-a(a)lists.trustedfirmware.org> Subject: Re: [TF-A] Support for Kinibi in ATF/SPMD - linear ID This looks like a good candidate for the bloblist discussion we have on other mail thread. Why not aggregating "topology" metadata in a block rather than passing "random" information elements in registers? On Thu, 10 Jun 2021 at 13:57, Lukas Hanel via TF-A <tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org>> wrote: Hi, in this PR, I propose a first change to the SPMD to better support Kinibi, the TEE from Trustonic. https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/10235 The idea here is to pass the core linear id in the x3 register in the boot of secondary cores. In the past, the Kinibi SPD was not public and so some requirements to TF-A were not visible to the wider community. For Kinibi, one binary should run on a multitude of platforms. For that reason, many platform-specific settings are shared by TF-A with Kinibi: at boot, in registers and in a boot datastructure, and at runtime. In the line of work of making Kinibi compatible with FFA APIs, I moved some bits from the Kinibi SPD to the SPMD. Instead of sharing such patches only with our customers, we would like to upstream the patches to the generic code. For this particular patch, it is really simple and changes the interface SPMD-to-SPMC in a somewhat adhoc manner. There is some discussion within ARM to standardize such behavior and to propose configuration options, i.e. within a manifest. That way, you could change what register the linear id, if at all, should be transferred in. A first tour of the CI showed that there seem to be no consequences to hafnium and optee. I guess, question to the mailing list, is there something that this patch breaks? Greetings, Lukas Trustonic SAS - 535 route de Lucioles, Les Aqueducs Batiment 2, Sophia Antipolis 06560 Valbonne, France – SAS au capital de 3 038 000€ - RCS Grasse – SIRET 480 011 998 00055 - TVA intracommunautaire : FR02 480 011 998 -- TF-A mailing list TF-A(a)lists.trustedfirmware.org<mailto:TF-A@lists.trustedfirmware.org> https://lists.trustedfirmware.org/mailman/listinfo/tf-a -- [https://drive.google.com/a/linaro.org/uc?id=0BxTAygkus3RgQVhuNHMwUi1mYWc&ex…] François-Frédéric Ozog | Director Linaro Edge & Fog Computing Group T: +33.67221.6485 francois.ozog(a)linaro.org<mailto:francois.ozog@linaro.org> | Skype: ffozog

2 years, 10 months

2
1
0 0

Re: [TF-A] Support for Kinibi in ATF/SPMD - linear ID

by François Ozog

This looks like a good candidate for the bloblist discussion we have on other mail thread. Why not aggregating "topology" metadata in a block rather than passing "random" information elements in registers? On Thu, 10 Jun 2021 at 13:57, Lukas Hanel via TF-A < tf-a(a)lists.trustedfirmware.org> wrote: > Hi, > > in this PR, I propose a first change to the SPMD to better support Kinibi, > the TEE from Trustonic. > https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/10235 > > The idea here is to pass the core linear id in the x3 register in the boot > of secondary cores. > > In the past, the Kinibi SPD was not public and so some requirements to > TF-A were not visible to the wider community. > For Kinibi, one binary should run on a multitude of platforms. > For that reason, many platform-specific settings are shared by TF-A with > Kinibi: at boot, in registers and in a boot datastructure, and at runtime. > > In the line of work of making Kinibi compatible with FFA APIs, I moved > some bits from the Kinibi SPD to the SPMD. > Instead of sharing such patches only with our customers, we would like to > upstream the patches to the generic code. > > For this particular patch, it is really simple and changes the interface > SPMD-to-SPMC in a somewhat adhoc manner. > There is some discussion within ARM to standardize such behavior and to > propose configuration options, i.e. within a manifest. > That way, you could change what register the linear id, if at all, should > be transferred in. > > A first tour of the CI showed that there seem to be no consequences to > hafnium and optee. > I guess, question to the mailing list, is there something that this patch > breaks? > > Greetings, > Lukas > > > Trustonic SAS - 535 route de Lucioles, Les Aqueducs Batiment 2, Sophia > Antipolis 06560 Valbonne, France – SAS au capital de 3 038 000€ - RCS > Grasse – SIRET 480 011 998 00055 - TVA intracommunautaire : FR02 480 011 998 > -- > TF-A mailing list > TF-A(a)lists.trustedfirmware.org > https://lists.trustedfirmware.org/mailman/listinfo/tf-a > -- François-Frédéric Ozog | *Director Linaro Edge & Fog Computing Group* T: +33.67221.6485 francois.ozog(a)linaro.org | Skype: ffozog

2 years, 10 months

1
0
0 0

Support for Kinibi in ATF/SPMD - linear ID

by Lukas Hanel

Hi, in this PR, I propose a first change to the SPMD to better support Kinibi, the TEE from Trustonic. https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/10235 The idea here is to pass the core linear id in the x3 register in the boot of secondary cores. In the past, the Kinibi SPD was not public and so some requirements to TF-A were not visible to the wider community. For Kinibi, one binary should run on a multitude of platforms. For that reason, many platform-specific settings are shared by TF-A with Kinibi: at boot, in registers and in a boot datastructure, and at runtime. In the line of work of making Kinibi compatible with FFA APIs, I moved some bits from the Kinibi SPD to the SPMD. Instead of sharing such patches only with our customers, we would like to upstream the patches to the generic code. For this particular patch, it is really simple and changes the interface SPMD-to-SPMC in a somewhat adhoc manner. There is some discussion within ARM to standardize such behavior and to propose configuration options, i.e. within a manifest. That way, you could change what register the linear id, if at all, should be transferred in. A first tour of the CI showed that there seem to be no consequences to hafnium and optee. I guess, question to the mailing list, is there something that this patch breaks? Greetings, Lukas Trustonic SAS - 535 route de Lucioles, Les Aqueducs Batiment 2, Sophia Antipolis 06560 Valbonne, France - SAS au capital de 3 038 000EUR - RCS Grasse - SIRET 480 011 998 00055 - TVA intracommunautaire : FR02 480 011 998

2 years, 10 months

1
0
0 0

2024

2023

2022

2021

2020

2019

2018

TF-A June 2021