Hi Bill,
I continue to the error while trying to invoke “Allow-CI” or other votes as part of gerrit review. I tried multiple browsers as well and logged out before attempting again.
Thanks,
Madhu
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> On Behalf Of Bill Fletcher via TF-A
Sent: Tuesday, June 2, 2020 12:13 PM
To: Varun Wadekar <vwadekar(a)nvidia.com>
Cc: tf-a(a)lists.trustedfirmware.org
Subject: Re: [TF-A] Gerrit seems to be broken
Hi Varun,
Do you still see the problem? It has been reported before.
Regards
Bill
On Tue, 2 Jun 2020 at 18:01, Varun Wadekar via TF-A <tf-a(a)lists.trustedfirmware.org<mailto:tf-a@lists.trustedfirmware.org>> wrote:
Hello,
The TF gerrit review dashboard seems to be broken this morning. I see “Server error” and it does not allow me to post scores or comments. Tried different browsers, but same issue persists.
Anyone else seeing the same problem? Is this is a known issue? If yes, is anyone working on it?
-Varun
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Bill Fletcher | Field Engineering
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bill.fletcher(a)linaro.org<mailto:bill.fletcher@linaro.org> | Skype: billfletcher2020
Hi Varun,
Do you still see the problem? It has been reported before.
Regards
Bill
On Tue, 2 Jun 2020 at 18:01, Varun Wadekar via TF-A <
tf-a(a)lists.trustedfirmware.org> wrote:
> Hello,
>
>
>
> The TF gerrit review dashboard seems to be broken this morning. I see
> “Server error” and it does not allow me to post scores or comments. Tried
> different browsers, but same issue persists.
>
>
>
> Anyone else seeing the same problem? Is this is a known issue? If yes, is
> anyone working on it?
>
>
>
> -Varun
> --
> TF-A mailing list
> TF-A(a)lists.trustedfirmware.org
> https://lists.trustedfirmware.org/mailman/listinfo/tf-a
>
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[image: Linaro] <http://www.linaro.org/>
*Bill Fletcher* | *Field Engineering*
T: +44 7833 498336 <+44+7833+498336>
bill.fletcher(a)linaro.org | Skype: billfletcher2020
Working for me, the main and additional dashboards.
https://review.trustedfirmware.org/admin/repos/TF-A/trusted-firmware-a,dash…
I posted comments earlier ok as well.
Joanna
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of Varun Wadekar via TF-A <tf-a(a)lists.trustedfirmware.org>
Reply to: Varun Wadekar <vwadekar(a)nvidia.com>
Date: Tuesday, 2 June 2020 at 18:02
To: "tf-a(a)lists.trustedfirmware.org" <tf-a(a)lists.trustedfirmware.org>
Subject: [TF-A] Gerrit seems to be broken
Hello,
The TF gerrit review dashboard seems to be broken this morning. I see “Server error” and it does not allow me to post scores or comments. Tried different browsers, but same issue persists.
Anyone else seeing the same problem? Is this is a known issue? If yes, is anyone working on it?
-Varun
Hello,
The TF gerrit review dashboard seems to be broken this morning. I see "Server error" and it does not allow me to post scores or comments. Tried different browsers, but same issue persists.
Anyone else seeing the same problem? Is this is a known issue? If yes, is anyone working on it?
-Varun
Hi All,
The next TF-A Tech Forum is scheduled for Thu 4th June 2020 17:00 - 18:00 (BST). A reoccurring meeting invite has been sent out to the subscribers of this TF-A mailing list. If you don’t have this please let me know.
Agenda:
* TF-A SMC fuzzing module overview - Presented by Mark Dykes
* General explanation of the approach taken to randomize the type and timing of the SMC calls in TF-A to provide a Fuzz testing capability.
* Optional TF-A Mailing List Topic Discussions
Thanks
Joanna
Hi Andrzej
I think recent patch: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/3493 which is currently in review may be solution for your issue where SCU presence is being checked before accessing CLUSTERCFR_EL1 register.
Thanks
Manish Badarkhe
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of "Witkowski, Andrzej via TF-A" <tf-a(a)lists.trustedfirmware.org>
Reply to: "Witkowski, Andrzej" <andrzej.witkowski(a)intel.com>
Date: Monday, 1 June 2020 at 19:38
To: "tf-a(a)lists.trustedfirmware.org" <tf-a(a)lists.trustedfirmware.org>
Cc: "Witkowski, Andrzej" <andrzej.witkowski(a)intel.com>, "Lessnau, Adam" <adam.lessnau(a)intel.com>
Subject: [TF-A] Unhandled Exception at EL3 in BL31 for Neoverse N1 with direct connect of DSU
Hi,
I work on project which uses ARM CPU Neoverse N1 with direct connect of DSU.
I noticed the following error “Unhandled Exception at EL3” in BL31 bootloader after switching from ATF 2.1 to 2.2.
The root cause is that after invoking neoverse_n1_errata-report function in lib/cpus/aarch64/neoverse_n1.S file and reaching the line 525, the function check_errata_dsu_934 in lib/cpus/aarch64/dsu_helpers.S file is always invoked regardless of whether ERRATA_DSU_936184 is set to 0 or to 1.
In our case, ERRATA_DSU_936184 := 0.
[cid:image001.png@01D6384E.C183C050]
[cid:image002.png@01D6384E.C183C050]
Neoverse N1 with direct connect version of DSU doesn’t contain SCU/L3 cache and CLUSTERCFR_EL1 register.
The error “Unhandled Exception at EL3” appears in BL31 bootloader during attempt to read the CLUSTERCFR_EL1 register which doesn’t exist in our RTL HW.
Andrzej Witkowskie
Intel Technology Poland
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This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
Hi,
I work on project which uses ARM CPU Neoverse N1 with direct connect of DSU.
I noticed the following error "Unhandled Exception at EL3" in BL31 bootloader after switching from ATF 2.1 to 2.2.
The root cause is that after invoking neoverse_n1_errata-report function in lib/cpus/aarch64/neoverse_n1.S file and reaching the line 525, the function check_errata_dsu_934 in lib/cpus/aarch64/dsu_helpers.S file is always invoked regardless of whether ERRATA_DSU_936184 is set to 0 or to 1.
In our case, ERRATA_DSU_936184 := 0.
[cid:image001.png@01D63828.FA4B1440]
[cid:image002.png@01D6382A.B84A0950]
Neoverse N1 with direct connect version of DSU doesn't contain SCU/L3 cache and CLUSTERCFR_EL1 register.
The error "Unhandled Exception at EL3" appears in BL31 bootloader during attempt to read the CLUSTERCFR_EL1 register which doesn't exist in our RTL HW.
Andrzej Witkowskie
Intel Technology Poland
---------------------------------------------------------------------
Intel Technology Poland sp. z o.o.
ul. Sowackiego 173 | 80-298 Gdask | Sd Rejonowy Gdask Pnoc | VII Wydzia Gospodarczy Krajowego Rejestru Sdowego - KRS 101882 | NIP 957-07-52-316 | Kapita zakadowy 200.000 PLN.
Ta wiadomo wraz z zacznikami jest przeznaczona dla okrelonego adresata i moe zawiera informacje poufne. W razie przypadkowego otrzymania tej wiadomoci, prosimy o powiadomienie nadawcy oraz trwae jej usunicie; jakiekolwiek przegldanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
Hi all,
Now that the tf.org project maintenance process [1] has been finalized,
it is time to think about electing new maintainers for the project. We
are delighted to announce that the following contributors have been
appointed maintainers by their peers:
- Julius Werner (Google)
- Varun Wadekar (NVIDIA)
- Andre Przywara (Arm)
- Lauren Wehrmeister (Arm)
- Madhukar Pappireddy (Arm)
As outlined in [1], here is the definition and responsibilities of
maintainers:
------------8<------------
There are a number of maintainers assigned to the project. The project
keeps a list of them along with their contact information. Maintainers
don't necessarily need a deep domain expertise of all areas of the
project, instead they look at the project from a high level perspective.
They are expected to ensure that changes adhere to the project's quality
criteria, to its architectural direction, to its threat model and so on.
Code owners and maintainers are complementary roles.
Unlike code owners, maintainers can approve any patch, no matter what
module it concerns. They are responsible for ensuring patches have had
enough overall review and adding their own approval in a timely manner.
They also have merge rights, i.e. the ability to merge a patch in the
tree once it has received all required approvals.
------------8<------------
These people have been granted Code-Review -2/+2 rights in Gerrit and
have been added in the maintainers.rst file as part of this patch:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4298
Congratulations to them!
Best regards,
Sandrine
[1]
https://developer.trustedfirmware.org/w/collaboration/project-maintenance-p…
Hi Pankaj,
Can you please send the specific NOTICE messages which are missing, may be sending 1.5 and 2.3 logs will help.
thanks
Manish
________________________________
From: TF-A <tf-a-bounces(a)lists.trustedfirmware.org> on behalf of Pankaj Gupta via TF-A <tf-a(a)lists.trustedfirmware.org>
Sent: 27 May 2020 09:36
To: tf-a(a)lists.trustedfirmware.org <tf-a(a)lists.trustedfirmware.org>
Subject: [TF-A] After migrating from TFA-1.5 to TFA2.3, parts of NOTICE messages are missed, which comes as part of boot-up logs.
Hi
After migrating from TFA-1.5 to TFA2.3, parts of NOTICE messages are missed, which comes as part of boot-up logs.
Any pointers on how to fix this issue.
Thanks.
Regards
Pankaj
Hi
After migrating from TFA-1.5 to TFA2.3, parts of NOTICE messages are missed, which comes as part of boot-up logs.
Any pointers on how to fix this issue.
Thanks.
Regards
Pankaj