Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/273/

Failed Jobs: MUSCA_B1_GCC_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410973/ MUSCA_B1_ARMCLANG_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410503/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410512/ AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410533/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410555/ MUSCA_B1_ARMCLANG_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410558/ MUSCA_B1_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410584/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410600/ MUSCA_B1_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410667/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410746/ MUSCA_B1_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410838/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410986/ MUSCA_B1_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410989/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410485/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410506/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410524/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410532/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410548/ AN521_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410549/ MUSCA_B1_ARMCLANG_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410568/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410577/ MUSCA_B1_GCC_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410579/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410585/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410595/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410605/ MUSCA_B1_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410719/ MUSCA_B1_GCC_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410781/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410880/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410887/ MUSCA_B1_GCC_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410946/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410958/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410968/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410677/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/411014/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/410493/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410601/ MUSCA_B1_ARMCLANG_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410613/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410615/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410616/ MUSCA_B1_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410624/ MUSCA_B1_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410627/ MUSCA_B1_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410629/ MUSCA_B1_GCC_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410630/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410631/ MUSCA_B1_GCC_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410635/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410638/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410640/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/410653/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410654/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/410655/ MUSCA_B1_GCC_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410668/ MUSCA_B1_GCC_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410672/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410673/ AN521_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410675/ corstone310_GCC_1_Debug_BL2_PROV_MCUBOOT_GEN_KEYS https://ci.trustedfirmware.org/job/tf-m-build-config/410676/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410681/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410691/ AN521_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410693/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410698/ MUSCA_B1_ARMCLANG_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410706/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410715/ MUSCA_B1_ARMCLANG_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410717/ corstone310_GCC_1_Debug_BL2_PROV_TFM_DUMMY https://ci.trustedfirmware.org/job/tf-m-build-config/410730/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410734/ MUSCA_B1_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410742/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410789/ AN521_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410910/ MUSCA_B1_ARMCLANG_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410957/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410977/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410987/ AN521_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410988/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410991/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410995/ MUSCA_B1_GCC_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411010/ MUSCA_B1_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411012/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/411016/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/411026/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/411033/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411034/ AN521_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411052/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/411062/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411063/ MUSCA_B1_ARMCLANG_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411071/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/411073/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411075/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411077/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411088/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411094/ MUSCA_B1_GCC_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411096/ MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411099/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/411107/ AN521_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411123/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411129/ MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411130/ MUSCA_B1_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411131/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411134/ MUSCA_B1_ARMCLANG_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411135/ MUSCA_B1_GCC_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411136/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/411142/ MUSCA_B1_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411145/ AN521_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411146/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/411167/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/411183/ MUSCA_B1_ARMCLANG_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411193/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/411151/ MUSCA_B1_GCC_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410637/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410707/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410708/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410710/ MUSCA_B1_ARMCLANG_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410724/ AN521_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410726/ MUSCA_B1_GCC_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410733/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410743/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410744/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410756/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410761/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/410763/ AN521_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410765/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410768/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410773/ MUSCA_B1_ARMCLANG_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410780/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410796/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410798/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410811/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410834/ AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410839/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410845/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410851/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410856/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/410867/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410871/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410877/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410882/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410883/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410884/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410888/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410889/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410890/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/410893/ MUSCA_B1_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410894/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410909/ MUSCA_B1_GCC_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410911/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410920/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410926/ MUSCA_B1_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410928/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410935/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/410937/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/410940/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/410942/ MUSCA_B1_GCC_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/410945/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/410948/ MUSCA_B1_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/411108/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/411114/

For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/273/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/275/

Failed Jobs: MUSCA_B1_ARMCLANG_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413024/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413364/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/412917/ MUSCA_B1_GCC_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413059/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413384/ MUSCA_B1_GCC_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412785/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/412750/ AN521_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412753/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/412814/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412825/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412841/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412902/ MUSCA_B1_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412972/ corstone310_GCC_1_Debug_BL2_PROV_MCUBOOT_GEN_KEYS https://ci.trustedfirmware.org/job/tf-m-build-config/413017/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413156/ MUSCA_B1_ARMCLANG_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413194/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/412793/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412912/ MUSCA_B1_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413225/ MUSCA_B1_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413265/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412801/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/412811/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412824/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/412837/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/412839/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412854/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/412856/ MUSCA_B1_GCC_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412869/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412910/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412923/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412944/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412961/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412984/ MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412985/ MUSCA_B1_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412990/ MUSCA_B1_ARMCLANG_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412992/ MUSCA_B1_GCC_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413004/ MUSCA_B1_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413040/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413209/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413399/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413414/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413422/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413424/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413442/ MUSCA_B1_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412752/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412761/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412762/ MUSCA_B1_ARMCLANG_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412780/ MUSCA_B1_ARMCLANG_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412794/ MUSCA_B1_GCC_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412799/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412800/ MUSCA_B1_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412806/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412808/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412816/ AN521_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412848/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/412863/ MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412875/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/412891/ MUSCA_B1_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412899/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412908/ MUSCA_B1_GCC_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412919/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/412925/ MUSCA_B1_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412929/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412930/ MUSCA_B1_GCC_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412932/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412943/ MUSCA_B1_ARMCLANG_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412953/ MUSCA_B1_GCC_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412957/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412962/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/412964/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/412973/ MUSCA_B1_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412976/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/412977/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/412986/ MUSCA_B1_ARMCLANG_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/412989/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413000/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413002/ AN521_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413015/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413018/ MUSCA_B1_GCC_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413043/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413049/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413053/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413071/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413075/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413081/ AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413083/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413094/ MUSCA_B1_ARMCLANG_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413097/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413098/ AN521_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413102/ AN521_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413109/ AN521_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413154/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413162/ MUSCA_B1_GCC_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413175/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413179/ AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413181/ MUSCA_B1_ARMCLANG_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413182/ MUSCA_B1_GCC_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413186/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413204/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413215/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413253/ AN521_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413257/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413260/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413306/ MUSCA_B1_ARMCLANG_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413318/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413326/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413337/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413338/ MUSCA_B1_GCC_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413344/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413351/ MUSCA_B1_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413358/ MUSCA_B1_GCC_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413366/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413389/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413394/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413395/ MUSCA_B1_ARMCLANG_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413398/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413405/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413406/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413423/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413430/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413452/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413195/ corstone310_GCC_1_Debug_BL2_PROV_TFM_DUMMY https://ci.trustedfirmware.org/job/tf-m-build-config/413367/ MUSCA_B1_ARMCLANG_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413354/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413138/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413139/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413141/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413231/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413152/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413232/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413237/ MUSCA_B1_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413294/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413297/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413299/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413304/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413310/ AN521_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413234/ AN521_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413244/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413247/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413311/ MUSCA_B1_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413363/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/413373/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/413374/ AN521_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413380/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413227/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413228/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/413230/ MUSCA_B1_GCC_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413286/ MUSCA_B1_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413317/ MUSCA_B1_GCC_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413321/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/413348/ MUSCA_B1_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/413349/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/413393/

For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/275/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/277/

Failed Jobs: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416024/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416306/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/415927/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/415974/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416047/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416055/ MUSCA_B1_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416205/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416305/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416392/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416498/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/415983/ AN521_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416023/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416062/ MUSCA_B1_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416135/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416197/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416212/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416221/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416352/ AN521_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416451/ MUSCA_B1_GCC_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416458/ MUSCA_B1_GCC_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416510/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/415928/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416051/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416129/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416176/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416196/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416390/ MUSCA_B1_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416443/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416504/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416514/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416520/ MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416558/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416561/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416566/ MUSCA_B1_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/415925/ MUSCA_B1_ARMCLANG_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/415931/ AN521_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/415937/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/415953/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/415954/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/415970/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/415975/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/415979/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/415981/ MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/415987/ MUSCA_B1_ARMCLANG_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/415988/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/415989/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/415990/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416004/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416011/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416045/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416078/ MUSCA_B1_ARMCLANG_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416123/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416126/ MUSCA_B1_GCC_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416145/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416152/ MUSCA_B1_GCC_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416158/ MUSCA_B1_GCC_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416161/ MUSCA_B1_ARMCLANG_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416172/ MUSCA_B1_GCC_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416175/ MUSCA_B1_GCC_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416189/ MUSCA_B1_GCC_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416201/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416226/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416267/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416283/ MUSCA_B1_ARMCLANG_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416314/ MUSCA_B1_ARMCLANG_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416325/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416347/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416372/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416379/ MUSCA_B1_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416397/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416412/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416422/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416426/ MUSCA_B1_ARMCLANG_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416447/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416496/ AN521_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416499/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416538/ MUSCA_B1_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416562/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416564/ MUSCA_B1_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416568/ MUSCA_B1_ARMCLANG_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416576/ MUSCA_B1_ARMCLANG_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416585/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416593/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416611/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416613/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416618/ MUSCA_B1_ARMCLANG_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416621/ MUSCA_B1_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416622/ MUSCA_B1_GCC_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416624/ MUSCA_B1_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416053/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416019/ MUSCA_B1_GCC_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416471/ MUSCA_B1_GCC_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416017/ AN521_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416096/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416027/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416032/ MUSCA_B1_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416033/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416210/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416263/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/416069/ AN521_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416191/ AN521_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416202/ MUSCA_B1_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416242/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416244/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416251/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416272/ MUSCA_B1_GCC_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416288/ AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416295/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416311/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416323/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416334/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/416343/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/416348/ MUSCA_B1_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416364/ MUSCA_B1_GCC_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416396/ MUSCA_B1_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416406/ MUSCA_B1_ARMCLANG_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416420/ MUSCA_B1_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416432/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/416449/ AN521_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416455/ AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416459/ MUSCA_B1_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416469/ MUSCA_B1_GCC_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416515/ AN521_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416516/ MUSCA_B1_GCC_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416525/ MUSCA_B1_ARMCLANG_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416546/ AN521_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/416567/

For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/277/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/279/

Failed Jobs: MUSCA_B1_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418136/ MUSCA_B1_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418188/ MUSCA_B1_GCC_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418178/ AN521_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418181/ MUSCA_B1_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418204/ MUSCA_B1_GCC_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418180/ MUSCA_B1_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418200/ AN521_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418154/ MUSCA_B1_GCC_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418153/ MUSCA_B1_GCC_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418217/ MUSCA_B1_GCC_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418218/ MUSCA_B1_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418151/ MUSCA_B1_GCC_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418159/ MUSCA_B1_GCC_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418208/ MUSCA_B1_ARMCLANG_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418219/ MUSCA_B1_ARMCLANG_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418211/ MUSCA_B1_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418157/ MUSCA_B1_ARMCLANG_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418160/ MUSCA_B1_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418222/ MUSCA_B1_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418220/ MUSCA_B1_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418156/ MUSCA_B1_GCC_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418143/ MUSCA_B1_ARMCLANG_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418213/ MUSCA_B1_GCC_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418209/ MUSCA_B1_GCC_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418149/ MUSCA_B1_GCC_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418145/ AN521_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418221/ AN521_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418223/ AN521_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418155/ AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418210/ AN521_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418146/ AN521_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418147/ MUSCA_B1_ARMCLANG_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418171/ MUSCA_B1_GCC_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418166/ MUSCA_B1_ARMCLANG_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418139/ MUSCA_B1_ARMCLANG_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418140/ MUSCA_B1_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418196/ AN521_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418179/ MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418164/ MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418167/ MUSCA_B1_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418138/ MUSCA_B1_GCC_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418183/ MUSCA_B1_ARMCLANG_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418169/ MUSCA_B1_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418189/ MUSCA_B1_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418201/ MUSCA_B1_GCC_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418197/ MUSCA_B1_ARMCLANG_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418172/ MUSCA_B1_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418182/ MUSCA_B1_ARMCLANG_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418202/ MUSCA_B1_GCC_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418185/ MUSCA_B1_ARMCLANG_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418195/ MUSCA_B1_ARMCLANG_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418203/ AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418184/ MUSCA_B1_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418174/ AN521_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418175/ AN521_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/418191/

For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/279/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/277/

Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2878015 MUSCA_B1_ATFE_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878016 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2878017 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2878018 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2878019 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2878020 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878021 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2878022 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2878023 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2878024 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2878025 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878026 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2878027 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2878028 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878029 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878030 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878031 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2878032 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2878033 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2878034 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2878036 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2878035

For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/277/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/275/

Failed Jobs: MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2876704 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2876705 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2876706 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2876707 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2876708 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876709 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2876710 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2876711 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876712 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876713 MUSCA_B1_ATFE_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876714 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876715 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876716 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2876717 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2876718 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2876719 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2876721 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2876722 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2876723 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2876720 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2876724 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2876725

For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/275/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/273/

Failed Jobs: RSE_TC4_GCC_1_RegS_RegNS_Debug_BL2_CM_DM_BL2_ECDSA_SIGNING https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/3935ttEtdUd2FmZN... MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2875720 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875721 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2875722 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2875723 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2875724 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2875725 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2875726 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2875727 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2875728 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2875729 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2875730 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2875731 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875732 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2875733 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875734 MUSCA_B1_ATFE_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875735 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2875738 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875739 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875736 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2875737 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2875740 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2875741

For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/273/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.