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tf-m-ci-notifications@lists.trustedfirmware.org
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Job tf-m-nightly build 1762 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1762/
Failed Jobs: MUSCA_S1_ARMCLANG_2_FF_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1518913/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1762/artifact/build_results.…
4 months
1
0
0
0
Job tf-m-nightly test 1761 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1761/
Failed Jobs: MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2463699
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2463700
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2463701
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2463702
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1761/artifact/test_results.c…
4 months
1
0
0
0
Job tf-m-nightly test 1760 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/
Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2462333
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462334
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462336
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462337
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462338
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462339
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462340
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462341
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2462342
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2462343
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462344
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462345
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462346
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462347
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2462348
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462349
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2462350
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462351
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2462352
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462353
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462354
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462355
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2462356
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462357
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462358
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2462359
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2462360
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462361
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462362
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462363
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462364
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462365
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/artifact/test_results.c…
4 months, 1 week
1
0
0
0
Job tf-m-nightly build 1760 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/
Failed Jobs: AN521_ARMCLANG_3_STORAGE_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1517725/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/artifact/build_results.…
4 months, 1 week
1
0
0
0
Job tf-m-nightly test 1759 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/
Failed Jobs: MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461400
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461403
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461401
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461402
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461404
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461405
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461406
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461407
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461408
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461409
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2461410
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461411
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461412
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461413
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461414
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461415
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461416
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461417
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461419
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461418
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461420
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461421
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461422
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461423
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461424
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461425
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461426
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461427
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461428
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461429
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461430
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461431
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461432
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461433
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461434
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461435
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461436
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461437
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461439
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461438
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461440
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461441
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461442
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461443
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461444
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461445
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461446
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461447
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/artifact/test_results.c…
4 months, 1 week
1
0
0
0
Job tf-m-nightly build 1759 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/
Failed Jobs: AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1516440/
AN521_GCC_2_FF_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1516407/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/artifact/build_results.…
4 months, 1 week
1
0
0
0
Job tf-m-nightly test 1758 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/
Failed Jobs: MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460562
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460563
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460564
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460565
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460566
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460567
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460568
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460569
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460570
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460571
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460572
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460573
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460574
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460575
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460576
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460577
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460578
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460579
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460580
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460581
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460582
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460583
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460584
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460585
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460586
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460587
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460588
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460589
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460590
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460591
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460592
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460593
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460594
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460595
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460596
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460597
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460598
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460599
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460600
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460601
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460602
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460603
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460604
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2460605
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460606
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460607
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460608
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460609
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/artifact/test_results.c…
4 months, 1 week
1
0
0
0
Job tf-m-nightly build 1758 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/
Failed Jobs: MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1515551/
AN521_ARMCLANG_3_STORAGE_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1515354/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/artifact/build_results.…
4 months, 1 week
1
0
0
0
Job tf-m-nightly test 1757 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/
Failed Jobs: MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459927
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459928
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459929
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459930
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459931
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459932
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459933
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459934
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459935
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459936
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459937
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459938
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459939
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459940
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459941
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459942
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459943
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459944
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459945
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459946
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459947
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459948
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459949
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459950
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459951
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459952
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459953
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459954
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459955
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459956
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459957
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459958
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459959
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459960
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2459961
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459962
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459963
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459964
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459965
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459966
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459967
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459968
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459969
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459970
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459971
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459972
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459973
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/artifact/test_results.c…
4 months, 1 week
1
0
0
0
Job tf-m-nightly build 1757 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/
Failed Jobs: AN519_GCC_1_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1514681/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/artifact/build_results.…
4 months, 1 week
1
0
0
0
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