- TF-M-ci-notifications - lists.trustedfirmware.org

by svc_openci_enginfra＠arm.com

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/47/ Failed Jobs: RSE_TC4_GCC_3_RegS_RegNS_Debug_BL2_RSE_PROVISIONING_SYMMETRIC https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/arm-open-ci-bot/tests/2z… corstone1000_GCC_1_RegS_Release_BL2_NSOFF_CS1K_TEST_FVP https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/arm-open-ci-bot/tests/2z… corstone1000_GCC_2_RegS_Release_BL2_NSOFF_CS1K_TEST_FVP https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/arm-open-ci-bot/tests/2z… For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/47/artifact/test_results.csv IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

6 hours, 43 minutes

1
2
0 0

LAVA notification for Test Job 2764123 MUSCA_B1_GCC_3_Minsizerel_BL2_74698_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2764123 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2764123 Infrastructure error: Flash failure indicated by presence of FAIL.TXT (Details: The hex file cannot be decoded. Checksum calculation failure occurred.) Device details: Hostname: musca-b-05 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_3_Minsizerel_BL2_74698_musca-b Submitted: 2025-07-09 00:07:07 (+0000 UTC) Started: 2025-07-09 01:33:42 (+0000 UTC) Finished: 2025-07-09 01:36:30 (+0000 UTC) Duration: 0:02:48 -- LAVA Linaro Automated Validation Architecture

8 hours, 2 minutes

1
0
0 0

LAVA notification for Test Job 2764083 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF_75194_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2764083 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2764083 Job error: wait-musca-path timed out after 712 seconds Device details: Hostname: musca-b-04 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF_75194_musca-b Submitted: 2025-07-09 00:03:36 (+0000 UTC) Started: 2025-07-09 01:05:43 (+0000 UTC) Finished: 2025-07-09 01:17:45 (+0000 UTC) Duration: 0:12:01 -- LAVA Linaro Automated Validation Architecture

8 hours, 20 minutes

1
0
0 0

LAVA notification for Test Job 2763470 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_73957_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2763470 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2763470 Test error: lava-test-monitor timed out after 1200 seconds Device details: Hostname: musca-b-02 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_73957_musca-b Submitted: 2025-07-08 00:34:10 (+0000 UTC) Started: 2025-07-08 02:29:40 (+0000 UTC) Finished: 2025-07-08 02:55:47 (+0000 UTC) Duration: 0:26:07 -- LAVA Linaro Automated Validation Architecture

1 day, 6 hours

1
0
0 0

LAVA notification for Test Job 2763407 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC_73613_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2763407 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2763407 Test error: lava-test-monitor timed out after 1200 seconds Device details: Hostname: musca-b-03 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC_73613_musca-b Submitted: 2025-07-08 00:26:58 (+0000 UTC) Started: 2025-07-08 01:19:23 (+0000 UTC) Finished: 2025-07-08 01:45:31 (+0000 UTC) Duration: 0:26:08 -- LAVA Linaro Automated Validation Architecture

1 day, 7 hours

1
0
0 0

LAVA notification for Test Job 2762727 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC_72257_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2762727 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2762727 Test error: lava-test-monitor timed out after 1200 seconds Device details: Hostname: musca-b-02 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC_72257_musca-b Submitted: 2025-07-06 23:47:24 (+0000 UTC) Started: 2025-07-06 23:47:25 (+0000 UTC) Finished: 2025-07-07 00:13:33 (+0000 UTC) Duration: 0:26:08 -- LAVA Linaro Automated Validation Architecture

2 days, 9 hours

1
0
0 0

LAVA notification for Test Job 2762187 b_u585i_iot02a_GCC_1_RegS_RegNS_Release_BL2_69889_b-u585i-iot02a

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2762187 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2762187 Infrastructure error: Unable to reboot: '/usr/local/lab-scripts/stm32_tfm_flasher.sh -c reset -s 000C001E4D46501220383832' failed Device details: Hostname: b-u585i-iot02a-01 Type: b-u585i-iot02a Owner: None Worker: w1 Job details: Priority: Medium Description: b_u585i_iot02a_GCC_1_RegS_RegNS_Release_BL2_69889_b-u585i-iot02a Submitted: 2025-07-05 08:24:48 (+0000 UTC) Started: 2025-07-05 08:24:49 (+0000 UTC) Finished: 2025-07-05 08:25:16 (+0000 UTC) Duration: 0:00:26 -- LAVA Linaro Automated Validation Architecture

4 days, 1 hour

1
0
0 0

Job tf-m-nightly build 44 fail

by svc_openci_enginfra＠arm.com

4 days, 9 hours

1
1
0 0

Job tf-m-nightly test 41 fail

by svc_openci_enginfra＠arm.com

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/41/ Failed Jobs: RSE_TC4_GCC_1_RegS_RegNS_MinSizeRel_BL2_RSE_COPY_USE_ROM_LIB_IN_SRAM https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/arm-open-ci-bot/tests/2z… For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/41/artifact/test_results.csv IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

1 week

1
1
0 0

LAVA notification for Test Job 2760945 stm32l562e_dk_ARMCLANG_1_RegS_RegNS_Release_BL2_CRYPTO_OFF_64894_stm32l562e-dk

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2760945 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2760945 Infrastructure error: Connection closed Device details: Hostname: stm32l562e-dk-02 Type: stm32l562e-dk Owner: None Worker: w2 Job details: Priority: Medium Description: stm32l562e_dk_ARMCLANG_1_RegS_RegNS_Release_BL2_CRYPTO_OFF_64894_stm32l562e-dk Submitted: 2025-07-01 15:37:33 (+0000 UTC) Started: 2025-07-01 15:38:01 (+0000 UTC) Finished: 2025-07-01 15:39:23 (+0000 UTC) Duration: 0:01:21 -- LAVA Linaro Automated Validation Architecture

1 week

1
0
0 0

2025

2024

2023

2022

2021

2020

TF-M-ci-notifications