Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/222/
Failed Jobs: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2850743 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2850744 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2850745 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2850742
For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/222/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/223/
Failed Jobs: MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2851103 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2851104 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2851105 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2851106
For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/223/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/224/
Failed Jobs: RSE_TC4_GCC_3_RegBL1_1_Release_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/341791/ RSE_TC4_GCC_1_RegBL1_1_Debug_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/341847/ stm32h573i_dk_GCC_2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341880/ RSE_RDV3R1_GCC_3_RegS_Release_BL2_NSOFF_CFG0 https://ci.trustedfirmware.org/job/tf-m-build-config/341896/ RSE_TC4_GCC_2_Release_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/341900/ stm32h573i_dk_GCC_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341921/ RSE_TC4_GCC_3_RegBL1_1_Release_BL2_CONFIG_TFM_REUSE_COPY_AREA_FOR_SP_STACKS_RSE_XIP_OFF https://ci.trustedfirmware.org/job/tf-m-build-config/341935/ RSE_TC4_GCC_1_RegS_RegNS_Debug_BL2_RSE_PROVISIONING_SYMMETRIC https://ci.trustedfirmware.org/job/tf-m-build-config/341940/ RSE_TC4_GCC_1_RegS_RegNS_Release_BL2_CM_DM_BL2_ECDSA_SIGNING https://ci.trustedfirmware.org/job/tf-m-build-config/341944/ RSE_TC4_GCC_3_RegS_RegNS_Release_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/341954/ MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/341956/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341957/ AN521_GCC_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/341958/ MUSCA_B1_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/341959/ AN521_GCC_1_RegFihLow_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341961/ RSE_TC4_GCC_1_RegBL1_1_Debug_BL2_RSE_RUN_BL1_1_TESTS_IN_PCI https://ci.trustedfirmware.org/job/tf-m-build-config/341962/ AN519_GCC_1_Release_BL2_SMALL_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/341963/ AN521_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341964/ psoc64_GCC_1_RegS_RegNS_Release https://ci.trustedfirmware.org/job/tf-m-build-config/341965/ RSE_TC4_GCC_3_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341966/ RSE_TC4_GCC_3_RegBL1_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341969/ RSE_TC4_GCC_3_RegBL1_1_Release_BL2_RSE_RUN_BL1_1_TESTS_IN_PCI https://ci.trustedfirmware.org/job/tf-m-build-config/341970/ RSE_TC4_GCC_1_RegS_RegNS_Debug_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/341972/ AN524_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341976/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/341977/ RSE_RDV3R1_GCC_3_RegS_Debug_BL2_NSOFF_CFG0 https://ci.trustedfirmware.org/job/tf-m-build-config/341978/ AN521_GCC_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/341979/ AN521_GCC_3_Minsizerel_BL2_LARGE_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/341982/ AN519_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341983/ AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341984/ CS300_FVP_GCC_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/341985/ corstone1000_GCC_1_RegS_Debug_BL2_NSOFF_CS1K_TEST_FVP https://ci.trustedfirmware.org/job/tf-m-build-config/341986/ AN521_ARMCLANG_1_RegFihLow_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342018/ AN519_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/342020/ RSE_TC4_GCC_3_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342021/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342022/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342026/ AN524_ARMCLANG_2_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342028/ MUSCA_B1_GCC_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342029/ AN519_ARMCLANG_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342030/ MUSCA_B1_ARMCLANG_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342031/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342032/ AN521_GCC_2_RegFihMedium_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342034/ AN521_ARMCLANG_3_RegFihHigh_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342035/ AN519_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/342036/ AN521_GCC_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342038/ AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_SMALL_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342039/ corstone1000_GCC_2_RegS_Debug_BL2_NSOFF_CS1K_TEST_FPGA https://ci.trustedfirmware.org/job/tf-m-build-config/342040/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/342041/ AN519_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342053/ AN524_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342054/ corstone1000_GCC_1_RegS_Debug_BL2_NSOFF_CS1K_TEST_FPGA https://ci.trustedfirmware.org/job/tf-m-build-config/342055/ AN521_GCC_2_RegFihHigh_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342067/ b_u585i_iot02a_ARMCLANG_1_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342069/ RSE_TC4_GCC_2_RegBL1_1_Debug_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/342072/ RSE_TC4_GCC_2_RegBL1_1_Debug_BL2_RSE_RUN_BL1_1_TESTS_IN_PCI https://ci.trustedfirmware.org/job/tf-m-build-config/342073/ AN521_GCC_3_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342074/ CS300_AN552_GCC_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342076/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342077/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/342078/ AN521_ARMCLANG_1_Minsizerel_BL2_SMALL_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342079/ AN521_ARMCLANG_2_RegFihLow_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342080/ AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342081/ AN521_GCC_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342101/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MMIO https://ci.trustedfirmware.org/job/tf-m-build-config/342102/ AN521_GCC_3_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342103/ corstone1000_GCC_1_RegS_Release_BL2_NSOFF_CS1K_TEST_FPGA https://ci.trustedfirmware.org/job/tf-m-build-config/342110/ AN524_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342111/ AN521_ARMCLANG_1_Debug_BL2_IPC https://ci.trustedfirmware.org/job/tf-m-build-config/342112/ RSE_TC4_GCC_1_Release_BL2_CONFIG_TFM_REUSE_COPY_AREA_FOR_SP_STACKS_RSE_XIP_OFF https://ci.trustedfirmware.org/job/tf-m-build-config/342145/ RSE_TC4_GCC_2_RegBL1_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342147/ MUSCA_B1_GCC_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342184/ stm32h573i_dk_ARMCLANG_1_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342219/ b_u585i_iot02a_GCC_1_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342221/ b_u585i_iot02a_GCC_2_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342228/ corstone1000_GCC_2_RegS_Release_BL2_NSOFF_CS1K_TEST_FPGA https://ci.trustedfirmware.org/job/tf-m-build-config/342246/ RSE_TC4_GCC_3_Debug_BL2_RSE_PROVISIONING_SYMMETRIC https://ci.trustedfirmware.org/job/tf-m-build-config/342260/ AN521_GCC_2_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342285/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342286/ AN521_ATFE_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342287/ MUSCA_B1_GCC_1_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342290/ AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2_NSCE https://ci.trustedfirmware.org/job/tf-m-build-config/342291/ AN521_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342292/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342293/ corstone310_ARMCLANG_1_Debug_BL2_PACBTI_STD https://ci.trustedfirmware.org/job/tf-m-build-config/342294/ corstone320_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342295/ AN521_ARMCLANG_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342296/ MUSCA_B1_ARMCLANG_2_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342297/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342301/ RSE_TC4_GCC_1_RegBL1_1_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342302/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC3XX_RUNTIME_ENABLED https://ci.trustedfirmware.org/job/tf-m-build-config/342303/ AN521_GCC_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/342304/ AN521_GCC_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342305/ AN521_GCC_2_RegFihLow_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342306/ AN521_ATFE_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342307/ AN521_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342311/ AN521_ARMCLANG_1_RegFihLow_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342312/ AN521_ARMCLANG_2_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342313/ RSE_TC4_GCC_1_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342314/ MUSCA_B1_ARMCLANG_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342315/ AN524_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342317/ AN521_ARMCLANG_1_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342318/ AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342330/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342332/ RSE_TC4_GCC_3_Debug_BL2_CM_DM_BL2_ECDSA_SIGNING https://ci.trustedfirmware.org/job/tf-m-build-config/342353/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/342354/ RSE_TC4_GCC_1_Debug_BL2_CONFIG_TFM_REUSE_COPY_AREA_FOR_SP_STACKS_RSE_XIP_OFF https://ci.trustedfirmware.org/job/tf-m-build-config/342355/ AN521_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342356/ AN519_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/342357/ AN521_ARMCLANG_2_RegFihMedium_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342358/ AN524_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342360/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/342361/ corstone315_ATFE_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342362/ AN519_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342363/ RSE_TC4_GCC_1_Release_BL2_RSE_PROVISIONING_SYMMETRIC https://ci.trustedfirmware.org/job/tf-m-build-config/342364/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/342365/ RSE_TC4_GCC_1_RegS_RegNS_Release_BL2_ATTESTATION_SCHEME_DPE https://ci.trustedfirmware.org/job/tf-m-build-config/342369/ MUSCA_B1_GCC_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/342380/ AN524_ARMCLANG_2_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342381/ b_u585i_iot02a_GCC_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342382/ RSE_TC4_GCC_2_RegBL1_1_Debug_BL2_RSE_PROVISIONING_SYMMETRIC https://ci.trustedfirmware.org/job/tf-m-build-config/342394/ RSE_TC4_GCC_1_RegBL1_1_Release_BL2_RSE_PROVISIONING_SYMMETRIC https://ci.trustedfirmware.org/job/tf-m-build-config/342429/ RSE_TC4_GCC_2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342433/ b_u585i_iot02a_ARMCLANG_2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/342451/ RSE_TC4_GCC_3_Release_BL2_CM_DM_BL2_ECDSA_SIGNING https://ci.trustedfirmware.org/job/tf-m-build-config/342460/
For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/224/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/224/
Failed Jobs: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2851626 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2851624 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2851625
For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/224/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
tf-m-ci-notifications@lists.trustedfirmware.org
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svc_openci_enginfra＠arm.com