Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/299/
Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890436 MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890437 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890438 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890439 MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890440 MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890441 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2890442 MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890443 MUSCA_B1_GCC_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890444 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890445 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890446 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890447 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2890448 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890449 MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890450 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890451 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890452 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890453 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890454 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890455 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2890456 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2890457 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890458 MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890459 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2890460 MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890461 MUSCA_B1_GCC_2_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890462 MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890463 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890464 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890465 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890466 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890467 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890468 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2890469 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890470 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890471 MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890472 MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890473 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890474 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890475 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890476 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2890477 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890478 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890479 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890480 MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890481 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890482 MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890483 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890484 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2890485 MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890486 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2890487 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890488 MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890489 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2890491 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890490 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890492 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890493 MUSCA_B1_ATFE_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890494 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2890495 MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890496 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890497 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890498 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890499 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890500 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890501 MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890502 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2890503 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890504 MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890505 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890506 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890507 MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2890508 MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2890509 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2890510 MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2890511
For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/299/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.