Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/294/
Failed Jobs: MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433639/ MUSCA_B1_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433674/ MUSCA_B1_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433712/ MUSCA_B1_ARMCLANG_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433748/ AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433760/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433850/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433891/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433892/ corstone315_GCC_1_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/434182/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/434186/ AN521_ARMCLANG_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434274/ AN521_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433661/ MUSCA_B1_ARMCLANG_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433675/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433680/ corstone315_GCC_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/433686/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433691/ AN521_ARMCLANG_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433696/ MUSCA_B1_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433709/ MUSCA_B1_GCC_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433711/ corstone320_GCC_1_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/433735/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/433737/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434312/ MUSCA_B1_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434333/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/433653/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433836/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433839/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433876/ MUSCA_B1_ARMCLANG_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434162/ MUSCA_B1_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434202/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434216/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434323/ MUSCA_B1_ARMCLANG_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434007/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434281/ MUSCA_B1_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434316/ AN521_ARMCLANG_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433967/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433665/ MUSCA_B1_ARMCLANG_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433861/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434075/ MUSCA_B1_GCC_2_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434247/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434314/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433626/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433650/ MUSCA_B1_ARMCLANG_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433663/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433717/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433718/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433736/ MUSCA_B1_ARMCLANG_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433740/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433756/ MUSCA_B1_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433758/ corstone315_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/433761/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433768/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433769/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433775/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433785/ MUSCA_B1_GCC_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433786/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433815/ AN521_ARMCLANG_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433816/ MUSCA_B1_ARMCLANG_2_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433819/ MUSCA_B1_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433847/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/433849/ MUSCA_B1_ARMCLANG_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433853/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433857/ MUSCA_B1_ARMCLANG_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433860/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/433862/ AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433873/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433889/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/433894/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/433899/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433904/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433905/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433906/ MUSCA_B1_GCC_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433917/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433919/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433972/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/433986/ AN521_GCC_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434013/ MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434028/ MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434029/ AN521_GCC_3_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434087/ MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434091/ MUSCA_B1_GCC_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434093/ MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434115/ MUSCA_B1_GCC_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434121/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434126/ MUSCA_B1_GCC_3_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434129/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434130/ MUSCA_B1_ARMCLANG_1_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434133/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434179/ MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434181/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434191/ MUSCA_B1_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434195/ corstone315_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/434197/ AN521_ARMCLANG_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434199/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434207/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/434226/ MUSCA_B1_GCC_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434256/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434292/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434331/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434345/ MUSCA_B1_GCC_2_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433787/ MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433789/ MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433809/ MUSCA_B1_ARMCLANG_1_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433820/ MUSCA_B1_GCC_3_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433828/ AN521_ARMCLANG_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433830/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433835/ AN521_GCC_1_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433874/ MUSCA_B1_ARMCLANG_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433926/ AN521_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433940/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433941/ MUSCA_B1_ARMCLANG_1_STORAGE_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433950/ MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/433952/ MUSCA_B1_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433955/ AN521_GCC_2_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433989/ MUSCA_B1_GCC_1_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/433993/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434005/ MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434014/ corstone320_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/434024/ MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434035/ MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/434045/ MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434049/ corstone320_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/434063/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://ci.trustedfirmware.org/job/tf-m-build-config/434071/ MUSCA_B1_GCC_2_FF_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434080/ MUSCA_B1_GCC_2_STORAGE_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434081/ AN521_GCC_1_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434114/ MUSCA_B1_ARMCLANG_2_ATTEST_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434138/ MUSCA_B1_GCC_3_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434139/ AN521_GCC_3_ATTEST_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434149/ MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434153/ MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434204/ MUSCA_B1_GCC_1_FF_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434215/ MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434221/ MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://ci.trustedfirmware.org/job/tf-m-build-config/434233/ MUSCA_B1_ARMCLANG_3_CRYPTO_Release_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434251/ corstone320_GCC_1_Release_BL2 https://ci.trustedfirmware.org/job/tf-m-build-config/434254/ MUSCA_B1_GCC_1_CRYPTO_Minsizerel_BL2_LARGE https://ci.trustedfirmware.org/job/tf-m-build-config/434255/ MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://ci.trustedfirmware.org/job/tf-m-build-config/434260/ MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://ci.trustedfirmware.org/job/tf-m-build-config/434269/
For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/294/artifact/build_results.c... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.