Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/303/
Failed Jobs: RSE_TC4_GCC_1_RegS_RegNS_Debug_BL2_ATTESTATION_SCHEME_DPE https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/3AKcHqlvxsCg62lZ... RSE_TC4_GCC_1_Release_BL2 https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/3AKcHzO9RW1xSaR6... MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2892898 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892899 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2892900 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892901 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2892902 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892903 MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892904 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2892905 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2892906 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2892907 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892908 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892909 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2892910 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892911 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892912 MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892913 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2892914 MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892915 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892916 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892917 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892918 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892919 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2892920 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892921 MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892922 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892923 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2892924 MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892925 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2892926 MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892927 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892928 MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892929 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2892930 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892931 MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892932 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892933 MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892934 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2892935 MUSCA_B1_ATFE_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2892936 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2892937 MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892938 MUSCA_B1_GCC_2_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892939 MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892940 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892941 MUSCA_B1_GCC_2_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892942 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892943 MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892944 MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892945 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892946 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892947 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892948 MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892949 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892950 MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892951 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892952 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892953 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892954 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2892955 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892956 MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892957 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2892958 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892959 MUSCA_B1_GCC_2_Release_BL2_MEDIUM_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892960 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892961 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892962 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2892963 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892964 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2892965 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_MULTI_SIG_SUPPORT https://tf.validation.linaro.org/scheduler/job/2892966 MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2892967 MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892968 MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892969 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892970 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2892971 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2892972 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2892973
For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/303/artifact/test_results.cs... IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.