- TF-M-ci-notifications - lists.trustedfirmware.org

Job tf-m-nightly test 1948 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1948/ Failed Jobs: MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2586058 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2586059 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2586060 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2586061 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2586062 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2586063 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2586064 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2586065 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2586066 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2586067 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2586068 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2586069 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2586070 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2586071 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2586072 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2586073 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2586074 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2586075 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2586077 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2586076 For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1948/artifact/test_results.c…

5 months, 2 weeks

1
0
0 0

Job tf-m-nightly test 1946 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1946/ Failed Jobs: lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM https://tf.validation.linaro.org/scheduler/job/2584564 For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1946/artifact/test_results.c…

5 months, 2 weeks

1
0
0 0

Job tf-m-nightly test 1945 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1945/ Failed Jobs: lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM https://tf.validation.linaro.org/scheduler/job/2583608 For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1945/artifact/test_results.c…

5 months, 2 weeks

1
0
0 0

Job tf-m-nightly build 1940 fail

by ci_notify＠trustedfirmware.org

5 months, 3 weeks

1
0
0 0

Job tf-m-nightly build 1939 fail

by ci_notify＠trustedfirmware.org

5 months, 3 weeks

1
0
0 0

Job tf-m-nightly test 1938 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1938/ Failed Jobs: stm32h573i_dk_ARMCLANG_1_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2579104 For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1938/artifact/test_results.c…

5 months, 3 weeks

1
0
0 0

Job tf-m-nightly build 1930 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1930/ Failed Jobs: psoc64_ARMCLANG_2_RegS_RegNS_Release http://ci.trustedfirmware.org/job/tf-m-build-config/1698222/ psoc64_ARMCLANG_1_RegS_RegNS_Release http://ci.trustedfirmware.org/job/tf-m-build-config/1697874/ For detailed build results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1930/artifact/build_results.…

5 months, 4 weeks

1
0
0 0

Job tf-m-nightly build 1929 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1929/ Failed Jobs: psoc64_ARMCLANG_2_RegS_RegNS_Release http://ci.trustedfirmware.org/job/tf-m-build-config/1696515/ psoc64_ARMCLANG_1_RegS_RegNS_Release http://ci.trustedfirmware.org/job/tf-m-build-config/1696279/ For detailed build results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1929/artifact/build_results.…

6 months

1
0
0 0

Job tf-m-nightly test 1927 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1927/ Failed Jobs: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2572102 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2572103 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2572104 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2572105 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2572106 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2572107 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2572108 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2572109 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2572110 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2572111 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2572112 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2572113 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2572114 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2572115 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2572116 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2572117 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2572118 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2572119 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2572120 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2572121 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2572122 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2572123 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2572124 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2572125 MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2572126 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2572127 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2572128 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA https://tf.validation.linaro.org/scheduler/job/2572129 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2572130 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2572131 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2572132 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC https://tf.validation.linaro.org/scheduler/job/2572133 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2572134 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2572135 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2 https://tf.validation.linaro.org/scheduler/job/2572136 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2572137 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2572138 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2572139 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2572140 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2 https://tf.validation.linaro.org/scheduler/job/2572141 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM https://tf.validation.linaro.org/scheduler/job/2572142 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF https://tf.validation.linaro.org/scheduler/job/2572143 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF https://tf.validation.linaro.org/scheduler/job/2572144 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2 https://tf.validation.linaro.org/scheduler/job/2572145 MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS https://tf.validation.linaro.org/scheduler/job/2572146 For detailed test results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1927/artifact/test_results.c…

6 months

1
0
0 0

Job tf-m-nightly build 1927 fail

by ci_notify＠trustedfirmware.org

Check console output at http://ci.trustedfirmware.org/job/tf-m-nightly/1927/ Failed Jobs: psoc64_ARMCLANG_1_RegS_RegNS_Release http://ci.trustedfirmware.org/job/tf-m-build-config/1694820/ psoc64_ARMCLANG_2_RegS_RegNS_Release http://ci.trustedfirmware.org/job/tf-m-build-config/1694705/ For detailed build results please refer to http://ci.trustedfirmware.org/job/tf-m-nightly/1927/artifact/build_results.…

6 months

1
0
0 0

2025

2024

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2020

TF-M-ci-notifications