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tf-m-ci-notifications@lists.trustedfirmware.org
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Job tf-m-nightly build 1695 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1695/
Failed Jobs: MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449984/
MUSCA_S1_GCC_2_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450222/
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450394/
MUSCA_S1_ARMCLANG_2_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450443/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450584/
MUSCA_S1_GCC_1_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450464/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450081/
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450235/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450120/
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450556/
MUSCA_S1_GCC_1_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450092/
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450349/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450298/
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450310/
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450558/
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450049/
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450378/
MUSCA_S1_GCC_2_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450083/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450085/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450109/
MUSCA_S1_GCC_2_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450186/
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450244/
MUSCA_S1_ARMCLANG_1_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450261/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450278/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450396/
MUSCA_S1_ARMCLANG_1_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450403/
AN521_GCC_2_FF_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450444/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450088/
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450131/
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450255/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450302/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450350/
MUSCA_S1_GCC_2_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450413/
MUSCA_S1_ARMCLANG_1_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450571/
MUSCA_S1_GCC_1_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450017/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450182/
MUSCA_S1_ARMCLANG_2_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450520/
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450496/
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450012/
MUSCA_S1_ARMCLANG_2_FF_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450038/
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450200/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450482/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450574/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450583/
psoc64_ARMCLANG_2_RegS_RegNS_Release
http://ci.trustedfirmware.org/job/tf-m-build-config/1449985/
MUSCA_S1_ARMCLANG_2_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450123/
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450221/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450352/
MUSCA_S1_ARMCLANG_1_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450393/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450546/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450098/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450106/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450155/
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450494/
MUSCA_S1_ARMCLANG_2_FF_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450543/
MUSCA_S1_GCC_1_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450423/
AN521_ARMCLANG_2_FF_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450068/
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450159/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450199/
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450145/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450511/
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1450271/
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450194/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450360/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450297/
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450356/
MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450102/
MUSCA_B1_ARMCLANG_2_FF_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450359/
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450446/
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450535/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450544/
MUSCA_S1_GCC_2_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450173/
MUSCA_S1_ARMCLANG_2_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450436/
MUSCA_S1_ARMCLANG_1_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450069/
MUSCA_S1_ARMCLANG_2_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450329/
AN521_ARMCLANG_2_FF_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450124/
AN521_ARMCLANG_2_FF_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450334/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1450523/
MUSCA_S1_GCC_2_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450170/
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450345/
MUSCA_S1_ARMCLANG_1_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450254/
MUSCA_S1_ARMCLANG_2_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450498/
MUSCA_S1_GCC_1_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450508/
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1450067/
MUSCA_S1_GCC_1_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1450311/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1695/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly build 1694 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1694/
Failed Jobs: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1448854/
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449291/
MUSCA_S1_ARMCLANG_2_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448922/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449380/
MUSCA_S1_GCC_1_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449130/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1449159/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449194/
MUSCA_S1_ARMCLANG_2_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448923/
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448840/
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1448866/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449032/
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449255/
MUSCA_S1_GCC_1_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449028/
MUSCA_S1_ARMCLANG_1_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449075/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449145/
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1449276/
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1448850/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449284/
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449409/
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1448827/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448825/
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449173/
MUSCA_S1_ARMCLANG_2_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449185/
MUSCA_S1_GCC_2_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449204/
MUSCA_S1_GCC_1_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449267/
MUSCA_S1_GCC_1_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449355/
MUSCA_S1_ARMCLANG_1_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449134/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1449274/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448873/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1448949/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448975/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1448987/
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449225/
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449296/
MUSCA_S1_ARMCLANG_1_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449337/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449341/
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1449251/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449038/
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1448932/
lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449017/
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449203/
MUSCA_S1_ARMCLANG_2_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449261/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1448859/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1448868/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448897/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448916/
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449085/
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449181/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449241/
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449338/
MUSCA_S1_GCC_1_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449072/
MUSCA_S1_GCC_2_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448858/
MUSCA_S1_GCC_2_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448911/
MUSCA_S1_ARMCLANG_1_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449174/
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1449219/
MUSCA_S1_GCC_1_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448889/
MUSCA_S1_ARMCLANG_2_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448919/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1448956/
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449033/
MUSCA_S1_ARMCLANG_2_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449051/
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449186/
MUSCA_S1_GCC_2_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449198/
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449384/
lpcxpresso55s69_GCC_2_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449416/
MUSCA_S1_GCC_2_CRYPTO_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1449419/
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449056/
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449386/
MUSCA_S1_ARMCLANG_1_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448843/
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449022/
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1449200/
MUSCA_S1_GCC_2_ATTEST_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448826/
MUSCA_S1_ARMCLANG_1_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1448954/
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1449116/
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1449167/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1694/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly test 1693 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1693/
Failed Jobs: AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_SMALL_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406951
AN521_GCC_3_CRYPTO_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406837
AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2406884
AN521_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406868
AN521_ARMCLANG_3_CRYPTO_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406894
AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406944
AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_SMALL_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406862
AN521_GCC_3_ATTEST_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406955
AN521_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406949
AN521_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406927
AN521_GCC_1_STORAGE_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406899
AN521_GCC_3_CRYPTO_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406831
AN521_ARMCLANG_3_Debug_BL2_LARGE_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406882
AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON
https://tf.validation.linaro.org/scheduler/job/2406809
AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF
https://tf.validation.linaro.org/scheduler/job/2406845
AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON
https://tf.validation.linaro.org/scheduler/job/2406842
AN521_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406871
AN521_GCC_3_STORAGE_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406825
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406947
AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE
https://tf.validation.linaro.org/scheduler/job/2406846
AN521_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406906
AN521_GCC_2_ATTEST_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406836
AN521_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2406808
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406953
AN521_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406889
AN521_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2406926
AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406961
AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPOFF
https://tf.validation.linaro.org/scheduler/job/2406840
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MMIO
https://tf.validation.linaro.org/scheduler/job/2406843
AN521_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406892
AN521_ARMCLANG_3_STORAGE_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406870
AN521_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406875
AN521_GCC_3_RegBL2_RegS_RegNS_Release_BL2_LARGE_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406960
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406848
AN521_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406832
AN521_GCC_2_STORAGE_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406896
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406946
AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF
https://tf.validation.linaro.org/scheduler/job/2406965
AN521_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406885
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_SMALL_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406907
AN521_ARMCLANG_3_STORAGE_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406939
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406900
AN521_GCC_1_ATTEST_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406827
AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPOFF
https://tf.validation.linaro.org/scheduler/job/2406819
AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406922
AN521_GCC_3_STORAGE_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406816
AN521_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2406849
AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406866
AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MMIO
https://tf.validation.linaro.org/scheduler/job/2406856
AN521_GCC_1_CRYPTO_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406954
AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406895
AN521_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406943
AN521_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406916
AN521_GCC_3_Minsizerel_BL2_LARGE_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406941
AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406834
AN521_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406851
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MMIO
https://tf.validation.linaro.org/scheduler/job/2406883
AN521_GCC_2_STORAGE_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406823
AN521_ARMCLANG_3_CRYPTO_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406844
AN521_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406898
AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406928
AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406962
AN521_ARMCLANG_2_STORAGE_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406847
AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2406835
AN521_ARMCLANG_1_ATTEST_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406936
AN521_GCC_3_ATTEST_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406838
AN521_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406813
AN521_GCC_1_CRYPTO_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406929
AN521_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2406969
AN521_ARMCLANG_1_STORAGE_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406817
AN521_GCC_3_CRYPTO_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406897
AN521_GCC_3_Debug_BL2_LARGE_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406957
AN521_GCC_2_CRYPTO_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406864
AN521_ARMCLANG_2_STORAGE_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406890
AN521_ARMCLANG_2_CRYPTO_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406925
AN521_GCC_1_Minsizerel_BL2_SMALL_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406878
AN521_GCC_1_ATTEST_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406841
AN521_ARMCLANG_3_Minsizerel_BL2_LARGE
https://tf.validation.linaro.org/scheduler/job/2406959
AN521_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406958
AN521_ARMCLANG_1_CRYPTO_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406874
AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2_LARGE
https://tf.validation.linaro.org/scheduler/job/2406830
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MMIO
https://tf.validation.linaro.org/scheduler/job/2406902
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2406963
AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MMIO
https://tf.validation.linaro.org/scheduler/job/2406901
AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406942
AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406861
AN521_GCC_2_ATTEST_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406872
AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF
https://tf.validation.linaro.org/scheduler/job/2406881
AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406905
AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2_NSCE
https://tf.validation.linaro.org/scheduler/job/2406859
AN521_ARMCLANG_2_ATTEST_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406948
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_NSCE
https://tf.validation.linaro.org/scheduler/job/2406945
AN521_ARMCLANG_2_ATTEST_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406956
AN521_GCC_3_Minsizerel_BL2_LARGE
https://tf.validation.linaro.org/scheduler/job/2406873
AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406880
AN521_GCC_1_ATTEST_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2406863
AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2406887
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_SMALL_PSOFF
https://tf.validation.linaro.org/scheduler/job/2406932
AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2406828
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1693/artifact/test_results.c…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly build 1693 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1693/
Failed Jobs: lpcxpresso55s69_GCC_2_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1447416/
MUSCA_S1_ARMCLANG_1_CRYPTO_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1447270/
MUSCA_S1_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1447335/
AN521_ARMCLANG_1_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1447389/
lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1447354/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1693/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly test 1692 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1692/
Failed Jobs: AN521_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2405657
AN521_GCC_3_RegBL2_RegS_RegNS_Release_BL2_LARGE
https://tf.validation.linaro.org/scheduler/job/2405656
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1692/artifact/test_results.c…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly build 1692 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1692/
Failed Jobs: lpcxpresso55s69_GCC_2_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1446056/
lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1446374/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1692/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly test 1691 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1691/
Failed Jobs: AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd4UoeBi9QlmF…
AN521_GCC_1_Release_BL2_IPC
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escs0Zb94sM7Eo…
AN521_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escW4tJO5beHSC…
AN521_GCC_1_Minsizerel_BL2_SMALL_PSOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esczFmpYCb29DM…
AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escpg6rOK5d2WW…
AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escn3DNhnl2mD9…
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_SMALL_PSOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd0q9IFiPEbZ0…
AN521_GCC_2_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd1rgEwDx7GlV…
AN521_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd3L7KdJx9o79…
AN521_ARMCLANG_1_ATTEST_Debug_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd21me6EsCsG5…
AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd7x3JFOaxoI0…
AN521_GCC_3_Debug_BL2_LARGE
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esd2Kg4iq8r4HI…
AN521_ARMCLANG_3_STORAGE_Release_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esclbJZYZYqfy0…
AN521_GCC_2_CRYPTO_Debug_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escY2PeDkywqvo…
AN521_GCC_2_CRYPTO_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escnavrPu4IiXh…
AN521_ARMCLANG_1_ATTEST_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esdBEj4dk3MrmM…
AN521_ARMCLANG_1_Debug_BL2_IPC
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escczzqJiksMxk…
AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_NSCE
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escsYIZD0LFyl9…
AN521_ARMCLANG_1_ATTEST_Release_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escr3Adl4ExBNb…
AN521_GCC_1_CRYPTO_Debug_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escekbi1lc8MJu…
AN521_ARMCLANG_2_ATTEST_Debug_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escvM4GoIzFO3d…
AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escZTXw4hRus9T…
AN521_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
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AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE_PSOFF
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AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE
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AN521_ARMCLANG_2_STORAGE_Debug_BL2
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AN521_GCC_3_Minsizerel_BL2
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AN521_GCC_2_STORAGE_Minsizerel_BL2
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2_LARGE
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF
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AN521_GCC_3_Release_BL2_LARGE
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN521_GCC_2_ATTEST_Release_BL2
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AN521_ARMCLANG_1_Release_BL2_IPC
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2
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AN521_ARMCLANG_2_Minsizerel_BL2
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AN521_ARMCLANG_2_STORAGE_Release_BL2
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AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPOFF
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AN521_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2_LARGE_PSOFF
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AN521_GCC_1_Minsizerel_BL2
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AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
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AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON
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AN521_GCC_3_RegBL2_RegS_RegNS_Release_BL2_LARGE
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2_LARGE_PSOFF
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AN521_ARMCLANG_3_Minsizerel_BL2_LARGE
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AN521_GCC_3_Minsizerel_BL2_LARGE
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AN521_GCC_2_Minsizerel_BL2_MEDIUM
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AN521_ARMCLANG_2_Release_BL2
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AN521_GCC_2_CRYPTO_Release_BL2
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AN521_GCC_3_ATTEST_Release_BL2
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MMIO
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AN521_ARMCLANG_3_STORAGE_Minsizerel_BL2
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AN521_GCC_2_Release_BL2
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AN521_GCC_3_ATTEST_Debug_BL2
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AN521_GCC_1_Minsizerel_BL2_IPC
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AN521_GCC_3_Release_BL2_LARGE_PSOFF
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AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2_NSCE
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MMIO
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AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON
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AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2
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AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
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AN521_GCC_3_RegBL2_RegS_RegNS_Release_BL2
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AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_SMALL_PSOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MMIO
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_NSCE
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
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AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
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AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON
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AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
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AN521_GCC_3_RegBL2_RegS_RegNS_Release_BL2_LARGE_PSOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_SMALL_PSOFF
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AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
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AN521_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2_LARGE
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AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
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AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MMIO
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AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MMIO
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2_LARGE
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
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AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPOFF
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2_LARGE_PSOFF
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_SMALL_PSOFF
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MMIO
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AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
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AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2
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AN521_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
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AN521_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2
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AN521_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_NSCE
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
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AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE_PSOFF
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AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE
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AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_NSCE
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AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_SMALL_PSOFF
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AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF
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AN521_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_SMALL_PSOFF
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AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2_NSCE
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AN521_ARMCLANG_3_Debug_BL2_LARGE_PSOFF
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AN521_ARMCLANG_2_CRYPTO_Minsizerel_BL2
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AN521_GCC_1_STORAGE_Release_BL2
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AN521_ARMCLANG_3_CRYPTO_Release_BL2
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AN521_GCC_1_STORAGE_Debug_BL2
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AN521_GCC_2_Release_BL2_MEDIUM
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AN521_GCC_2_Debug_BL2_MEDIUM_PSOFF
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AN521_GCC_2_Debug_BL2_MEDIUM
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AN521_ARMCLANG_3_Release_BL2
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AN521_ARMCLANG_3_ATTEST_Debug_BL2
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AN521_GCC_1_Release_BL2_SMALL_PSOFF
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AN521_ARMCLANG_1_CRYPTO_Debug_BL2
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AN521_GCC_3_CRYPTO_Release_BL2
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AN521_ARMCLANG_2_Minsizerel_BL2_MEDIUM
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AN521_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
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AN521_GCC_3_ATTEST_Minsizerel_BL2
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AN521_GCC_1_CRYPTO_Minsizerel_BL2
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AN521_GCC_1_Debug_BL2
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AN521_ARMCLANG_3_Minsizerel_BL2
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AN521_ARMCLANG_3_CRYPTO_Debug_BL2
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AN521_ARMCLANG_2_Debug_BL2_MEDIUM
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AN521_GCC_1_Debug_BL2_IPC
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AN521_GCC_3_CRYPTO_Minsizerel_BL2
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AN521_ARMCLANG_3_CRYPTO_Minsizerel_BL2
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AN521_ARMCLANG_2_ATTEST_Release_BL2
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AN521_GCC_3_Debug_BL2_LARGE_PSOFF
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AN521_ARMCLANG_2_CRYPTO_Release_BL2
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AN521_ARMCLANG_1_STORAGE_Minsizerel_BL2
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AN521_GCC_1_ATTEST_Release_BL2
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AN521_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
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AN521_ARMCLANG_1_Debug_BL2
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AN521_GCC_3_Release_BL2
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AN521_GCC_1_ATTEST_Debug_BL2
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AN521_GCC_1_CRYPTO_Release_BL2
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AN521_GCC_1_Debug_BL2_SMALL_PSOFF
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AN521_ARMCLANG_3_STORAGE_Debug_BL2
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AN521_GCC_2_Debug_BL2
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AN519_GCC_2_Minsizerel_BL2_MEDIUM
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AN519_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
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AN519_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
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AN519_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
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AN521_GCC_1_FF_Debug_BL2
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AN519_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
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AN519_ARMCLANG_2_Release_BL2_MEDIUM
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AN521_ARMCLANG_2_FF_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escfvdoXEVxhji…
AN519_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escgGPW8LhFcCE…
AN519_GCC_1_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escgP0Mnn3Dy08…
AN519_ARMCLANG_1_Minsizerel_BL2_SMALL_PSOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esch92VMCoG1qD…
AN519_GCC_1_RegBL2_RegS_RegNS_Release_BL2_SMALL_PSOFF
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esciUJwHtcfawF…
AN519_GCC_2_Debug_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2escjT4fPzwUxaC…
AN519_GCC_1_Minsizerel_BL2_IPC
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esckG3bOQr0Sfg…
AN519_GCC_2_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esckTyzWMVGhGX…
AN519_GCC_1_Release_BL2_IPC
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esckqQh3JvSa9r…
AN519_ARMCLANG_2_Minsizerel_BL2
https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/2esckvKsmprEMn8…
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1691/artifact/test_results.c…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly build 1691 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1691/
Failed Jobs: lpcxpresso55s69_GCC_2_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1445067/
lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1444730/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1691/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly build 1690 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1690/
Failed Jobs: lpcxpresso55s69_GCC_2_RegS_RegNS_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1442743/
lpcxpresso55s69_GCC_2_Relwithdebinfo_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1442760/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1690/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
Job tf-m-nightly build 1688 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1688/
Failed Jobs: MUSCA_B1_ARMCLANG_2_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1440676/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1688/artifact/build_results.…
8 months, 2 weeks
1
0
0
0
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