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tf-m-ci-notifications@lists.trustedfirmware.org
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Job tf-m-nightly build 1779 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1779/
Failed Jobs: corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1539110/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1539204/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1779/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1778 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1778/
Failed Jobs: MUSCA_B1_ARMCLANG_2_CRYPTO_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1538423/
corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1538318/
AN519_GCC_2_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1538299/
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
http://ci.trustedfirmware.org/job/tf-m-build-config/1537959/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1538249/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1778/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1777 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1777/
Failed Jobs: corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1537404/
AN521_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1537488/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1537183/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1777/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1776 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1776/
Failed Jobs: AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_SMALL_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1536407/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1536279/
corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1536683/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1776/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1775 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1775/
Failed Jobs: corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1534970/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1534986/
MUSCA_S1_ARMCLANG_2_STORAGE_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1534979/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1775/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1774 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1774/
Failed Jobs: corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1532732/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1532743/
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1533028/
AN519_ARMCLANG_1_Minsizerel_BL2_SMALL_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1532960/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1774/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1773 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1773/
Failed Jobs: corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1532009/
CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1532148/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1532314/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1773/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1772 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1772/
Failed Jobs: corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1530169/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1530066/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1772/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1771 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1771/
Failed Jobs: corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1528564/
corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1528579/
AN521_GCC_3_Minsizerel_BL2_LARGE_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1528546/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1771/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1770 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1770/
Failed Jobs: AN519_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1528287/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1528224/
AN519_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1527938/
corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1528018/
AN521_ARMCLANG_3_RegBL2_RegS_RegNS_Debug_BL2_LARGE_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1528045/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1770/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1769 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1769/
Failed Jobs: corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1527593/
corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1527615/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1769/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly build 1768 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1768/
Failed Jobs: CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON
http://ci.trustedfirmware.org/job/tf-m-build-config/1526046/
CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1526008/
corstone315_ARMCLANG_1_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1526090/
corstone315_ARMCLANG_1_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1526518/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1768/artifact/build_results.…
1 year
1
0
0
0
Job tf-m-nightly test 1767 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1767/
Failed Jobs: MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2468106
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2468107
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468108
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2468109
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2468110
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2468111
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2468112
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468113
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2468114
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2468115
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468116
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468117
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2468118
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2468119
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2468120
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468121
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468122
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468123
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2468124
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2468125
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2468126
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2468127
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2468128
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2468129
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468130
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2468131
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2468132
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2468133
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2468134
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468135
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468136
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2468137
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2468138
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2468139
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2468140
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1767/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1767 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1767/
Failed Jobs: AN521_GCC_2_Release_BL2_MEDIUM
http://ci.trustedfirmware.org/job/tf-m-build-config/1524177/
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1524096/
AN521_GCC_3_Debug_BL2_LARGE
http://ci.trustedfirmware.org/job/tf-m-build-config/1524211/
MUSCA_B1_ARMCLANG_2_FF_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1523776/
AN521_GCC_3_STORAGE_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1523733/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1767/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1766 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1766/
Failed Jobs: MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2467196
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2467197
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2467198
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2467199
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2467200
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467201
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467202
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2467203
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2467205
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2467206
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2467207
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2467208
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2467209
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467210
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2467211
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467212
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2467213
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2467214
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467215
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2467216
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2467217
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2467218
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2467219
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2467220
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2467221
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2467222
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2467223
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2467224
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2467225
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2467226
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467227
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2467228
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1766/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1766 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1766/
Failed Jobs: MUSCA_B1_ARMCLANG_3_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1522761/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1766/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1765 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1765/
Failed Jobs: MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2466265
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2466266
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2466267
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2466268
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2466269
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2466270
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2466271
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2466272
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2466273
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2466274
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2466275
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2466276
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2466280
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2466277
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2466278
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2466281
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2466282
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2466283
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2466284
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2466285
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2466286
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2466287
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2466288
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2466289
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2466290
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2466291
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2466292
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2466293
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2466294
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2466295
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2466296
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2466297
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1765/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1765 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1765/
Failed Jobs: AN521_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1521345/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1765/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1764 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1764/
Failed Jobs: stm32h573i_dk_GCC_2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465539
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2465495
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465496
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2465497
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465498
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2465499
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465500
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2465501
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465502
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465503
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465504
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465505
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2465506
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465507
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2465508
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2465509
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465510
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465511
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2465512
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465513
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2465514
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2465515
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465516
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465517
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465518
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465519
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2465520
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465521
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2465522
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2465523
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2465524
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465525
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465526
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465527
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465528
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465529
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465530
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465531
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465532
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465533
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2465534
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2465535
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465536
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2465537
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465538
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465540
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2465541
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2465542
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2465543
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1764/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1763 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1763/
Failed Jobs: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464944
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464945
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464946
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464947
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464948
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464949
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464950
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464951
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464952
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464953
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464954
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464955
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464957
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464958
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464959
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464956
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464960
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464961
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464962
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464963
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464964
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464965
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464966
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464967
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464968
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464969
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464970
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464971
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464972
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464973
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464974
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464975
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464976
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464977
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464978
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464979
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464980
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464981
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464982
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464983
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464984
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464985
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464986
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464987
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464988
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464989
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464990
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464991
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1763/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1762 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1762/
Failed Jobs: MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464399
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464400
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464401
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464402
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464403
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464404
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464405
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464406
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464407
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464408
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464409
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464410
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464411
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464412
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464413
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464414
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464415
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464416
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464417
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464418
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464419
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464420
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464421
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464422
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464423
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464424
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464425
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464426
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464427
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464428
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464429
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464430
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464431
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2464432
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464433
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464435
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464436
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464437
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2464438
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464439
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464440
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464441
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2464442
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2464443
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2464444
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464445
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2464446
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2464447
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1762/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1762 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1762/
Failed Jobs: MUSCA_S1_ARMCLANG_2_FF_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1518913/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1762/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1761 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1761/
Failed Jobs: MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2463699
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2463700
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2463701
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2463702
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1761/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1760 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/
Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2462333
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462334
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462336
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462337
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462338
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462339
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462340
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462341
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2462342
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2462343
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462344
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462345
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462346
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462347
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2462348
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462349
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2462350
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462351
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2462352
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2462353
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462354
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462355
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2462356
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462357
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462358
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2462359
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2462360
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462361
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462362
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2462363
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2462364
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2462365
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1760 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/
Failed Jobs: AN521_ARMCLANG_3_STORAGE_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1517725/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1760/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1759 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/
Failed Jobs: MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461400
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461403
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461401
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461402
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461404
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461405
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461406
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461407
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461408
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461409
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2461410
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461411
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461412
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461413
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461414
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461415
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461416
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461417
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461419
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461418
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461420
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461421
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461422
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461423
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461424
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461425
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461426
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461427
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461428
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461429
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461430
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461431
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461432
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461433
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2461434
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461435
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2461436
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2461437
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461439
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461438
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461440
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461441
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461442
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461443
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2461444
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2461445
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2461446
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2461447
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1759 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/
Failed Jobs: AN521_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1516440/
AN521_GCC_2_FF_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1516407/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1759/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1758 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/
Failed Jobs: MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460562
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460563
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460564
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460565
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460566
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460567
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460568
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460569
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460570
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460571
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460572
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460573
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460574
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460575
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460576
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460577
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460578
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460579
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460580
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460581
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460582
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460583
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460584
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460585
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460586
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460587
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460588
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460589
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460590
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2460591
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460592
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460593
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460594
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460595
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460596
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460597
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460598
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2460599
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2460600
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460601
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460602
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2460603
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2460604
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2460605
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460606
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460607
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2460608
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2460609
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1758 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/
Failed Jobs: MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
http://ci.trustedfirmware.org/job/tf-m-build-config/1515551/
AN521_ARMCLANG_3_STORAGE_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1515354/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1758/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1757 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/
Failed Jobs: MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459927
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459928
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459929
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459930
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459931
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459932
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459933
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459934
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459935
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459936
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459937
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459938
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459939
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459940
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459941
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459942
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459943
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459944
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459945
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459946
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459947
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459948
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459949
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459950
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459951
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459952
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459953
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459954
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459955
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459956
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459957
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459958
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459959
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459960
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2459961
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459962
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459963
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459964
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459965
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459966
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459967
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459968
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459969
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459970
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459971
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459972
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459973
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1757 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/
Failed Jobs: AN519_GCC_1_RegBL2_RegS_RegNS_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1514681/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1757/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1756 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1756/
Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458994
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458995
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458996
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458997
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458998
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458999
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459000
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459001
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459002
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459003
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459004
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459005
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459006
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459007
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459008
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459009
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459010
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459011
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459013
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459012
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459014
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459015
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459016
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459017
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459018
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459019
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459020
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459021
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459022
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459023
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2459024
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459025
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2459026
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459027
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459028
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459029
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2459030
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459031
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459032
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459033
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459034
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459035
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459036
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2459037
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459038
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2459039
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2459040
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2459041
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1756/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1756 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1756/
Failed Jobs: AN519_GCC_2_Debug_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1513771/
MUSCA_S1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
http://ci.trustedfirmware.org/job/tf-m-build-config/1513628/
MUSCA_B1_GCC_3_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1513567/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1756/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1755 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1755/
Failed Jobs: MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458427
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458428
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458429
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458430
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2458431
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458432
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458433
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458434
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458435
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458436
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458437
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458438
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458439
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2458440
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458441
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458442
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458443
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2458444
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458445
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458446
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2458447
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458448
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458449
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458450
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458451
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2458452
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458453
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458454
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458455
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458456
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458457
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458458
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2458459
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2458460
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2458461
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458462
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2458463
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458464
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458465
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458466
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458467
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458468
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458469
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2458470
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458471
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2458472
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2458473
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1755/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1755 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1755/
Failed Jobs: MUSCA_B1_ARMCLANG_1_ATTEST_Debug_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1512676/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1755/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1754 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1754/
Failed Jobs: MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457881
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457882
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457883
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457884
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457885
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457886
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457887
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457888
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457889
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457890
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457891
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457892
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457893
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457894
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457895
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457896
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457897
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457898
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457899
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457900
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457901
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457902
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457903
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457904
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457905
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457906
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457907
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457908
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457909
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457910
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457911
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457912
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457913
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457914
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457915
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457916
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457919
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457917
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457918
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457920
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457921
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457922
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457923
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457924
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457925
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457926
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457927
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457928
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1754/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1753 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1753/
Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457223
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457224
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457225
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457226
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457227
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457228
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457229
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457230
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457231
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457232
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457233
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457234
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457235
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457236
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457237
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457238
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457239
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457240
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457241
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457242
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457243
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457244
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457245
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457246
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457247
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457248
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457249
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457250
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457251
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457252
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457253
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457254
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457255
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2457256
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457257
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457258
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2457259
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2457260
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457261
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2457262
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457263
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457264
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457265
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2457266
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2457267
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457268
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2457269
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2457270
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1753/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1753 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1753/
Failed Jobs: AN521_ARMCLANG_3_ATTEST_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1510472/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1753/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1752 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1752/
Failed Jobs: MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456623
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456621
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456622
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456624
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456625
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456627
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456628
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456629
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456630
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456631
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456632
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456633
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456634
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456635
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456636
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456637
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456638
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456639
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456640
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456641
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456642
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456643
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456644
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456645
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456646
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456647
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456648
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456649
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456650
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456651
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456652
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456653
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456654
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456655
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456656
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456657
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456658
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456659
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456660
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456661
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456663
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456664
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456662
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456665
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456667
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456666
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456668
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456669
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1752/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1751 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1751/
Failed Jobs: MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456007
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456008
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456009
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456010
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456011
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456012
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456013
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456014
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456015
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456016
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456017
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456018
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456019
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456020
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456021
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456022
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456023
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456024
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456025
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456026
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456027
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456028
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456029
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456030
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456031
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456032
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456033
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456034
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456035
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456036
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456037
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2456038
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456039
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456040
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456041
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456042
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456043
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456044
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456045
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456046
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456048
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2456049
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2456047
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2456050
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456051
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2456052
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2456053
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2456054
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1751/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1751 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1751/
Failed Jobs: MUSCA_S1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
http://ci.trustedfirmware.org/job/tf-m-build-config/1509017/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1751/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1750 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1750/
Failed Jobs: stm32h573i_dk_GCC_1_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2455390
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2455368
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455369
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2455370
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455371
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455372
MUSCA_B1_GCC_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2455373
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455374
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2455375
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455376
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455377
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2455378
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455379
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2455380
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2455381
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2455382
MUSCA_B1_GCC_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455383
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455384
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2455385
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455386
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455387
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2455388
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455389
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455391
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455392
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2455393
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2455394
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455395
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455396
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2455397
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455398
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455399
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455400
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455401
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2455402
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2455403
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455404
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2455405
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2455406
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455407
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455408
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2455409
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC_DRIVER_PSA
https://tf.validation.linaro.org/scheduler/job/2455410
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455411
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2455412
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2455413
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2455414
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2455415
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2455416
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1750/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1750 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1750/
Failed Jobs: CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON
http://ci.trustedfirmware.org/job/tf-m-build-config/1508210/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1750/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1749 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1749/
Failed Jobs: MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454759
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454760
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454761
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454763
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454764
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454765
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454766
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454767
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454768
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454769
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454770
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454771
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454772
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454773
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454774
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454775
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454776
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454777
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454778
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454779
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454782
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454780
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454781
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454783
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454784
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454785
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454786
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454787
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454788
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454789
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454790
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454791
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454792
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454793
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454794
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454795
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454796
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454797
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454798
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454799
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454800
MUSCA_B1_GCC_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454801
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454802
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454803
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454804
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454805
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454806
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454807
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1749/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1749 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1749/
Failed Jobs: MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
http://ci.trustedfirmware.org/job/tf-m-build-config/1507082/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1749/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1748 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1748/
Failed Jobs: MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454145
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454146
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454147
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454148
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454149
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454150
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454151
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454152
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454153
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454154
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454155
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454156
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454157
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454158
MUSCA_B1_GCC_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454159
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454160
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454161
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454162
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454163
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454164
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454165
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454166
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454167
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454168
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454169
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454171
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454172
MUSCA_B1_ARMCLANG_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454173
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454174
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454175
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454176
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454177
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454178
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2454179
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454180
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454181
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454182
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2454183
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2454184
MUSCA_B1_GCC_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454185
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454186
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2454187
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2454188
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2454189
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454190
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454191
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454192
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2454193
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1748/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1748 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1748/
Failed Jobs: MUSCA_B1_GCC_1_FF_Minsizerel_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1506538/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1748/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1747 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1747/
Failed Jobs: MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453457
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2453458
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453459
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453460
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453461
MUSCA_B1_ARMCLANG_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2453462
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453463
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2453464
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2453465
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453466
MUSCA_B1_ARMCLANG_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453467
MUSCA_B1_ARMCLANG_2_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453468
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453469
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2453470
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453471
MUSCA_B1_ARMCLANG_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453472
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2453475
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2453476
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453473
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453474
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453477
MUSCA_B1_GCC_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453478
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2453479
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453480
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453481
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453482
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453483
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453484
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453485
MUSCA_B1_ARMCLANG_1_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2453486
MUSCA_B1_GCC_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453487
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2453488
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453489
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453490
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453491
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453492
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2453495
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453496
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453493
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2453494
MUSCA_B1_GCC_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2453499
MUSCA_B1_ARMCLANG_1_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453497
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2453498
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2453500
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2453502
MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453503
MUSCA_B1_GCC_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2453504
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2453501
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1747/artifact/test_results.c…
1 year, 1 month
1
0
0
0
Job tf-m-nightly build 1747 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1747/
Failed Jobs: CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON
http://ci.trustedfirmware.org/job/tf-m-build-config/1505560/
MUSCA_B1_GCC_2_Release_BL2
http://ci.trustedfirmware.org/job/tf-m-build-config/1505729/
AN521_GCC_3_Debug_BL2_LARGE
http://ci.trustedfirmware.org/job/tf-m-build-config/1505280/
For detailed build results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1747/artifact/build_results.…
1 year, 1 month
1
0
0
0
Job tf-m-nightly test 1746 fail
by ci_notify@trustedfirmware.org
Check console output at
http://ci.trustedfirmware.org/job/tf-m-nightly/1746/
Failed Jobs: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2452699
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2452700
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2452701
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452702
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2452703
MUSCA_B1_ARMCLANG_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452704
MUSCA_B1_GCC_3_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2452705
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2452706
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452707
MUSCA_B1_GCC_2_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452708
MUSCA_B1_ARMCLANG_2_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2452709
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452710
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2452711
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452712
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2452713
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452714
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2452715
MUSCA_B1_ARMCLANG_1_Minsizerel_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2452716
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452717
MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452718
MUSCA_B1_GCC_1_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452719
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452720
MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452721
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2452722
MUSCA_B1_GCC_3_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452723
MUSCA_B1_ARMCLANG_2_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452724
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452725
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452726
MUSCA_B1_GCC_1_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452727
MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2452728
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452729
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2452730
MUSCA_B1_ARMCLANG_1_Release_BL2_IPC
https://tf.validation.linaro.org/scheduler/job/2452731
MUSCA_B1_GCC_1_Release_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2452732
MUSCA_B1_GCC_3_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452733
MUSCA_B1_GCC_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452734
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2
https://tf.validation.linaro.org/scheduler/job/2452735
MUSCA_B1_GCC_2_Debug_BL2_MEDIUM
https://tf.validation.linaro.org/scheduler/job/2452736
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452737
MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Minsizerel_BL2_MEDIUM_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452738
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM-AROT-LESS_PSOFF
https://tf.validation.linaro.org/scheduler/job/2452739
MUSCA_B1_ARMCLANG_1_RegBL2_RegS_RegNS_Minsizerel_BL2
https://tf.validation.linaro.org/scheduler/job/2452740
MUSCA_B1_ARMCLANG_3_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452741
MUSCA_B1_ARMCLANG_1_Debug_BL2_MEDIUM-AROT-LESS
https://tf.validation.linaro.org/scheduler/job/2452742
MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452743
MUSCA_B1_ARMCLANG_1_Release_BL2
https://tf.validation.linaro.org/scheduler/job/2452744
For detailed test results please refer to
http://ci.trustedfirmware.org/job/tf-m-nightly/1746/artifact/test_results.c…
1 year, 1 month
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