- TF-M-ci-notifications - lists.trustedfirmware.org

by svc_openci_enginfra＠arm.com

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/370/ Failed Jobs: RSE_TC4_GCC_1_Debug_BL2_RSE_PROVISIONING_SYMMETRIC https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/3Ch53m3M79xv8t3… For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/370/artifact/test_results.c… IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

2 weeks, 3 days

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LAVA notification for Test Job 2931687 MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF_517796_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2931687 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2931687 Job error: wait-musca-path timed out after 712 seconds Device details: Hostname: musca-b-03 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_ARMCLANG_2_Debug_BL2_MEDIUM_PSOFF_517796_musca-b Submitted: 2026-04-20 00:09:29 (+0000 UTC) Started: 2026-04-20 02:07:08 (+0000 UTC) Finished: 2026-04-20 02:19:09 (+0000 UTC) Duration: 0:12:01 -- LAVA Linaro Automated Validation Architecture

2 weeks, 5 days

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Job tf-m-nightly test 366 fail

by svc_openci_enginfra＠arm.com

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/366/ Failed Jobs: RSE_TC4_GCC_3_Release_BL2_RSE_PROVISIONING_SYMMETRIC https://tuxapi.tuxsuite.com/v1/groups/tfc/projects/ci/tests/3CVlkfCPHYhxNaN… For detailed test results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/366/artifact/test_results.c… IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

2 weeks, 5 days

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Job tf-m-nightly build 362 fail

by svc_openci_enginfra＠arm.com

3 weeks, 2 days

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LAVA notification for Test Job 2926927 b_u585i_iot02a_ARMCLANG_1_RegS_RegNS_Release_BL2_509574_b-u585i-iot02a

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2926927 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2926927 Infrastructure error: Unable to reboot: '/usr/local/lab-scripts/stm32_tfm_flasher.sh -c reset -s 0032001E4D46501220383832' failed Device details: Hostname: b-u585i-iot02a-03 Type: b-u585i-iot02a Owner: None Worker: w1 Job details: Priority: Medium Description: b_u585i_iot02a_ARMCLANG_1_RegS_RegNS_Release_BL2_509574_b-u585i-iot02a Submitted: 2026-04-16 00:09:41 (+0000 UTC) Started: 2026-04-16 00:09:42 (+0000 UTC) Finished: 2026-04-16 00:10:10 (+0000 UTC) Duration: 0:00:28 -- LAVA Linaro Automated Validation Architecture

3 weeks, 2 days

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LAVA notification for Test Job 2926705 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF_509555_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2926705 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2926705 Infrastructure error: Flash failure indicated by presence of FAIL.TXT (Details: The hex file cannot be decoded. Checksum calculation failure occurred.) Device details: Hostname: musca-b-04 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF_509555_musca-b Submitted: 2026-04-15 23:47:56 (+0000 UTC) Started: 2026-04-15 23:53:52 (+0000 UTC) Finished: 2026-04-15 23:56:42 (+0000 UTC) Duration: 0:02:50 -- LAVA Linaro Automated Validation Architecture

3 weeks, 2 days

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0 0

Job tf-m-nightly build 351 fail

by svc_openci_enginfra＠arm.com

Check console output at https://ci.trustedfirmware.org/job/tf-m-nightly/351/ Failed Jobs: CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490568/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490515/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490652/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490659/ AN521_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490578/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490823/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490352/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490392/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490446/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490636/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490725/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/491050/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/491067/ AN521_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490484/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490671/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490957/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490959/ AN521_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490965/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490982/ CS300_FVP_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490921/ CS300_AN552_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490809/ CS300_FVP_GCC_2_RegBL2_RegS_RegNS_Release_BL2_FPON_LZOFF https://ci.trustedfirmware.org/job/tf-m-build-config/490814/ AN521_GCC_1_RegBL2_RegS_RegNS_Release_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490869/ CS300_AN552_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_FPON https://ci.trustedfirmware.org/job/tf-m-build-config/490852/ For detailed build results please refer to https://ci.trustedfirmware.org/job/tf-m-nightly/351/artifact/build_results.… IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.

3 weeks, 6 days

1
12
0 0

LAVA notification for Test Job 2922755 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_500726_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2922755 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2922755 Infrastructure error: Flash failure indicated by presence of FAIL.TXT (Details: The hex file cannot be decoded. Checksum calculation failure occurred.) Device details: Hostname: musca-b-04 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_500726_musca-b Submitted: 2026-04-09 23:48:51 (+0000 UTC) Started: 2026-04-10 01:21:23 (+0000 UTC) Finished: 2026-04-10 01:23:53 (+0000 UTC) Duration: 0:02:29 -- LAVA Linaro Automated Validation Architecture

4 weeks, 1 day

1
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0 0

LAVA notification for Test Job 2921105 stm32wba65i_dk_GCC_1_RegS_RegNS_Release_497637_stm32wba65i-dk1

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2921105 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2921105 Test error: lava-test-monitor timed out after 180 seconds Device details: Hostname: stm32wba65i-dk1-03 Type: stm32wba65i-dk1 Owner: None Worker: w2 Job details: Priority: Medium Description: stm32wba65i_dk_GCC_1_RegS_RegNS_Release_497637_stm32wba65i-dk1 Submitted: 2026-04-08 19:09:46 (+0000 UTC) Started: 2026-04-08 19:09:47 (+0000 UTC) Finished: 2026-04-08 19:13:08 (+0000 UTC) Duration: 0:03:20 -- LAVA Linaro Automated Validation Architecture

1 month

1
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LAVA notification for Test Job 2921099 stm32h573i_dk_ARMCLANG_1_RegS_RegNS_Release_BL2_498054_stm32h573i-dk

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2921099 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2921099 Test error: lava-test-monitor timed out after 180 seconds Device details: Hostname: stm32h573i-dk-02 Type: stm32h573i-dk Owner: None Worker: w2 Job details: Priority: Medium Description: stm32h573i_dk_ARMCLANG_1_RegS_RegNS_Release_BL2_498054_stm32h573i-dk Submitted: 2026-04-08 19:09:21 (+0000 UTC) Started: 2026-04-08 19:09:22 (+0000 UTC) Finished: 2026-04-08 19:12:54 (+0000 UTC) Duration: 0:03:31 -- LAVA Linaro Automated Validation Architecture

1 month

1
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0 0

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TF-M-ci-notifications