May 2026 - TF-M-ci-notifications - lists.trustedfirmware.org

LAVA notification for Test Job 2946999 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2_300_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946999 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946999 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/300//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-02 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Release_BL2_300_musca-b Submitted: 2026-05-05 11:42:19 (+0000 UTC) Started: 2026-05-05 12:02:49 (+0000 UTC) Finished: 2026-05-05 12:23:42 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946986 MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_36_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946986 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946986 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/36//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-04 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_36_musca-b Submitted: 2026-05-05 11:36:19 (+0000 UTC) Started: 2026-05-05 12:02:47 (+0000 UTC) Finished: 2026-05-05 12:23:40 (+0000 UTC) Duration: 0:20:53 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946984 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_81_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946984 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946984 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/81//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-03 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Debug_BL2_81_musca-b Submitted: 2026-05-05 11:36:14 (+0000 UTC) Started: 2026-05-05 11:50:54 (+0000 UTC) Finished: 2026-05-05 12:11:47 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946980 MUSCA_B1_ARMCLANG_3_Release_BL2_436_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946980 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946980 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/436//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-05 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_ARMCLANG_3_Release_BL2_436_musca-b Submitted: 2026-05-05 11:32:22 (+0000 UTC) Started: 2026-05-05 11:47:39 (+0000 UTC) Finished: 2026-05-05 12:08:31 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946979 MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2_471_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946979 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946979 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/471//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-02 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_3_RegBL2_RegS_RegNS_Minsizerel_BL2_471_musca-b Submitted: 2026-05-05 11:32:19 (+0000 UTC) Started: 2026-05-05 11:41:55 (+0000 UTC) Finished: 2026-05-05 12:02:48 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946978 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF_330_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946978 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946978 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/330//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-04 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_MEDIUM-AROT-LESS_PSOFF_330_musca-b Submitted: 2026-05-05 11:32:19 (+0000 UTC) Started: 2026-05-05 11:41:53 (+0000 UTC) Finished: 2026-05-05 12:02:46 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946974 MUSCA_B1_GCC_2_Minsizerel_BL2_197_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946974 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946974 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/197//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-03 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_2_Minsizerel_BL2_197_musca-b Submitted: 2026-05-05 11:29:58 (+0000 UTC) Started: 2026-05-05 11:30:00 (+0000 UTC) Finished: 2026-05-05 11:50:53 (+0000 UTC) Duration: 0:20:53 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946967 MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC3XX_RUNTIME_ENABLED_298_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946967 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946967 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/298//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-05 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_1_RegBL2_RegS_RegNS_Release_BL2_CC3XX_RUNTIME_ENABLED_298_musca-b Submitted: 2026-05-05 11:26:44 (+0000 UTC) Started: 2026-05-05 11:26:45 (+0000 UTC) Finished: 2026-05-05 11:47:38 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946933 MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_245_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946933 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946933 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/245//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-02 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_ARMCLANG_2_RegBL2_RegS_RegNS_Debug_BL2_MEDIUM_245_musca-b Submitted: 2026-05-05 11:09:13 (+0000 UTC) Started: 2026-05-05 11:21:01 (+0000 UTC) Finished: 2026-05-05 11:41:54 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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LAVA notification for Test Job 2946931 MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF_120_musca-b

by lava＠tf.validation.linaro.org

Hello, The job with ID # 2946931 is now in state Finished and health Incomplete. Job was submitted by ciadmin_arm. Job details and log file: http://tf.validation.linaro.org/scheduler/job/2946931 Job error: Invalid job data: ["'https://ci.dev.trustedfirmware.org/job/tf-m-build-config/120//artifact/ci_build/spe/bin/tfm.hex' timed out"] Device details: Hostname: musca-b-04 Type: musca-b Owner: None Worker: w1 Job details: Priority: Medium Description: MUSCA_B1_GCC_2_Minsizerel_BL2_MEDIUM_PSOFF_120_musca-b Submitted: 2026-05-05 11:08:58 (+0000 UTC) Started: 2026-05-05 11:21:00 (+0000 UTC) Finished: 2026-05-05 11:41:52 (+0000 UTC) Duration: 0:20:52 -- LAVA Linaro Automated Validation Architecture

2 weeks, 2 days

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TF-M-ci-notifications May 2026