Hi,
The Base Platform Fast Model from Arm provides a SMMUv3TestEngine component with a control region at 0x002bfe0000-0x002bffFFFF. This component is a traffic generator that acts as a (secure) device upstream of the SMMUv3. We developed the test in the tf-a-tests repo by leveraging this test engine after referring to some documentation in files internal to Arm. Unfortunately, I could not find any detailed upstream documentation for this module.
Software running at lower ELs such as S-EL1 can generate memory transactions on the bus, by writing to the control pages, to mimic workloads such as memcpy. Is there anything that you are looking for in particular with this testengine?
Thanks, Madhukar
-----Original Message----- From: Chenxu Wang via TF-A-Tests tf-a-tests@lists.trustedfirmware.org Sent: Friday, December 16, 2022 9:55 AM To: tf-a-tests@lists.trustedfirmware.org Subject: [Tf-a-tests] Any manuals for SMMUv3 Test Engine?
Hi All,
I find that in spm/cactus/cactus_tests/smmuv3_test_engine.h, the tf-a-tests clearly shows some MMIO interfaces for the SMMUv3 Test Engine. But, I need help finding a manual about these MMIO interfaces. For example, in this .h file, it says the offset of the start address is in 0x28 (BEGIN_OFF), but I cannot find which manual defines it. It refers to the "SMMUv3TestEngine - trace" Section on FVP manual, but I still cannot find the mapping in this section. Actually I don't know how to "understand" the trace Section.
I also try to dump the FVP model but I can not find it. It only has SMMU configurations, but not this engine.
Can someone help me?
Sincerely, WANG Chenxu -- TF-A-Tests mailing list -- tf-a-tests@lists.trustedfirmware.org To unsubscribe send an email to tf-a-tests-leave@lists.trustedfirmware.org