17 Mar
2021
17 Mar
'21
7:35 a.m.
On Tue, Mar 16, 2021 at 11:08 AM Peng Fan peng.fan@nxp.com wrote:
Hi,
In bl31/ehf.c, there are following two lines, per my understanding, when cpu is in secure world, the non-secure interrupt as FIQ(GICv3) will be directly catched by EL3, not S-EL1 /* Route EL3 interrupts when in Secure and Non-secure. */ set_interrupt_rm_flag(flags, NON_SECURE); set_interrupt_rm_flag(flags, SECURE);
So this will conflict with OP-TEE, because OP-TEE needs catch NS-interrupt as FIQ in S-EL1 world.
In the case of GICv3, OP-TEE is configured to receive the non-secure interrupts as FIQ and secure interrupts as IRQ. See CFG_ARM_GICV3.
Cheers, Jens