Hi,

See few answers below [OD]

Regards, Olivier.

________________________________ From: Chenxu Wang via Hafnium hafnium@lists.trustedfirmware.org Sent: 12 July 2023 23:25 To: Chenxu Wang via Hafnium hafnium@lists.trustedfirmware.org Subject: [Hafnium] Question about SMMU S-2 translation

Hi all,

I'd like to ask some questions about how the SMMU S-2 translation works.

My questions are as follows:

1. When SMMU performs Stage-2 translation (I mean, fetches the translation table and walks it), is it constrained by GPC on CPU MMU, or GPC on SMMU, or both?

[OD] TTW from the SMMU go through GPC independently from PE MMU.

For example, assume I configure the PAS of the non-secure SMMU S-2 translation table as "secure/realm/root PAS" in CPU MMU GPC, but "non-secure PAS" in SMMU (e.g., the SMMU for TestEngine on FVP) GPC, will the SMMU successfully perform S-2 translation?

Or in another example, assume I configure the PAS of the non-secure SMMU S-2 translation table as "non-secure PAS" in CPU MMU GPC, but "secure/realm/root PAS" in SMMU (e.g., the SMMU for TestEngine on FVP) GPC, will the SMMU successfully perform S-2 translation?

[OD] GPCs are performed based on the system wide GPT. The GPT reflects the physical address space description common to all PEs and SMMUs in the system. There is no PE-specific or SMMU-specific GPT configuration. The PAS specified in the GPT for a given memory region must match a valid PAS that a PE or SMMU uses for a TTW or r/w transaction.

2. Currently I use Hafnium to configure the SMMU. Due to memory limitation, I want to place the SMMU Stage-2 table in DRAM2 (starting from 0x8_8000_0000, but this region is not mapped in Hafnium). Since I think the SMMU S-2 translation is influenced by EL2 S-1 translation (really?), can I turn off the EL2 S-1 translation in Hafnium to avoid this problem? If yes, how to do it?

[OD] Just to be clear are you using Hafnium in the normal world (Hypervisor) or secure world (SPMC)? The Hafnium SMMU driver is designed to support (secure) S2 translations only. There is no support/interface for SMMU S1 translations. For the SPMC, it is not possible to move SMMU PTs to DRAM marked non-secure (as suggested when using DRAM2 range). You need to allocate PTs in a secure region for secure SMMU TTW to succeed.

Sincerely, WANG Chenxu -- Hafnium mailing list -- hafnium@lists.trustedfirmware.org To unsubscribe send an email to hafnium-leave@lists.trustedfirmware.org