Hi Eric,

On Thu, 28 May 2020 at 08:50, Eric FINCO via TSC <tsc@lists.trustedfirmware.org> wrote:

Hi TF-TSC folks,

I was on vacation last week so not able to join the TSC last week.

ST raised a question during the TF-M open forum today concerning the min number of MPU descriptors (= min mumber of regions) to be supported in the SoC especially for of level 3 isolation support.

Furthermore, putting it in perspective with the “measurement” API introduced in the HAL proposal presented in the open forum, one can extend the question: Do you think the TF-M TSC shall issue some recommendation for the minimal Hw configuration required for different features ?

This is something that the TSC should be able to do, but I wonder whether this isn't already covered in various specifications etc created by Arm the last couple of years. I'm thinking about for example TBSA-M that is part of PSA. If MPU descriptors aren't already mentioned, then we could ask to get it added.

Somehow, small profile memory footprint is also pointing in the direction.

There was a positive feedback from Ken (Liu) during the open forum slot but it could make sense to have the TSC reviewing and approving such thing. What do you think ?

Regards,

Eric Finco

Regards,

Joakim