Hi,
We would like to propose the following topic for discussion at the Tech Forum tomorrow.
* RME Granule Protection Table (GPT) block fusing
The GPT L1 entries needs to be fused to avoid TLB shattering for RME enabled CPUs. We will talk about the different prototype approaches tried in TF-A (EL3 firmware) and issues with each approach. We have a patch in review in which implements the “brute force” fusing algorithm. We explain our reasoning for picking this approach and possible future enhancements which may resolve some of the issues anticipated.
Also the fine- grained locking scheme implemented for GPT manipulation will also be discussed.
The patch in review is here : https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26674.
For design details of the GPT Library, please refer here : https://trustedfirmware-a.readthedocs.io/en/latest/components/granule-prote… .
Best Regards
Soby Mathew
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Hi Everyone,
We have been having instances of spam on the tf-rmm mailing list. We have made some changes on the default posting rules now and will monitor the outcome in the coming days.
Best Regards
Soby Mathew
Hi Everyone,
The EAC5 development branch has been merged back to the `main` and tagged (https://github.com/TF-RMM/tf-rmm/releases/tag/rmm-spec-v1.0-eac5) . TF-RMM is now RMM v1.0 EAC5 [1] compliant and all the corresponding Normal world software entities need to be updated to this version of ABI to work with RMM. The Normal world entities would be published later in due course, and we will update the list with relevant information as it becomes available.
The tf-a-tests changes have been merged to master and can be found here : https://git.trustedfirmware.org/TF-A/tf-a-tests.git/commit/?id=3dc2d746aa4b… . For TF-A, the master branch is compatible with EAC5 changes.
If you find any issues, please report them via mailing list, tf-rmm discord channel or github issues.
Best Regards
Soby Mathew
[1] https://developer.arm.com/documentation/den0137/1-0eac5/?lang=en
Hi Everyone,
The initial integration of CBMC (C Bounded Model checking) for TF-RMM has been merged. Please refer to the application note here for more details on how to trigger CBMC analysis/coverage/assert targets on TF-RMM implementation : https://tf-rmm.readthedocs.io/en/latest/resources/application-notes/cbmc.ht…
Best Regards
Soby Mathew
Hi,
I wonder if there is or there is a plan to develop a dedicated tool that allows a realm developer to calculate Realm Initial Measurements (RIMs) for realms(?)
As you know, the remote attestation mechanism requires a verifier to be provisioned with reference values. In this case, a realm verifier should have access to the initial reference measurement (RIM) of a realm that is intended to be run on a remote Arm CCA platform.
The algorithm that measures the initial state of realms (RIM) is higly sensitive to the content of a realm memory and the order of RMI operations. This means that not only the content of populated realm memory matters but also the implementation of the host components (e.g. kvm, kvmtool/qemu). For example, in the reference implementation of https://gitlab.arm.com/linux-arm/kvmtool-cca, the layout of memory and the content of DTB highly depend on the provided options (DTB is generated in run-time). Unfortunatelly, the content of DTB also depends on the linking order of object files (the order of DTB generation is imposed by __attribute__((constructor)) that is used to register devices). This complicates development of a separate tool for caclulating RIM, as the tool would have to emulate all quirks of the kvmtool.
One of the solution of retrieving Realm Initial Measurements seems to be running the whole firmware/software (e.g. kvmtool/Linux host/TF-RMM) stack on the FVP emulator and gathering the RIM directly from the TF-RMM. This would require a realm developer to have access to the whole firmware/software stack and the emulator of the CCA platform. This might not always be an option.
The other solution would require the implementation of a dedicated tool. For instance, a sensible approach could be to extend the functionality of kvmtool, which can be run on an ordinary Linux machine.
Is Arm going to develop a dedicated tool(-s) for calculating RIMs?
What is the recommended way of retrieving/calculating RIMs for realms?
Kind regards,
Piotr
Hello all,
We have added a GitHub workflow to RMM which allows the former to build
and run the unittests along with their corresponding coverage report
and upload such report in .html format to GitHub.
The workflow is automatically triggered when new pushes are done to the
main branch.
In order to access to the coverage report, you can either
* click on the green check symbol next to the latest commit, from
there to "details" on the "Coverage on unittests for RMM" action on
the pop up window and once in the action page, click on "Summary" on
the left side menu. The report will appear in the "Artifacts"
section as a .zip file with the name "coverage-results" or
* On the TF-RMM repo main page, click on "Actions" and then click on
the "Coverage on unittests for RMM" action corresponding to the
latest commit. You can then access to the report as explained on the
previous bullet.
Please keep in mind that reports older than 90 days will be
automatically deleted.
Thanks,
Javier
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Hi All,
Please review the patch-set that adds the functionality in RMM to manage Scalable Matrix Extension (SME) context. If the CPU supports SME and if Realm accesses FPU/SVE functionality then NS SME state is saved to allow Realm to use FPU/SVE register state.
https://review.trustedfirmware.org/q/topic:%22rmm_sme%22+(status:open%20OR%…
Brief summary of changes made in different components:
RMM:
- Introduces SIMD context and exports APIs to the runtime component of RMM to initialize, save, restore, and switch SIMD context.
- Adds SME support in RMM to manage NS SME context. Supports SVE+SME config and SME only config.
- Handles SVE hint bit passed in RMI SMCs
- Handles SME exceptions from Realms
https://review.trustedfirmware.org/q/topic:%22rmm_sme%22+(status:open%20OR%…
TF-A:
- Enables FEAT_SME for RMM
- Passes SMCCCv1.3 SVE hint bit in SMC function ID to RMM
tf-a-tests:
- There are changes in common lib routines for sve, sme so that testcases running in NS-EL2, S-EL1, R-EL1 can use these helper routines.
- Adds helper routines to read, write, compare FPU and SVE Z, P, FFR registers
- Adds SMCCCv1.3 SVE hint bit support in TFTF framework
- Enables SME/SME2 during arch init
- Adds SME helper routines and extends SVE lib routines to support streaming SVE mode.
https://review.trustedfirmware.org/q/topic:%22rmm_sme%22+(status:open%20OR%…
Thanks,
Arun
Hello all,
We currently have a patch under review [1] which will break the existing dependency between 'run-converage' and 'run-unittests' rules in the RMM build system.
This means that once the patch is merged, 'run-coverage' will not build and run RMM unittests. If ran in isolation, it will generate an empty coverage report by default.
This allows to get coverage analysis for especific tests rather than for all the unittests, which makes the process of writting unittests for new modules easier as we can have a picture of the current coverage for such modules without being tainted by the rest of the unittests.
Please note that in order to run coverage analysis on the whole existing set of unittests (as done previously by 'run-coverage') we need to invoke 'run-unittests' before.
The patch, which is currently open for discussion and review, includes instructions on how to run 'run-coverage' to get different types of analysis.
Thanks,
Javier
[1]: https://review.trustedfirmware.org/c/TF-RMM/tf-rmm/+/23039
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