There are 4 functions that have different logic at level 1 and level 2 that will affect timings:
Tfm_spm_partition_get_privileged_mode()
Tfm_get_secure_mem_region_attr()
Secure_mem_attr_check()
Tfm_has_access_to_region()
I guess the level 1 checks are slightly faster than level 2.
Chris
From: TF-M <tf-m-bounces@lists.trustedfirmware.org>
On Behalf Of Ken Liu via TF-M
Sent: Tuesday, November 9, 2021 5:45 AM
To: tf-m@lists.trustedfirmware.org
Cc: nd <nd@arm.com>
Subject: Re: [TF-M] Another PSoC problem
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As Chris mentioned, it should be related with a race condition problem when inserting messages – but the question is why Isolation level 2/3 is not affected, as RPC message handling happen inside PendSV always no spite of isolation levels
– or I am wrong with this logic? -- digging now, will let you know the result. I guess add critical section protection in ‘ipc_messaging’ should help.
This heavy test is useful.
/Ken
From: TF-M <tf-m-bounces@lists.trustedfirmware.org>
On Behalf Of Thomas Törnblom via TF-M
Sent: Tuesday, November 9, 2021 9:19 PM
To: tf-m@lists.trustedfirmware.org
Subject: Re: [TF-M] Another PSoC problem
Behaves the same with IAR.
/Thomas
Den 2021-11-09 kl. 01:54, skrev chris.brand--- via TF-M: