Hi

 

Just forwarding older private discussion to mailing list to make it publicly available.

 

 

Regards,

Bohdan Hunko

 

Cypress Semiconductor Ukraine

Engineer

CSUKR CSS ICW SW FW

Mobile: +38099 50 19 714
Bohdan.Hunko@infineon.com

 

 

From: Antonio De Angelis <Antonio.DeAngelis@arm.com>
Sent: Thursday, December 14, 2023 15:57
To: Mazurak Roman (CSS ICW SW FW 3) <Roman.Mazurak@infineon.com>; Anton Komlev <Anton.Komlev@arm.com>; Hunko Bohdan (CSS ICW SW FW 3) <Bohdan.Hunko@infineon.com>
Subject: Re: Weird behavior of Clang linker

 

Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe.

 

Hi Roman,

 

I tried to look in the ELF spec that I could find by googling, but what I can find online doesn't mention the topic of alignment requirements at all other than a brief mention of how the base address and align requirements must be coherent. How the requirement on alignment propagates from sections to execution regions to load regions is still something that I am trying to understand as I can't find an exhaustive description. The info I shared below stem from a personal conversation that I had with the compiler team internally here in Arm, I have now asked for a reference, will revert back to you in case I get one.

 

Only explicit mention of alignment that I could find is in the armlink manual in section 3.3.3.

 

The suggestion from the compiler team are as I mentioned:

 

  1. just disable the strict checks on alignment (i.e. the linker will be then allowed to add padding as required to meet the constraint imposed by the base address of the load region and the ALIGN attributes, by suppressing the diagnostic or using --legacyalign (on a side note, I believe this is the default behaviour on GCC linker for example)
  2. rewrite the scatter file to have all the input sections without alignment requirements in the output section where the vector reside, and then have another output section just after the first output section (i.e. with base address +0) to put all the other input sections with increased alignment. As a side note, the suggestion is to also align base addresses of sections using AlignExpr(+0, 4096) (for example, to align to 0x1000) rather than forcing ALIGN attributes. Note that this shouldn't be too complex to attain point 2 but it is something that at the moment we can't work on, but happily merge it in if you're willing to provide a patch for it. Your suggestion of having multiple output section is as well doable, but probably enough to have two of them.

 

Will get back to you in case I get some more reference about how the alignment requirements in ELF propagate from input section to output sections just to confirm on the spec itself.

 

Hope this helps, please let me know if any questions!

 

Thanks, Antonio

 

From: Roman.Mazurak@infineon.com <Roman.Mazurak@infineon.com>
Sent: Thursday, December 14, 2023 13:37
To: Antonio De Angelis <Antonio.DeAngelis@arm.com>; Anton Komlev <Anton.Komlev@arm.com>; Bohdan.Hunko@infineon.com <Bohdan.Hunko@infineon.com>
Subject: RE: Weird behavior of Clang linker

 

Hi Antonio,

 

We have a use case when output section has following list of input sections:

  • Vectors with alignment by 0x400.
  • Partitions sections with alignment by 0x1000.

As result output section alignment is 0x1000 and address is incorrect. So, probably it’s necessary to create a separate output section for each input section.

 

Can you share a link to ELF specification with requirements for output section alignment?

 

Best regards,

Roman.

 

From: Antonio De Angelis via TF-M <tf-m@lists.trustedfirmware.org>
Sent: Wednesday, December 13, 2023 18:56
To: Anton Komlev <Anton.Komlev@arm.com>; tf-m@lists.trustedfirmware.org; Hunko Bohdan (CSS ICW SW FW 3) <Bohdan.Hunko@infineon.com>
Subject: [TF-M] Re: Weird behavior of Clang linker

 

Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe.

 

Hi Bohdan,

 

For reference, this is due to armlink being strict on following the ELF specification for which the region alignment is derived as the maximum alignment of the input sections. You can relax this requirement with armlink by either using the --legacyalign option (although it's being deprecated) or suppressing the diagnostic --diag_suppress=6244. In the future, we could try to reorganize the scatter file for the armclang toolchain to avoid using directly ALIGN attributes and align the base address of the execution regions using AlignExpr() instead, but even with this strategy, any alignment requirement which stems from using .aligned directive in assembly or attribute __ ((aligned)) attributes will influence the input sections alignment, hence it will require a deeper restructuring of the scatter file, possibly moving sections with increased alignment in a separate load region just after LR​_CODE which must have a base address that forces a natural alignment.

 

Hope this helps.

 

Thanks, Antonio

 

From: Bohdan.Hunko--- via TF-M <tf-m@lists.trustedfirmware.org>
Sent: Monday, December 11, 2023 13:39
To: Anton Komlev <Anton.Komlev@arm.com>; tf-m@lists.trustedfirmware.org <tf-m@lists.trustedfirmware.org>
Subject: [TF-M] Re: Weird behavior of Clang linker

 

Hi Anton,

 

Here is the version I am using:

 

$ armclang --version

Product: Arm Development Studio Gold Edition 2020.1

Component: Arm Compiler for Embedded 6.19

Tool: armclang [5e73cb00]

 

Target: unspecified-arm-none-unspecified

 

 

Regards,

Bohdan Hunko

 

Cypress Semiconductor Ukraine

Engineer

CSUKR CSS ICW SW FW

Mobile: +38099 50 19 714
Bohdan.Hunko@infineon.com

 

 

From: Anton Komlev <Anton.Komlev@arm.com>
Sent: Monday, December 11, 2023 15:34
To: Hunko Bohdan (CSS ICW SW FW 3) <Bohdan.Hunko@infineon.com>; tf-m@lists.trustedfirmware.org
Subject: RE: Weird behavior of Clang linker

 

Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safe.

 

Hi Bohdan,

What is Clang version you are using?

 

Thanks,

Anton

 

From: Bohdan.Hunko--- via TF-M <tf-m@lists.trustedfirmware.org>
Sent: Monday, December 11, 2023 12:58 PM
To: tf-m@lists.trustedfirmware.org
Subject: [TF-M] Weird behavior of Clang linker

 

Hi all,

 

Our platform uses 4KBs alignment in linker files (as this is the requirement of our protection HW).

 

For this reasons I have introduced tfm_s_linker_alignments.h.

 

Everything works fine with GCC but we have a problem with Clang. The problem is that Clang requires LR_CODE to have same alignment as other sections inside of it.

 

Following are the steps to reproduce the issue:

  1. Set TFM_LINKER_DEFAULT_ALIGNMENT to 0x1000 in tfm_s_linker_alignments.h
  2. Build AN521 with following command line
    cmake -S . -B build_an521 -DTFM_PLATFORM=arm/mps2/an521 -DTFM_TOOLCHAIN_FILE=./toolchain_ARMCLANG.cmake

 

 

Expected result:

Everything works fine

 

Actual result:

                Error: L6244E: Load region LR_CODE address (0x10080400) not aligned on a 4096 byte boundary.

 

This error is weird because there is no explicit alignment assigned to LR_CODE region.

 

Would appreciate a help on this as it is a blocking issue for us.

 

Regards,

Bohdan Hunko

 

Cypress Semiconductor Ukraine

Engineer

CSUKR CSS ICW SW FW

Mobile: +38099 50 19 714
Bohdan.Hunko@infineon.com

 

 

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