Hi Maheedhar

Erratum 1530924 (This erratum applies to all revisions of Cortex A53 cpu) is an AT speculative errata workaround that gets applied at runtime. The implementation of this workaround is controlled by the ERRATA_SPECULATIVE_AT. For setting of this flag, refer to [1]. You can find the implementation by searching for this flag in the code. It is mainly applied upon entry to the Secure Monitor, as shown in this example [2].

[1]: https://git.trustedfirmware.org/TF-A/trusted-firmware-a/+/refs/heads/integration/lib/cpus/cpu-ops.mk#1000
[2]: https://git.trustedfirmware.org/TF-A/trusted-firmware-a/+/refs/heads/sandbox/lts-v2.10.3-20240405T0714-br/bl31/aarch64/runtime_exceptions.S#230

Thanks,
Manish Badarkhe

From: Bollapalli, Maheedhar Sai via TF-A <tf-a@lists.trustedfirmware.org>
Sent: 18 July 2024 10:15
To: tf-a@lists.trustedfirmware.org <tf-a@lists.trustedfirmware.org>
Subject: [TF-A] Erratum 1530924 handling
 
Hi,

On AMD-Xilinx ZynqMP platform there is a erratum (1530924) which is mentioned as applied as shown in the log below:
" INFO:    BL31: cortex_a53: CPU workaround for erratum 1530924 was applied "

Refer to the code comments mentioned below, there is no "erratum has no workaround in the CPU. Generic code must take care "
https://gitenterprise.xilinx.com/Linux/arm-trusted-firmware/blob/master/lib/cpus/aarch64/cortex_a53.S#L133

However, we found no handling in the generic code either.

Can we be guided further regarding the handling of erratum 1530924 ?

Regards,
Maheedhar.
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